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Searched defs:pll (Results 1 – 4 of 4) sorted by relevance

/optee_os/core/arch/arm/plat-rockchip/
A Dcru.h39 #define CRU_PLL_CON0(pll) ((pll) * 0x0c + 0x0) argument
40 #define CRU_PLL_CON1(pll) ((pll) * 0x0c + 0x4) argument
41 #define CRU_PLL_CON2(pll) ((pll) * 0x0c + 0x8) argument
47 #define PLL_MODE_BIT(pll) ((pll) * 4) argument
48 #define PLL_MODE_MSK(pll) BIT(PLL_MODE_BIT(pll)) argument
49 #define PLL_SLOW_MODE(pll) BITS_WITH_WMASK(0, 1, PLL_MODE_BIT(pll)) argument
50 #define PLL_NORM_MODE(pll) BITS_WITH_WMASK(1, 1, PLL_MODE_BIT(pll)) argument
A Dpsci_rk322x.c85 static void pll_power_down(uint32_t pll) in pll_power_down()
93 static void pll_power_up(uint32_t pll) in pll_power_up()
100 static void pll_wait_lock(uint32_t pll) in pll_wait_lock()
/optee_os/core/drivers/clk/sam/
A Dat91_pll.c56 struct clk_pll *pll = clk->priv; in clk_pll_enable() local
98 struct clk_pll *pll = clk->priv; in clk_pll_disable() local
107 struct clk_pll *pll = clk->priv; in clk_pll_get_rate() local
115 static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, in clk_pll_get_best_div_mul()
230 struct clk_pll *pll = clk->priv; in clk_pll_set_rate() local
262 struct clk_pll *pll = NULL; in at91_clk_register_pll() local
/optee_os/core/drivers/clk/
A Dclk-stm32mp15.c659 static unsigned long stm32mp1_pll_get_fref(const struct stm32mp1_clk_pll *pll) in stm32mp1_pll_get_fref()
673 static unsigned long stm32mp1_pll_get_fvco(const struct stm32mp1_clk_pll *pll) in stm32mp1_pll_get_fvco()
716 const struct stm32mp1_clk_pll *pll = pll_ref(pll_id); in stm32mp1_read_pll_freq() local
1076 const struct stm32mp1_clk_pll *pll = pll_ref(pll_id); in get_parent_id_parent() local

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