Searched defs:pll (Results 1 – 25 of 82) sorted by relevance

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/u-boot/arch/arm/cpu/arm926ejs/mx27/
A D	generic.c	28 static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref) in imx_decode_pll() 48 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE; in clk_in_26m() local 60 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE; in imx_get_mpllclk() local 74 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE; in imx_get_armclk() local 89 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE; in imx_get_ahbclk() local 101 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE; in imx_get_spllclk() local 120 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE; in imx_get_perclk1() local 127 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE; in imx_get_perclk2() local 134 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE; in imx_get_perclk3() local 141 struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE; in imx_get_perclk4() local [all …]
/u-boot/drivers/clk/imx/
A D	clk-pllv3.c	47 struct clk_pllv3 *pll = to_clk_pllv3(dev_get_clk_ptr(clk->dev)); in clk_pllv3_generic_get_rate() local 57 struct clk_pllv3 *pll = to_clk_pllv3(clk); in clk_pllv3_generic_set_rate() local 82 struct clk_pllv3 *pll = to_clk_pllv3(clk); in clk_pllv3_generic_enable() local 100 struct clk_pllv3 *pll = to_clk_pllv3(clk); in clk_pllv3_generic_disable() local 125 struct clk_pllv3 *pll = to_clk_pllv3(clk); in clk_pllv3_sys_get_rate() local 134 struct clk_pllv3 *pll = to_clk_pllv3(clk); in clk_pllv3_sys_set_rate() local 171 struct clk_pllv3 *pll = to_clk_pllv3(clk); in clk_pllv3_av_get_rate() local 189 struct clk_pllv3 *pll = to_clk_pllv3(clk); in clk_pllv3_av_set_rate() local 239 struct clk_pllv3 *pll = to_clk_pllv3(clk); in clk_pllv3_enet_get_rate() local 254 struct clk_pllv3 *pll; in imx_clk_pllv3() local
A D	clk-pll14xx.c	56 struct clk_pll14xx *pll, unsigned long rate) in imx_get_pll_settings() 70 struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); in clk_pll1416x_recalc_rate() local 87 struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); in clk_pll1443x_recalc_rate() local 145 static int clk_pll14xx_wait_lock(struct clk_pll14xx *pll) in clk_pll14xx_wait_lock() 155 struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); in clk_pll1416x_set_rate() local 221 struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); in clk_pll1443x_set_rate() local 285 struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); in clk_pll14xx_prepare() local 301 struct clk_pll14xx *pll = to_clk_pll14xx(dev_get_clk_ptr(clk->dev)); in clk_pll14xx_unprepare() local 333 struct clk_pll14xx *pll; in imx_clk_pll14xx() local
/u-boot/arch/m68k/cpu/mcf52x2/
A D	speed.c	24 pll_t *pll = (pll_t *) MMAP_PLL; in get_clocks() local 60 pll_t *pll = (pll_t *)(MMAP_PLL); in get_clocks() local
/u-boot/drivers/clk/kendryte/
A D	pll.c	431 struct k210_pll *pll = to_k210_pll(clk); in k210_pll_set_rate() local 473 struct k210_pll *pll = to_k210_pll(clk); in k210_pll_get_rate() local 494 static void k210_pll_waitfor_lock(struct k210_pll *pll) in k210_pll_waitfor_lock() 512 struct k210_pll *pll = to_k210_pll(clk); in k210_pll_enable() local 541 struct k210_pll *pll = to_k210_pll(clk); in k210_pll_disable() local 567 struct k210_pll *pll) in k210_register_pll_struct() 583 struct k210_pll *pll; in k210_register_pll() local
/u-boot/drivers/clk/at91/
A D	clk-sam9x60-pll.c	97 struct sam9x60_pll *pll = to_sam9x60_pll(clk); in sam9x60_frac_pll_set_rate() local 142 struct sam9x60_pll *pll = to_sam9x60_pll(clk); in sam9x60_frac_pll_get_rate() local 161 struct sam9x60_pll *pll = to_sam9x60_pll(clk); in sam9x60_frac_pll_enable() local 226 struct sam9x60_pll *pll = to_sam9x60_pll(clk); in sam9x60_frac_pll_disable() local 256 struct sam9x60_pll *pll = to_sam9x60_pll(clk); in sam9x60_div_pll_enable() local 286 struct sam9x60_pll *pll = to_sam9x60_pll(clk); in sam9x60_div_pll_disable() local 304 struct sam9x60_pll *pll = to_sam9x60_pll(clk); in sam9x60_div_pll_set_rate() local 345 struct sam9x60_pll *pll = to_sam9x60_pll(clk); in sam9x60_div_pll_get_rate() local 377 struct sam9x60_pll *pll; in sam9x60_clk_register_pll() local
/u-boot/drivers/clk/rockchip/
A D	clk_pll.c	168 rockchip_get_pll_settings(struct rockchip_pll_clock *pll, ulong rate) in rockchip_get_pll_settings() 183 static int rk3036_pll_set_rate(struct rockchip_pll_clock *pll, in rk3036_pll_set_rate() 251 static ulong rk3036_pll_get_rate(struct rockchip_pll_clock *pll, in rk3036_pll_get_rate() 299 ulong rockchip_pll_get_rate(struct rockchip_pll_clock *pll, in rockchip_pll_get_rate() 321 int rockchip_pll_set_rate(struct rockchip_pll_clock *pll, in rockchip_pll_set_rate()
/u-boot/arch/m68k/cpu/mcf5445x/
A D	speed.c	61 pll_t *pll = (pll_t *)MMAP_PLL; in clock_exit_limp() local 75 pll_t *pll = (pll_t *)MMAP_PLL; in setup_5441x_clocks() local 134 pll_t *pll = (pll_t *)MMAP_PLL; in setup_5445x_clocks() local
/u-boot/arch/m68k/cpu/mcf5227x/
A D	speed.c	59 pll_t *pll = (pll_t *)MMAP_PLL; in clock_exit_limp() local 76 pll_t *pll = (pll_t *)MMAP_PLL; in get_clocks() local
A D	cpu_init.c	44 pll_t *pll = (pll_t *)MMAP_PLL; in cpu_init_f() local
/u-boot/drivers/clk/mediatek/
A D	clk-mtk.c	95 static unsigned long __mtk_pll_recalc_rate(const struct mtk_pll_data *pll, in __mtk_pll_recalc_rate() 130 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; in mtk_pll_set_rate_regs() local 172 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; in mtk_pll_calc_values() local 209 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; in mtk_apmixedsys_get_rate() local 227 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; in mtk_apmixedsys_enable() local 256 const struct mtk_pll_data *pll = &priv->tree->plls[clk->id]; in mtk_apmixedsys_disable() local
/u-boot/arch/m68k/cpu/mcf523x/
A D	speed.c	25 pll_t *pll = (pll_t *)(MMAP_PLL); in get_clocks() local
/u-boot/arch/arm/include/asm/arch-s32v234/
A D	mc_cgm_regs.h	70 #define PLLDIG_PLLDV(pll) ((MC_CGM0_BASE_ADDR + 0x00000028) + ((pll) * 0x80)) argument 94 #define PLLDIG_PLLFD(pll) ((MC_CGM0_BASE_ADDR + 0x00000030) + ((pll) * 0x80)) argument 100 #define PLLDIG_PLLCAL1(pll) ((MC_CGM0_BASE_ADDR + 0x00000038) + ((pll) * 0x80)) argument 110 #define DFS_DLLPRG1(pll) (DFS0_BASE_ADDR + 0x00000000 + ((pll) * 0x80)) argument 137 #define DFS_CTRL(pll) (DFS0_BASE_ADDR + 0x00000018 + ((pll) * 0x80)) argument 142 #define DFS_PORTSR(pll) (DFS0_BASE_ADDR + 0x0000000C +((pll) * 0x80)) argument 144 #define DFS_PORTRESET(pll) (DFS0_BASE_ADDR + 0x00000014 + ((pll) * 0x80)) argument 151 #define DFS_DVPORTn(pll,n) (DFS0_BASE_ADDR + ((pll) * 0x80) + (0x0000001C + ((n) * 0x4))) argument
/u-boot/arch/arm/mach-keystone/include/mach/
A D	clock_defs.h	56 #define pllctl_reg(pll, reg) (&(pllctl_regs[pll]->reg)) argument 57 #define pllctl_reg_read(pll, reg) __raw_readl(pllctl_reg(pll, reg)) argument 58 #define pllctl_reg_write(pll, reg, val) __raw_writel(val, pllctl_reg(pll, reg)) argument 60 #define pllctl_reg_rmw(pll, reg, mask, val) \ argument 64 #define pllctl_reg_setbits(pll, reg, mask) \ argument 67 #define pllctl_reg_clrbits(pll, reg, mask) \ argument
/u-boot/board/freescale/s32v234evb/
A D	clock.c	17 static int select_pll_source_clk(enum pll_type pll, u32 refclk_freq) in select_pll_source_clk() 81 static int program_pll(enum pll_type pll, u32 refclk_freq, u32 freq0, u32 freq1, in program_pll()
/u-boot/arch/m68k/cpu/mcf532x/
A D	speed.c	55 pll_t *pll = (pll_t *)(MMAP_PLL); in get_sys_clock() local 146 pll_t *pll = (pll_t *)(MMAP_PLL); in clock_pll() local
/u-boot/arch/arm/mach-tegra/
A D	clock.c	95 struct clk_pll *pll = get_pll(clkid); in clock_ll_read_pll() local 119 struct clk_pll *pll = NULL; in clock_start_pll() local 268 struct clk_pll *pll = get_pll(clkid); in clock_set_pllout() local 538 struct clk_pll *pll; in clock_get_rate() local 595 struct clk_pll *pll; in clock_set_rate() local 678 struct clk_pll *pll = get_pll(CLOCK_ID_PERIPH); in clock_verify() local
A D	cpu.c	172 int pllx_set_rate(struct clk_pll_simple *pll , u32 divn, u32 divm, in pllx_set_rate() 233 struct clk_pll_simple *pll = &clkrst->crc_pll_simple[SIMPLE_PLLX]; in init_pllx() local
/u-boot/arch/arm/mach-keystone/
A D	clock.c	222 int pll; in init_plls() local 280 static unsigned long pll_freq_get(int pll) in pll_freq_get()
/u-boot/arch/mips/mach-ath79/ar933x/
A D	clk.c	36 u32 val, xtal, pll, div; in get_clocks() local
/u-boot/arch/mips/mach-ath79/qca953x/
A D	clk.c	36 u32 val, ctrl, xtal, pll, div; in get_clocks() local
/u-boot/board/ti/ks2_evm/
A D	board_k2e.c	74 struct pll_init_data *get_pll_init_data(int pll) in get_pll_init_data()
A D	board_k2l.c	65 struct pll_init_data *get_pll_init_data(int pll) in get_pll_init_data()
/u-boot/drivers/clk/altera/
A D	clk-agilex.c	112 static int membus_wait_for_req(struct socfpga_clk_plat *plat, u32 pll, in membus_wait_for_req() 137 static int membus_write_pll(struct socfpga_clk_plat *plat, u32 pll, in membus_write_pll() 158 static int membus_read_pll(struct socfpga_clk_plat *plat, u32 pll, in membus_read_pll() 188 static void membus_pll_configs(struct socfpga_clk_plat *plat, u32 pll) in membus_pll_configs()
/u-boot/arch/arm/mach-omap2/am33xx/
A D	emif4.c	70 void config_ddr(unsigned int pll, const struct ctrl_ioregs *ioregs, in config_ddr()

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Last Index update Sat Jun 03 09:59:21 CST 2023