Searched defs:pll1divr (Results 1 – 1 of 1) sorted by relevance

/u-boot/drivers/clk/
A D	clk_stm32h7.c	137 u32 pll1divr; /* 0x30 PLL1 Dividers Configuration Register */ member 356 uint32_t pll1divr = 0; in configure_clocks() local

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