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Searched defs:pll_id (Results 1 – 12 of 12) sorted by relevance

/u-boot/drivers/clk/rockchip/
A Dclk_pll.c184 void __iomem *base, ulong pll_id, in rk3036_pll_set_rate()
252 void __iomem *base, ulong pll_id) in rk3036_pll_get_rate()
301 ulong pll_id) in rockchip_pll_get_rate()
322 void __iomem *base, ulong pll_id, in rockchip_pll_set_rate()
A Dclk_rk3036.c52 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
179 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
A Dclk_rk322x.c50 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
181 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
A Dclk_rk3128.c45 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
247 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
A Dclk_rk3188.c93 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
235 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
A Dclk_rk3368.c67 enum rk3368_pll_id pll_id) in rkclk_pll_get_rate()
93 static int rkclk_set_pll(struct rk3368_cru *cru, enum rk3368_pll_id pll_id, in rkclk_set_pll()
A Dclk_px30.c207 enum px30_pll_id pll_id, in rkclk_set_pll()
262 enum px30_pll_id pll_id) in rkclk_pll_get_rate()
1101 enum px30_pll_id pll_id) in px30_clk_get_pll_rate()
1109 enum px30_pll_id pll_id, ulong hz) in px30_clk_set_pll_rate()
A Dclk_rv1108.c74 int pll_id = rv1108_pll_id(clk_id); in rkclk_set_pll() local
128 int pll_id = rv1108_pll_id(clk_id); in rkclk_pll_get_rate() local
A Dclk_rk3288.c154 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll() local
549 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate() local
/u-boot/drivers/clk/
A Dclk_stm32mp1.c877 int pll_id) in pll_get_fref_ck()
900 int pll_id) in pll_get_fvco()
934 int pll_id, int div_id) in stm32mp1_read_pll_freq()
1557 static void pll_start(struct stm32mp1_clk_priv *priv, int pll_id) in pll_start()
1567 static int pll_output(struct stm32mp1_clk_priv *priv, int pll_id, int output) in pll_output()
1589 static int pll_stop(struct stm32mp1_clk_priv *priv, int pll_id) in pll_stop()
1608 int pll_id, u32 *pllcfg) in pll_config_output()
1623 static int pll_config(struct stm32mp1_clk_priv *priv, int pll_id, in pll_config()
1670 static void pll_csg(struct stm32mp1_clk_priv *priv, int pll_id, u32 *csg) in pll_csg()
1688 int pll_id, in pll_set_rate()
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/u-boot/arch/arm/include/asm/arch-rockchip/
A Dsdram_px30.h71 #define CRU_PLL_CON(pll_id, n) ((pll_id) * 0x20 + (n) * 4) argument
A Dsdram_rk3328.h51 #define CRU_PLL_CON(pll_id, n) ((pll_id) * 0x20 + (n) * 4) argument

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