pll_rate (definition) in projects: u-boot

Searched defs:pll_rate (Results 1 – 12 of 12) sorted by relevance

/u-boot/drivers/clk/rockchip/
A D	clk_rv1108.c	`152 ulong pll_rate; in rv1108_mac_set_clk() local 177 u32 pll_rate; in rv1108_sfc_set_clk() local 515 u32 pll_rate; in rv1108_mmc_set_clk() local`
A D	clk_rk3368.c	`165 u32 pll_rate; in rk3368_mmc_get_clk() local 330 ulong pll_rate; in rk3368_gmac_set_clk() local`
A D	clk_rk3308.c	`197 ulong pll_rate; in rk3308_mac_set_clk() local 494 ulong pll_rate, now, best_rate = 0; in rk3308_vop_set_clk() local`
A D	clk_rk322x.c	`259 ulong pll_rate; in rk322x_mac_set_clk() local`
A D	clk_rk3288.c	`318 ulong pll_rate; in rockchip_mac_set_clk() local`
A D	clk_rk3328.c	`426 ulong pll_rate; in rk3328_gmac2io_set_clk() local`
A D	clk_px30.c	`1061 ulong pll_rate; in px30_mac_set_clk() local`
/u-boot/drivers/clk/
A D	clk_zynq.c	`291 ulong pll_rate, in zynq_clk_calc_peripheral_two_divs() 322 ulong pll_rate, new_rate; in zynq_clk_set_peripheral_rate() local`
A D	clk-hsdk-cgu.c	`145 const u32 pll_rate[MAX_FREQ_VARIATIONS]; member 597 ulong pll_rate; in common_div_clk_set() local`
A D	clk_zynqmp.c	`504 ulong pll_rate, in zynqmp_clk_calc_peripheral_two_divs() 535 ulong pll_rate, new_rate; in zynqmp_clk_set_peripheral_rate() local`
/u-boot/arch/arm/mach-tegra/
A D	clock.c	`28 static unsigned pll_rate[CLOCK_ID_COUNT]; variable`
/u-boot/arch/arm/mach-nexell/
A D	clock.c	`330 static unsigned int pll_rate(unsigned int plln, unsigned int xtal) in pll_rate() function`

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