1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) ST-Ericsson SA 2010-2013
4  * Author: Rickard Andersson <rickard.andersson@stericsson.com> for
5  *         ST-Ericsson.
6  * Author: Daniel Lezcano <daniel.lezcano@linaro.org> for Linaro.
7  * Author: Ulf Hansson <ulf.hansson@linaro.org> for Linaro.
8  */
9 
10 #include <linux/kernel.h>
11 #include <linux/irqchip/arm-gic.h>
12 #include <linux/delay.h>
13 #include <linux/io.h>
14 #include <linux/suspend.h>
15 #include <linux/platform_data/arm-ux500-pm.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 
19 #include "db8500-regs.h"
20 
21 /* ARM WFI Standby signal register */
22 #define PRCM_ARM_WFI_STANDBY    (prcmu_base + 0x130)
23 #define PRCM_ARM_WFI_STANDBY_WFI0		0x08
24 #define PRCM_ARM_WFI_STANDBY_WFI1		0x10
25 #define PRCM_IOCR		(prcmu_base + 0x310)
26 #define PRCM_IOCR_IOFORCE			0x1
27 
28 /* Dual A9 core interrupt management unit registers */
29 #define PRCM_A9_MASK_REQ	(prcmu_base + 0x328)
30 #define PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ	0x1
31 
32 #define PRCM_A9_MASK_ACK	(prcmu_base + 0x32c)
33 #define PRCM_ARMITMSK31TO0	(prcmu_base + 0x11c)
34 #define PRCM_ARMITMSK63TO32	(prcmu_base + 0x120)
35 #define PRCM_ARMITMSK95TO64	(prcmu_base + 0x124)
36 #define PRCM_ARMITMSK127TO96	(prcmu_base + 0x128)
37 #define PRCM_POWER_STATE_VAL	(prcmu_base + 0x25C)
38 #define PRCM_ARMITVAL31TO0	(prcmu_base + 0x260)
39 #define PRCM_ARMITVAL63TO32	(prcmu_base + 0x264)
40 #define PRCM_ARMITVAL95TO64	(prcmu_base + 0x268)
41 #define PRCM_ARMITVAL127TO96	(prcmu_base + 0x26C)
42 
43 static void __iomem *prcmu_base;
44 static void __iomem *dist_base;
45 
46 /* This function decouple the gic from the prcmu */
prcmu_gic_decouple(void)47 int prcmu_gic_decouple(void)
48 {
49 	u32 val = readl(PRCM_A9_MASK_REQ);
50 
51 	/* Set bit 0 register value to 1 */
52 	writel(val | PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ,
53 	       PRCM_A9_MASK_REQ);
54 
55 	/* Make sure the register is updated */
56 	readl(PRCM_A9_MASK_REQ);
57 
58 	/* Wait a few cycles for the gic mask completion */
59 	udelay(1);
60 
61 	return 0;
62 }
63 
64 /* This function recouple the gic with the prcmu */
prcmu_gic_recouple(void)65 int prcmu_gic_recouple(void)
66 {
67 	u32 val = readl(PRCM_A9_MASK_REQ);
68 
69 	/* Set bit 0 register value to 0 */
70 	writel(val & ~PRCM_A9_MASK_REQ_PRCM_A9_MASK_REQ, PRCM_A9_MASK_REQ);
71 
72 	return 0;
73 }
74 
75 #define PRCMU_GIC_NUMBER_REGS 5
76 
77 /*
78  * This function checks if there are pending irq on the gic. It only
79  * makes sense if the gic has been decoupled before with the
80  * db8500_prcmu_gic_decouple function. Disabling an interrupt only
81  * disables the forwarding of the interrupt to any CPU interface. It
82  * does not prevent the interrupt from changing state, for example
83  * becoming pending, or active and pending if it is already
84  * active. Hence, we have to check the interrupt is pending *and* is
85  * active.
86  */
prcmu_gic_pending_irq(void)87 bool prcmu_gic_pending_irq(void)
88 {
89 	u32 pr; /* Pending register */
90 	u32 er; /* Enable register */
91 	int i;
92 
93 	/* 5 registers. STI & PPI not skipped */
94 	for (i = 0; i < PRCMU_GIC_NUMBER_REGS; i++) {
95 
96 		pr = readl_relaxed(dist_base + GIC_DIST_PENDING_SET + i * 4);
97 		er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4);
98 
99 		if (pr & er)
100 			return true; /* There is a pending interrupt */
101 	}
102 
103 	return false;
104 }
105 
106 /*
107  * This function checks if there are pending interrupt on the
108  * prcmu which has been delegated to monitor the irqs with the
109  * db8500_prcmu_copy_gic_settings function.
110  */
prcmu_pending_irq(void)111 bool prcmu_pending_irq(void)
112 {
113 	u32 it, im;
114 	int i;
115 
116 	for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) {
117 		it = readl(PRCM_ARMITVAL31TO0 + i * 4);
118 		im = readl(PRCM_ARMITMSK31TO0 + i * 4);
119 		if (it & im)
120 			return true; /* There is a pending interrupt */
121 	}
122 
123 	return false;
124 }
125 
126 /*
127  * This function checks if the specified cpu is in in WFI. It's usage
128  * makes sense only if the gic is decoupled with the db8500_prcmu_gic_decouple
129  * function. Of course passing smp_processor_id() to this function will
130  * always return false...
131  */
prcmu_is_cpu_in_wfi(int cpu)132 bool prcmu_is_cpu_in_wfi(int cpu)
133 {
134 	return readl(PRCM_ARM_WFI_STANDBY) &
135 		(cpu ? PRCM_ARM_WFI_STANDBY_WFI1 : PRCM_ARM_WFI_STANDBY_WFI0);
136 }
137 
138 /*
139  * This function copies the gic SPI settings to the prcmu in order to
140  * monitor them and abort/finish the retention/off sequence or state.
141  */
prcmu_copy_gic_settings(void)142 int prcmu_copy_gic_settings(void)
143 {
144 	u32 er; /* Enable register */
145 	int i;
146 
147 	/* We skip the STI and PPI */
148 	for (i = 0; i < PRCMU_GIC_NUMBER_REGS - 1; i++) {
149 		er = readl_relaxed(dist_base +
150 				   GIC_DIST_ENABLE_SET + (i + 1) * 4);
151 		writel(er, PRCM_ARMITMSK31TO0 + i * 4);
152 	}
153 
154 	return 0;
155 }
156 
157 #ifdef CONFIG_SUSPEND
ux500_suspend_enter(suspend_state_t state)158 static int ux500_suspend_enter(suspend_state_t state)
159 {
160 	cpu_do_idle();
161 	return 0;
162 }
163 
ux500_suspend_valid(suspend_state_t state)164 static int ux500_suspend_valid(suspend_state_t state)
165 {
166 	return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY;
167 }
168 
169 static const struct platform_suspend_ops ux500_suspend_ops = {
170 	.enter	      = ux500_suspend_enter,
171 	.valid	      = ux500_suspend_valid,
172 };
173 #define UX500_SUSPEND_OPS	(&ux500_suspend_ops)
174 #else
175 #define UX500_SUSPEND_OPS	NULL
176 #endif
177 
ux500_pm_init(u32 phy_base,u32 size)178 void __init ux500_pm_init(u32 phy_base, u32 size)
179 {
180 	struct device_node *np;
181 
182 	prcmu_base = ioremap(phy_base, size);
183 	if (!prcmu_base) {
184 		pr_err("could not remap PRCMU for PM functions\n");
185 		return;
186 	}
187 	np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");
188 	dist_base = of_iomap(np, 0);
189 	of_node_put(np);
190 	if (!dist_base) {
191 		pr_err("could not remap GIC dist base for PM functions\n");
192 		return;
193 	}
194 
195 	/*
196 	 * On watchdog reboot the GIC is in some cases decoupled.
197 	 * This will make sure that the GIC is correctly configured.
198 	 */
199 	prcmu_gic_recouple();
200 
201 	/* Set up ux500 suspend callbacks. */
202 	suspend_set_ops(UX500_SUSPEND_OPS);
203 }
204