1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/arch/arm/mach-mmp/pxa168.c
4 *
5 * Code specific to PXA168
6 */
7 #include <linux/module.h>
8 #include <linux/kernel.h>
9 #include <linux/init.h>
10 #include <linux/list.h>
11 #include <linux/io.h>
12 #include <linux/clk.h>
13 #include <linux/clk/mmp.h>
14 #include <linux/platform_device.h>
15 #include <linux/platform_data/mv_usb.h>
16 #include <linux/dma-mapping.h>
17
18 #include <asm/mach/time.h>
19 #include <asm/system_misc.h>
20
21 #include "addr-map.h"
22 #include "common.h"
23 #include <linux/soc/mmp/cputype.h>
24 #include "devices.h"
25 #include "irqs.h"
26 #include "mfp.h"
27 #include "pxa168.h"
28 #include "regs-apbc.h"
29 #include "regs-apmu.h"
30 #include "regs-usb.h"
31
32 #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
33
34 static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
35 {
36 MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
37 MFP_ADDR_X(GPIO37, GPIO55, 0x000),
38 MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
39 MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
40
41 MFP_ADDR_END,
42 };
43
pxa168_init_irq(void)44 void __init pxa168_init_irq(void)
45 {
46 icu_init_irq();
47 }
48
pxa168_init(void)49 static int __init pxa168_init(void)
50 {
51 if (cpu_is_pxa168()) {
52 mfp_init_base(MFPR_VIRT_BASE);
53 mfp_init_addr(pxa168_mfp_addr_map);
54 pxa168_clk_init(APB_PHYS_BASE + 0x50000,
55 AXI_PHYS_BASE + 0x82800,
56 APB_PHYS_BASE + 0x15000);
57 }
58
59 return 0;
60 }
61 postcore_initcall(pxa168_init);
62
63 /* system timer - clock enabled, 3.25MHz */
64 #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
65 #define APBC_TIMERS APBC_REG(0x34)
66
pxa168_timer_init(void)67 void __init pxa168_timer_init(void)
68 {
69 /* this is early, we have to initialize the CCU registers by
70 * ourselves instead of using clk_* API. Clock rate is defined
71 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
72 */
73 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
74
75 /* 3.25MHz, bus/functional clock enabled, release reset */
76 __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
77
78 mmp_timer_init(IRQ_PXA168_TIMER1, 3250000);
79 }
80
pxa168_clear_keypad_wakeup(void)81 void pxa168_clear_keypad_wakeup(void)
82 {
83 uint32_t val;
84 uint32_t mask = APMU_PXA168_KP_WAKE_CLR;
85
86 /* wake event clear is needed in order to clear keypad interrupt */
87 val = __raw_readl(APMU_WAKE_CLR);
88 __raw_writel(val | mask, APMU_WAKE_CLR);
89 }
90
91 /* on-chip devices */
92 PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
93 PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
94 PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24);
95 PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
96 PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
97 PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10);
98 PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10);
99 PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10);
100 PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10);
101 PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
102 PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53);
103 PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55);
104 PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57);
105 PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59);
106 PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61);
107 PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
108 PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
109 PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
110
111 struct resource pxa168_resource_gpio[] = {
112 {
113 .start = 0xd4019000,
114 .end = 0xd4019fff,
115 .flags = IORESOURCE_MEM,
116 }, {
117 .start = IRQ_PXA168_GPIOX,
118 .end = IRQ_PXA168_GPIOX,
119 .name = "gpio_mux",
120 .flags = IORESOURCE_IRQ,
121 },
122 };
123
124 struct platform_device pxa168_device_gpio = {
125 .name = "mmp-gpio",
126 .id = -1,
127 .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
128 .resource = pxa168_resource_gpio,
129 };
130
131 struct resource pxa168_usb_host_resources[] = {
132 /* USB Host conroller register base */
133 [0] = {
134 .start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET,
135 .end = PXA168_U2H_REGBASE + USB_REG_RANGE,
136 .flags = IORESOURCE_MEM,
137 .name = "capregs",
138 },
139 /* USB PHY register base */
140 [1] = {
141 .start = PXA168_U2H_PHYBASE,
142 .end = PXA168_U2H_PHYBASE + USB_PHY_RANGE,
143 .flags = IORESOURCE_MEM,
144 .name = "phyregs",
145 },
146 [2] = {
147 .start = IRQ_PXA168_USB2,
148 .end = IRQ_PXA168_USB2,
149 .flags = IORESOURCE_IRQ,
150 },
151 };
152
153 static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32);
154 struct platform_device pxa168_device_usb_host = {
155 .name = "pxa-sph",
156 .id = -1,
157 .dev = {
158 .dma_mask = &pxa168_usb_host_dmamask,
159 .coherent_dma_mask = DMA_BIT_MASK(32),
160 },
161
162 .num_resources = ARRAY_SIZE(pxa168_usb_host_resources),
163 .resource = pxa168_usb_host_resources,
164 };
165
pxa168_add_usb_host(struct mv_usb_platform_data * pdata)166 int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata)
167 {
168 pxa168_device_usb_host.dev.platform_data = pdata;
169 return platform_device_register(&pxa168_device_usb_host);
170 }
171
pxa168_restart(enum reboot_mode mode,const char * cmd)172 void pxa168_restart(enum reboot_mode mode, const char *cmd)
173 {
174 soft_restart(0xffff0000);
175 }
176