1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * linux/arch/arm/mach-mmp/pxa910.c
4 *
5 * Code specific to PXA910
6 */
7 #include <linux/clk/mmp.h>
8 #include <linux/module.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/list.h>
12 #include <linux/io.h>
13 #include <linux/irq.h>
14 #include <linux/irqchip/mmp.h>
15 #include <linux/platform_device.h>
16
17 #include <asm/hardware/cache-tauros2.h>
18 #include <asm/mach/time.h>
19 #include "addr-map.h"
20 #include "regs-apbc.h"
21 #include <linux/soc/mmp/cputype.h>
22 #include "irqs.h"
23 #include "mfp.h"
24 #include "devices.h"
25 #include "pm-pxa910.h"
26 #include "pxa910.h"
27
28 #include "common.h"
29
30 #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
31
32 static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
33 {
34 MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
35 MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
36 MFP_ADDR_X(GPIO100, GPIO109, 0x238),
37
38 MFP_ADDR(GPIO123, 0xcc),
39 MFP_ADDR(GPIO124, 0xd0),
40
41 MFP_ADDR(DF_IO0, 0x40),
42 MFP_ADDR(DF_IO1, 0x3c),
43 MFP_ADDR(DF_IO2, 0x38),
44 MFP_ADDR(DF_IO3, 0x34),
45 MFP_ADDR(DF_IO4, 0x30),
46 MFP_ADDR(DF_IO5, 0x2c),
47 MFP_ADDR(DF_IO6, 0x28),
48 MFP_ADDR(DF_IO7, 0x24),
49 MFP_ADDR(DF_IO8, 0x20),
50 MFP_ADDR(DF_IO9, 0x1c),
51 MFP_ADDR(DF_IO10, 0x18),
52 MFP_ADDR(DF_IO11, 0x14),
53 MFP_ADDR(DF_IO12, 0x10),
54 MFP_ADDR(DF_IO13, 0xc),
55 MFP_ADDR(DF_IO14, 0x8),
56 MFP_ADDR(DF_IO15, 0x4),
57
58 MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
59 MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
60 MFP_ADDR(SM_nCS0, 0x4c),
61 MFP_ADDR(SM_nCS1, 0x50),
62 MFP_ADDR(DF_WEn, 0x54),
63 MFP_ADDR(DF_REn, 0x58),
64 MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
65 MFP_ADDR(DF_ALE_SM_WEn, 0x60),
66 MFP_ADDR(SM_SCLK, 0x64),
67 MFP_ADDR(DF_RDY0, 0x68),
68 MFP_ADDR(SM_BE0, 0x6c),
69 MFP_ADDR(SM_BE1, 0x70),
70 MFP_ADDR(SM_ADV, 0x74),
71 MFP_ADDR(DF_RDY1, 0x78),
72 MFP_ADDR(SM_ADVMUX, 0x7c),
73 MFP_ADDR(SM_RDY, 0x80),
74
75 MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
76
77 MFP_ADDR_END,
78 };
79
pxa910_init_irq(void)80 void __init pxa910_init_irq(void)
81 {
82 icu_init_irq();
83 #ifdef CONFIG_PM
84 icu_irq_chip.irq_set_wake = pxa910_set_wake;
85 #endif
86 }
87
pxa910_init(void)88 static int __init pxa910_init(void)
89 {
90 if (cpu_is_pxa910()) {
91 #ifdef CONFIG_CACHE_TAUROS2
92 tauros2_init(0);
93 #endif
94 mfp_init_base(MFPR_VIRT_BASE);
95 mfp_init_addr(pxa910_mfp_addr_map);
96 pxa910_clk_init(APB_PHYS_BASE + 0x50000,
97 AXI_PHYS_BASE + 0x82800,
98 APB_PHYS_BASE + 0x15000,
99 APB_PHYS_BASE + 0x3b000);
100 }
101
102 return 0;
103 }
104 postcore_initcall(pxa910_init);
105
106 /* system timer - clock enabled, 3.25MHz */
107 #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
108 #define APBC_TIMERS APBC_REG(0x34)
109
pxa910_timer_init(void)110 void __init pxa910_timer_init(void)
111 {
112 /* reset and configure */
113 __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS);
114 __raw_writel(TIMER_CLK_RST, APBC_TIMERS);
115
116 mmp_timer_init(IRQ_PXA910_AP1_TIMER1, 3250000);
117 }
118
119 /* on-chip devices */
120
121 /* NOTE: there are totally 3 UARTs on PXA910:
122 *
123 * UART1 - Slow UART (can be used both by AP and CP)
124 * UART2/3 - Fast UART
125 *
126 * To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
127 * they are re-ordered as:
128 *
129 * pxa910_device_uart1 - UART2 as FFUART
130 * pxa910_device_uart2 - UART3 as BTUART
131 *
132 * UART1 is not used by AP for the moment.
133 */
134 PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
135 PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
136 PXA910_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28);
137 PXA910_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28);
138 PXA910_DEVICE(pwm1, "pxa910-pwm", 0, NONE, 0xd401a000, 0x10);
139 PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
140 PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
141 PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
142 PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
143 PXA910_DEVICE(disp, "mmp-disp", 0, LCD, 0xd420b000, 0x1ec);
144 PXA910_DEVICE(fb, "mmp-fb", -1, NONE, 0, 0);
145 PXA910_DEVICE(panel, "tpo-hvga", -1, NONE, 0, 0);
146
147 struct resource pxa910_resource_gpio[] = {
148 {
149 .start = 0xd4019000,
150 .end = 0xd4019fff,
151 .flags = IORESOURCE_MEM,
152 }, {
153 .start = IRQ_PXA910_AP_GPIO,
154 .end = IRQ_PXA910_AP_GPIO,
155 .name = "gpio_mux",
156 .flags = IORESOURCE_IRQ,
157 },
158 };
159
160 struct platform_device pxa910_device_gpio = {
161 .name = "mmp-gpio",
162 .id = -1,
163 .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
164 .resource = pxa910_resource_gpio,
165 };
166
167 static struct resource pxa910_resource_rtc[] = {
168 {
169 .start = 0xd4010000,
170 .end = 0xd401003f,
171 .flags = IORESOURCE_MEM,
172 }, {
173 .start = IRQ_PXA910_RTC_INT,
174 .end = IRQ_PXA910_RTC_INT,
175 .name = "rtc 1Hz",
176 .flags = IORESOURCE_IRQ,
177 }, {
178 .start = IRQ_PXA910_RTC_ALARM,
179 .end = IRQ_PXA910_RTC_ALARM,
180 .name = "rtc alarm",
181 .flags = IORESOURCE_IRQ,
182 },
183 };
184
185 struct platform_device pxa910_device_rtc = {
186 .name = "sa1100-rtc",
187 .id = -1,
188 .num_resources = ARRAY_SIZE(pxa910_resource_rtc),
189 .resource = pxa910_resource_rtc,
190 };
191