1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
5 */
6
7 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H
8 #define __LINUX_MTD_SPI_NOR_INTERNAL_H
9
10 #include "sfdp.h"
11
12 #define SPI_NOR_MAX_ID_LEN 6
13
14 enum spi_nor_option_flags {
15 SNOR_F_USE_FSR = BIT(0),
16 SNOR_F_HAS_SR_TB = BIT(1),
17 SNOR_F_NO_OP_CHIP_ERASE = BIT(2),
18 SNOR_F_READY_XSR_RDY = BIT(3),
19 SNOR_F_USE_CLSR = BIT(4),
20 SNOR_F_BROKEN_RESET = BIT(5),
21 SNOR_F_4B_OPCODES = BIT(6),
22 SNOR_F_HAS_4BAIT = BIT(7),
23 SNOR_F_HAS_LOCK = BIT(8),
24 SNOR_F_HAS_16BIT_SR = BIT(9),
25 SNOR_F_NO_READ_CR = BIT(10),
26 SNOR_F_HAS_SR_TB_BIT6 = BIT(11),
27 SNOR_F_HAS_4BIT_BP = BIT(12),
28 SNOR_F_HAS_SR_BP3_BIT6 = BIT(13),
29 SNOR_F_IO_MODE_EN_VOLATILE = BIT(14),
30 SNOR_F_SOFT_RESET = BIT(15),
31 SNOR_F_SWP_IS_VOLATILE = BIT(16),
32 };
33
34 struct spi_nor_read_command {
35 u8 num_mode_clocks;
36 u8 num_wait_states;
37 u8 opcode;
38 enum spi_nor_protocol proto;
39 };
40
41 struct spi_nor_pp_command {
42 u8 opcode;
43 enum spi_nor_protocol proto;
44 };
45
46 enum spi_nor_read_command_index {
47 SNOR_CMD_READ,
48 SNOR_CMD_READ_FAST,
49 SNOR_CMD_READ_1_1_1_DTR,
50
51 /* Dual SPI */
52 SNOR_CMD_READ_1_1_2,
53 SNOR_CMD_READ_1_2_2,
54 SNOR_CMD_READ_2_2_2,
55 SNOR_CMD_READ_1_2_2_DTR,
56
57 /* Quad SPI */
58 SNOR_CMD_READ_1_1_4,
59 SNOR_CMD_READ_1_4_4,
60 SNOR_CMD_READ_4_4_4,
61 SNOR_CMD_READ_1_4_4_DTR,
62
63 /* Octal SPI */
64 SNOR_CMD_READ_1_1_8,
65 SNOR_CMD_READ_1_8_8,
66 SNOR_CMD_READ_8_8_8,
67 SNOR_CMD_READ_1_8_8_DTR,
68 SNOR_CMD_READ_8_8_8_DTR,
69
70 SNOR_CMD_READ_MAX
71 };
72
73 enum spi_nor_pp_command_index {
74 SNOR_CMD_PP,
75
76 /* Quad SPI */
77 SNOR_CMD_PP_1_1_4,
78 SNOR_CMD_PP_1_4_4,
79 SNOR_CMD_PP_4_4_4,
80
81 /* Octal SPI */
82 SNOR_CMD_PP_1_1_8,
83 SNOR_CMD_PP_1_8_8,
84 SNOR_CMD_PP_8_8_8,
85 SNOR_CMD_PP_8_8_8_DTR,
86
87 SNOR_CMD_PP_MAX
88 };
89
90 /**
91 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
92 * @size: the size of the sector/block erased by the erase type.
93 * JEDEC JESD216B imposes erase sizes to be a power of 2.
94 * @size_shift: @size is a power of 2, the shift is stored in
95 * @size_shift.
96 * @size_mask: the size mask based on @size_shift.
97 * @opcode: the SPI command op code to erase the sector/block.
98 * @idx: Erase Type index as sorted in the Basic Flash Parameter
99 * Table. It will be used to synchronize the supported
100 * Erase Types with the ones identified in the SFDP
101 * optional tables.
102 */
103 struct spi_nor_erase_type {
104 u32 size;
105 u32 size_shift;
106 u32 size_mask;
107 u8 opcode;
108 u8 idx;
109 };
110
111 /**
112 * struct spi_nor_erase_command - Used for non-uniform erases
113 * The structure is used to describe a list of erase commands to be executed
114 * once we validate that the erase can be performed. The elements in the list
115 * are run-length encoded.
116 * @list: for inclusion into the list of erase commands.
117 * @count: how many times the same erase command should be
118 * consecutively used.
119 * @size: the size of the sector/block erased by the command.
120 * @opcode: the SPI command op code to erase the sector/block.
121 */
122 struct spi_nor_erase_command {
123 struct list_head list;
124 u32 count;
125 u32 size;
126 u8 opcode;
127 };
128
129 /**
130 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region
131 * @offset: the offset in the data array of erase region start.
132 * LSB bits are used as a bitmask encoding flags to
133 * determine if this region is overlaid, if this region is
134 * the last in the SPI NOR flash memory and to indicate
135 * all the supported erase commands inside this region.
136 * The erase types are sorted in ascending order with the
137 * smallest Erase Type size being at BIT(0).
138 * @size: the size of the region in bytes.
139 */
140 struct spi_nor_erase_region {
141 u64 offset;
142 u64 size;
143 };
144
145 #define SNOR_ERASE_TYPE_MAX 4
146 #define SNOR_ERASE_TYPE_MASK GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0)
147
148 #define SNOR_LAST_REGION BIT(4)
149 #define SNOR_OVERLAID_REGION BIT(5)
150
151 #define SNOR_ERASE_FLAGS_MAX 6
152 #define SNOR_ERASE_FLAGS_MASK GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0)
153
154 /**
155 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map
156 * @regions: array of erase regions. The regions are consecutive in
157 * address space. Walking through the regions is done
158 * incrementally.
159 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform
160 * sector size (legacy implementation).
161 * @erase_type: an array of erase types shared by all the regions.
162 * The erase types are sorted in ascending order, with the
163 * smallest Erase Type size being the first member in the
164 * erase_type array.
165 * @uniform_erase_type: bitmask encoding erase types that can erase the
166 * entire memory. This member is completed at init by
167 * uniform and non-uniform SPI NOR flash memories if they
168 * support at least one erase type that can erase the
169 * entire memory.
170 */
171 struct spi_nor_erase_map {
172 struct spi_nor_erase_region *regions;
173 struct spi_nor_erase_region uniform_region;
174 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX];
175 u8 uniform_erase_type;
176 };
177
178 /**
179 * struct spi_nor_locking_ops - SPI NOR locking methods
180 * @lock: lock a region of the SPI NOR.
181 * @unlock: unlock a region of the SPI NOR.
182 * @is_locked: check if a region of the SPI NOR is completely locked
183 */
184 struct spi_nor_locking_ops {
185 int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
186 int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
187 int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
188 };
189
190 /**
191 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions
192 * @len: size of one OTP region in bytes.
193 * @base: start address of the OTP area.
194 * @offset: offset between consecutive OTP regions if there are more
195 * than one.
196 * @n_regions: number of individual OTP regions.
197 */
198 struct spi_nor_otp_organization {
199 size_t len;
200 loff_t base;
201 loff_t offset;
202 unsigned int n_regions;
203 };
204
205 /**
206 * struct spi_nor_otp_ops - SPI NOR OTP methods
207 * @read: read from the SPI NOR OTP area.
208 * @write: write to the SPI NOR OTP area.
209 * @lock: lock an OTP region.
210 * @erase: erase an OTP region.
211 * @is_locked: check if an OTP region of the SPI NOR is locked.
212 */
213 struct spi_nor_otp_ops {
214 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
215 int (*write)(struct spi_nor *nor, loff_t addr, size_t len,
216 const u8 *buf);
217 int (*lock)(struct spi_nor *nor, unsigned int region);
218 int (*erase)(struct spi_nor *nor, loff_t addr);
219 int (*is_locked)(struct spi_nor *nor, unsigned int region);
220 };
221
222 /**
223 * struct spi_nor_otp - SPI NOR OTP grouping structure
224 * @org: OTP region organization
225 * @ops: OTP access ops
226 */
227 struct spi_nor_otp {
228 const struct spi_nor_otp_organization *org;
229 const struct spi_nor_otp_ops *ops;
230 };
231
232 /**
233 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
234 * Includes legacy flash parameters and settings that can be overwritten
235 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216
236 * Serial Flash Discoverable Parameters (SFDP) tables.
237 *
238 * @size: the flash memory density in bytes.
239 * @writesize Minimal writable flash unit size. Defaults to 1. Set to
240 * ECC unit size for ECC-ed flashes.
241 * @page_size: the page size of the SPI NOR flash memory.
242 * @rdsr_dummy: dummy cycles needed for Read Status Register command.
243 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register
244 * command.
245 * @hwcaps: describes the read and page program hardware
246 * capabilities.
247 * @reads: read capabilities ordered by priority: the higher index
248 * in the array, the higher priority.
249 * @page_programs: page program capabilities ordered by priority: the
250 * higher index in the array, the higher priority.
251 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter
252 * Table.
253 * @otp_info: describes the OTP regions.
254 * @octal_dtr_enable: enables SPI NOR octal DTR mode.
255 * @quad_enable: enables SPI NOR quad mode.
256 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
257 * @convert_addr: converts an absolute address into something the flash
258 * will understand. Particularly useful when pagesize is
259 * not a power-of-2.
260 * @setup: configures the SPI NOR memory. Useful for SPI NOR
261 * flashes that have peculiarities to the SPI NOR standard
262 * e.g. different opcodes, specific address calculation,
263 * page size, etc.
264 * @locking_ops: SPI NOR locking methods.
265 * @otp: SPI NOR OTP methods.
266 */
267 struct spi_nor_flash_parameter {
268 u64 size;
269 u32 writesize;
270 u32 page_size;
271 u8 rdsr_dummy;
272 u8 rdsr_addr_nbytes;
273
274 struct spi_nor_hwcaps hwcaps;
275 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
276 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
277
278 struct spi_nor_erase_map erase_map;
279 struct spi_nor_otp otp;
280
281 int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
282 int (*quad_enable)(struct spi_nor *nor);
283 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
284 u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
285 int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
286
287 const struct spi_nor_locking_ops *locking_ops;
288 };
289
290 /**
291 * struct spi_nor_fixups - SPI NOR fixup hooks
292 * @default_init: called after default flash parameters init. Used to tweak
293 * flash parameters when information provided by the flash_info
294 * table is incomplete or wrong.
295 * @post_bfpt: called after the BFPT table has been parsed
296 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs
297 * that do not support RDSFDP). Typically used to tweak various
298 * parameters that could not be extracted by other means (i.e.
299 * when information provided by the SFDP/flash_info tables are
300 * incomplete or wrong).
301 *
302 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP
303 * table is broken or not available.
304 */
305 struct spi_nor_fixups {
306 void (*default_init)(struct spi_nor *nor);
307 int (*post_bfpt)(struct spi_nor *nor,
308 const struct sfdp_parameter_header *bfpt_header,
309 const struct sfdp_bfpt *bfpt);
310 void (*post_sfdp)(struct spi_nor *nor);
311 };
312
313 struct flash_info {
314 char *name;
315
316 /*
317 * This array stores the ID bytes.
318 * The first three bytes are the JEDIC ID.
319 * JEDEC ID zero means "no ID" (mostly older chips).
320 */
321 u8 id[SPI_NOR_MAX_ID_LEN];
322 u8 id_len;
323
324 /* The size listed here is what works with SPINOR_OP_SE, which isn't
325 * necessarily called a "sector" by the vendor.
326 */
327 unsigned sector_size;
328 u16 n_sectors;
329
330 u16 page_size;
331 u16 addr_width;
332
333 u32 flags;
334 #define SECT_4K BIT(0) /* SPINOR_OP_BE_4K works uniformly */
335 #define SPI_NOR_NO_ERASE BIT(1) /* No erase command needed */
336 #define SST_WRITE BIT(2) /* use SST byte programming */
337 #define SPI_NOR_NO_FR BIT(3) /* Can't do fastread */
338 #define SECT_4K_PMC BIT(4) /* SPINOR_OP_BE_4K_PMC works uniformly */
339 #define SPI_NOR_DUAL_READ BIT(5) /* Flash supports Dual Read */
340 #define SPI_NOR_QUAD_READ BIT(6) /* Flash supports Quad Read */
341 #define USE_FSR BIT(7) /* use flag status register */
342 #define SPI_NOR_HAS_LOCK BIT(8) /* Flash supports lock/unlock via SR */
343 #define SPI_NOR_HAS_TB BIT(9) /*
344 * Flash SR has Top/Bottom (TB) protect
345 * bit. Must be used with
346 * SPI_NOR_HAS_LOCK.
347 */
348 #define SPI_NOR_XSR_RDY BIT(10) /*
349 * S3AN flashes have specific opcode to
350 * read the status register.
351 */
352 #define SPI_NOR_4B_OPCODES BIT(11) /*
353 * Use dedicated 4byte address op codes
354 * to support memory size above 128Mib.
355 */
356 #define NO_CHIP_ERASE BIT(12) /* Chip does not support chip erase */
357 #define SPI_NOR_SKIP_SFDP BIT(13) /* Skip parsing of SFDP tables */
358 #define USE_CLSR BIT(14) /* use CLSR command */
359 #define SPI_NOR_OCTAL_READ BIT(15) /* Flash supports Octal Read */
360 #define SPI_NOR_TB_SR_BIT6 BIT(16) /*
361 * Top/Bottom (TB) is bit 6 of
362 * status register. Must be used with
363 * SPI_NOR_HAS_TB.
364 */
365 #define SPI_NOR_4BIT_BP BIT(17) /*
366 * Flash SR has 4 bit fields (BP0-3)
367 * for block protection.
368 */
369 #define SPI_NOR_BP3_SR_BIT6 BIT(18) /*
370 * BP3 is bit 6 of status register.
371 * Must be used with SPI_NOR_4BIT_BP.
372 */
373 #define SPI_NOR_OCTAL_DTR_READ BIT(19) /* Flash supports octal DTR Read. */
374 #define SPI_NOR_OCTAL_DTR_PP BIT(20) /* Flash supports Octal DTR Page Program */
375 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(21) /*
376 * Flash enables the best
377 * available I/O mode via a
378 * volatile bit.
379 */
380 #define SPI_NOR_SWP_IS_VOLATILE BIT(22) /*
381 * Flash has volatile software write
382 * protection bits. Usually these will
383 * power-up in a write-protected state.
384 */
385
386 const struct spi_nor_otp_organization otp_org;
387
388 /* Part specific fixup hooks. */
389 const struct spi_nor_fixups *fixups;
390 };
391
392 /* Used when the "_ext_id" is two bytes at most */
393 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
394 .id = { \
395 ((_jedec_id) >> 16) & 0xff, \
396 ((_jedec_id) >> 8) & 0xff, \
397 (_jedec_id) & 0xff, \
398 ((_ext_id) >> 8) & 0xff, \
399 (_ext_id) & 0xff, \
400 }, \
401 .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
402 .sector_size = (_sector_size), \
403 .n_sectors = (_n_sectors), \
404 .page_size = 256, \
405 .flags = (_flags),
406
407 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
408 .id = { \
409 ((_jedec_id) >> 16) & 0xff, \
410 ((_jedec_id) >> 8) & 0xff, \
411 (_jedec_id) & 0xff, \
412 ((_ext_id) >> 16) & 0xff, \
413 ((_ext_id) >> 8) & 0xff, \
414 (_ext_id) & 0xff, \
415 }, \
416 .id_len = 6, \
417 .sector_size = (_sector_size), \
418 .n_sectors = (_n_sectors), \
419 .page_size = 256, \
420 .flags = (_flags),
421
422 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width, _flags) \
423 .sector_size = (_sector_size), \
424 .n_sectors = (_n_sectors), \
425 .page_size = (_page_size), \
426 .addr_width = (_addr_width), \
427 .flags = (_flags),
428
429 #define S3AN_INFO(_jedec_id, _n_sectors, _page_size) \
430 .id = { \
431 ((_jedec_id) >> 16) & 0xff, \
432 ((_jedec_id) >> 8) & 0xff, \
433 (_jedec_id) & 0xff \
434 }, \
435 .id_len = 3, \
436 .sector_size = (8*_page_size), \
437 .n_sectors = (_n_sectors), \
438 .page_size = _page_size, \
439 .addr_width = 3, \
440 .flags = SPI_NOR_NO_FR | SPI_NOR_XSR_RDY,
441
442 #define OTP_INFO(_len, _n_regions, _base, _offset) \
443 .otp_org = { \
444 .len = (_len), \
445 .base = (_base), \
446 .offset = (_offset), \
447 .n_regions = (_n_regions), \
448 },
449
450 /**
451 * struct spi_nor_manufacturer - SPI NOR manufacturer object
452 * @name: manufacturer name
453 * @parts: array of parts supported by this manufacturer
454 * @nparts: number of entries in the parts array
455 * @fixups: hooks called at various points in time during spi_nor_scan()
456 */
457 struct spi_nor_manufacturer {
458 const char *name;
459 const struct flash_info *parts;
460 unsigned int nparts;
461 const struct spi_nor_fixups *fixups;
462 };
463
464 /**
465 * struct sfdp - SFDP data
466 * @num_dwords: number of entries in the dwords array
467 * @dwords: array of double words of the SFDP data
468 */
469 struct sfdp {
470 size_t num_dwords;
471 u32 *dwords;
472 };
473
474 /* Manufacturer drivers. */
475 extern const struct spi_nor_manufacturer spi_nor_atmel;
476 extern const struct spi_nor_manufacturer spi_nor_catalyst;
477 extern const struct spi_nor_manufacturer spi_nor_eon;
478 extern const struct spi_nor_manufacturer spi_nor_esmt;
479 extern const struct spi_nor_manufacturer spi_nor_everspin;
480 extern const struct spi_nor_manufacturer spi_nor_fujitsu;
481 extern const struct spi_nor_manufacturer spi_nor_gigadevice;
482 extern const struct spi_nor_manufacturer spi_nor_intel;
483 extern const struct spi_nor_manufacturer spi_nor_issi;
484 extern const struct spi_nor_manufacturer spi_nor_macronix;
485 extern const struct spi_nor_manufacturer spi_nor_micron;
486 extern const struct spi_nor_manufacturer spi_nor_st;
487 extern const struct spi_nor_manufacturer spi_nor_spansion;
488 extern const struct spi_nor_manufacturer spi_nor_sst;
489 extern const struct spi_nor_manufacturer spi_nor_winbond;
490 extern const struct spi_nor_manufacturer spi_nor_xilinx;
491 extern const struct spi_nor_manufacturer spi_nor_xmc;
492
493 extern const struct attribute_group *spi_nor_sysfs_groups[];
494
495 void spi_nor_spimem_setup_op(const struct spi_nor *nor,
496 struct spi_mem_op *op,
497 const enum spi_nor_protocol proto);
498 int spi_nor_write_enable(struct spi_nor *nor);
499 int spi_nor_write_disable(struct spi_nor *nor);
500 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
501 int spi_nor_write_ear(struct spi_nor *nor, u8 ear);
502 int spi_nor_wait_till_ready(struct spi_nor *nor);
503 int spi_nor_global_block_unlock(struct spi_nor *nor);
504 int spi_nor_lock_and_prep(struct spi_nor *nor);
505 void spi_nor_unlock_and_unprep(struct spi_nor *nor);
506 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor);
507 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor);
508 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor);
509 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);
510 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);
511 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);
512 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
513 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);
514
515 int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr);
516 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
517 u8 *buf);
518 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
519 const u8 *buf);
520 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr);
521
522 int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
523 int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,
524 const u8 *buf);
525 int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr);
526 int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);
527 int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);
528
529 int spi_nor_hwcaps_read2cmd(u32 hwcaps);
530 u8 spi_nor_convert_3to4_read(u8 opcode);
531 void spi_nor_set_read_settings(struct spi_nor_read_command *read,
532 u8 num_mode_clocks,
533 u8 num_wait_states,
534 u8 opcode,
535 enum spi_nor_protocol proto);
536 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,
537 enum spi_nor_protocol proto);
538
539 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size,
540 u8 opcode);
541 struct spi_nor_erase_region *
542 spi_nor_region_next(struct spi_nor_erase_region *region);
543 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map,
544 u8 erase_mask, u64 flash_size);
545
546 int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
547 const struct sfdp_parameter_header *bfpt_header,
548 const struct sfdp_bfpt *bfpt);
549
550 void spi_nor_init_default_locking_ops(struct spi_nor *nor);
551 void spi_nor_try_unlock_all(struct spi_nor *nor);
552 void spi_nor_register_locking_ops(struct spi_nor *nor);
553 void spi_nor_otp_init(struct spi_nor *nor);
554
mtd_to_spi_nor(struct mtd_info * mtd)555 static struct spi_nor __maybe_unused *mtd_to_spi_nor(struct mtd_info *mtd)
556 {
557 return mtd->priv;
558 }
559
560 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */
561