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Searched defs:reg (Results 1 – 25 of 909) sorted by relevance

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/u-boot/drivers/video/exynos/
A Dexynos_dp_lowlevel.c24 unsigned int reg; in exynos_dp_enable_video_input() local
41 unsigned int reg; in exynos_dp_enable_video_bist() local
57 unsigned int reg; in exynos_dp_enable_video_mute() local
72 unsigned int reg; in exynos_dp_init_analog_param() local
175 unsigned int reg; in exynos_dp_enable_sw_func() local
191 unsigned int reg; in exynos_dp_set_analog_power_down() local
244 unsigned int reg; in exynos_dp_get_pll_lock_status() local
257 unsigned int reg; in exynos_dp_set_pll_power() local
272 unsigned int reg; in exynos_dp_init_analog_func() local
321 unsigned int reg; in exynos_dp_init_hpd() local
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A Dexynos_mipi_dsi_lowlevel.c21 unsigned int reg; in exynos_mipi_dsi_func_reset() local
35 unsigned int reg = 0; in exynos_mipi_dsi_sw_reset() local
77 unsigned int reg; in exynos_mipi_dsi_init_fifo_pointer() local
105 unsigned int reg; in exynos_mipi_dsi_set_main_disp_resol() local
124 unsigned int reg; in exynos_mipi_dsi_set_main_disp_vporch() local
142 unsigned int reg; in exynos_mipi_dsi_set_main_disp_hporch() local
157 unsigned int reg; in exynos_mipi_dsi_set_main_disp_sync_area() local
173 unsigned int reg; in exynos_mipi_dsi_set_sub_disp_resol() local
220 u32 reg = (readl(&mipi_dsim->config)) & in exynos_mipi_dsi_display_config() local
245 unsigned int reg; in exynos_mipi_dsi_enable_lane() local
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/u-boot/arch/x86/cpu/quark/
A Dmsg_port.c11 void msg_port_setup(int op, int port, int reg) in msg_port_setup()
18 u32 msg_port_read(u8 port, u32 reg) in msg_port_read()
30 void msg_port_write(u8 port, u32 reg, u32 value) in msg_port_write()
38 u32 msg_port_alt_read(u8 port, u32 reg) in msg_port_alt_read()
50 void msg_port_alt_write(u8 port, u32 reg, u32 value) in msg_port_alt_write()
58 u32 msg_port_io_read(u8 port, u32 reg) in msg_port_io_read()
70 void msg_port_io_write(u8 port, u32 reg, u32 value) in msg_port_io_write()
/u-boot/arch/x86/include/asm/arch-quark/
A Dmsg_port.h108 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ argument
113 #define msg_port_clrbits(port, reg, clr) \ argument
115 #define msg_port_setbits(port, reg, set) \ argument
117 #define msg_port_clrsetbits(port, reg, clr, set) \ argument
120 #define msg_port_alt_clrbits(port, reg, clr) \ argument
122 #define msg_port_alt_setbits(port, reg, set) \ argument
124 #define msg_port_alt_clrsetbits(port, reg, clr, set) \ argument
127 #define msg_port_io_clrbits(port, reg, clr) \ argument
129 #define msg_port_io_setbits(port, reg, set) \ argument
131 #define msg_port_io_clrsetbits(port, reg, clr, set) \ argument
/u-boot/arch/riscv/lib/
A Dsetjmp.S10 #define STORE_IDX(reg, idx) sd reg, (idx*8)(a0) argument
11 #define LOAD_IDX(reg, idx) ld reg, (idx*8)(a0) argument
13 #define STORE_IDX(reg, idx) sw reg, (idx*4)(a0) argument
14 #define LOAD_IDX(reg, idx) lw reg, (idx*4)(a0) argument
A Dcrt0_riscv_efi.S15 #define SAVE_LONG(reg, idx) sd reg, (idx*SIZE_LONG)(sp) argument
16 #define LOAD_LONG(reg, idx) ld reg, (idx*SIZE_LONG)(sp) argument
21 #define SAVE_LONG(reg, idx) sw reg, (idx*SIZE_LONG)(sp) argument
22 #define LOAD_LONG(reg, idx) lw reg, (idx*SIZE_LONG)(sp) argument
/u-boot/drivers/clk/at91/
A Dclk-main.c36 void __iomem *reg; member
43 void __iomem *reg; member
50 void __iomem *reg; member
63 void __iomem *reg = main_rc->reg; in main_rc_enable() local
87 struct reg *reg = main_rc->reg; in main_rc_disable() local
144 void __iomem *reg = main->reg; in clk_main_osc_enable() local
171 void __iomem *reg = main->reg; in clk_main_osc_disable() local
232 static int clk_main_probe_frequency(void __iomem *reg) in clk_main_probe_frequency()
293 static inline bool clk_sam9x5_main_ready(void __iomem *reg) in clk_sam9x5_main_ready()
305 void __iomem *reg = main->reg; in clk_sam9x5_main_enable() local
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/u-boot/arch/arm/mach-socfpga/
A Dclock_manager_gen5.c347 u32 reg, clock; in cm_get_main_vco_clk_hz() local
362 u32 reg, clock = 0; in cm_get_per_vco_clk_hz() local
387 u32 reg, clock; in cm_get_mpu_clk_hz() local
401 u32 reg, clock = 0; in cm_get_sdram_clk_hz() local
432 u32 reg, clock = 0; in cm_get_l4_sp_clk_hz() local
469 u32 reg, clock = 0; in cm_get_mmc_controller_clk_hz() local
501 u32 reg, clock = 0; in cm_get_qspi_controller_clk_hz() local
531 u32 reg, clock = 0; in cm_get_spi_controller_clk_hz() local
/u-boot/drivers/clk/imx/
A Dclk.h58 void __iomem *reg, u8 shift) in imx_clk_gate2()
65 void __iomem *reg, u8 shift) in imx_clk_gate4()
73 const char *parent, void __iomem *reg, u8 shift, in imx_clk_gate4_flags()
89 void __iomem *reg, u8 shift, u8 width) in imx_clk_divider()
104 void __iomem *reg, u8 shift, u8 width) in imx_clk_divider2()
119 void __iomem *reg, u8 shift, u8 width, in imx_clk_mux_flags()
129 void __iomem *reg, u8 shift, u8 width, in imx_clk_mux2_flags()
167 void __iomem *reg, u8 shift) in imx_clk_gate()
174 void __iomem *reg, u8 shift, unsigned long flags) in imx_clk_gate_flags()
181 void __iomem *reg, u8 shift) in imx_clk_gate3()
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/u-boot/drivers/misc/
A Dsmsc_sio1007.c11 static inline u8 sio1007_read(int port, int reg) in sio1007_read()
18 static inline void sio1007_write(int port, int reg, int val) in sio1007_write()
24 static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set) in sio1007_clrsetbits()
69 int reg = GPIO0_DIR; in sio1007_gpio_config() local
92 int reg = GPIO0_DATA; in sio1007_gpio_get_value() local
111 int reg = GPIO0_DATA; in sio1007_gpio_set_value() local
/u-boot/drivers/rtc/
A Drtc-uclass.c43 int dm_rtc_read(struct udevice *dev, unsigned int reg, u8 *buf, unsigned int len) in dm_rtc_read()
62 int dm_rtc_write(struct udevice *dev, unsigned int reg, in dm_rtc_write()
81 int rtc_read8(struct udevice *dev, unsigned int reg) in rtc_read8()
99 int rtc_write8(struct udevice *dev, unsigned int reg, int val) in rtc_write8()
114 int rtc_read16(struct udevice *dev, unsigned int reg, u16 *valuep) in rtc_read16()
131 int rtc_write16(struct udevice *dev, unsigned int reg, u16 value) in rtc_write16()
144 int rtc_read32(struct udevice *dev, unsigned int reg, u32 *valuep) in rtc_read32()
161 int rtc_write32(struct udevice *dev, unsigned int reg, u32 value) in rtc_write32()
/u-boot/board/freescale/t208xrdb/
A Dcpld.c12 u8 cpld_read(unsigned int reg) in cpld_read()
19 void cpld_write(unsigned int reg, u8 value) in cpld_write()
29 u8 reg = CPLD_READ(flash_csr); in cpld_set_altbank() local
39 u8 reg = CPLD_READ(flash_csr); in cpld_set_defbank() local
/u-boot/arch/arm/mach-imx/mx7ulp/
A Dpcc.c84 u32 reg, val; in pcc_clock_enable() local
114 u32 reg, val, i, clksrc_type; in pcc_clock_sel() local
163 u32 reg, val; in pcc_clock_div_config() local
199 u32 reg, val; in pcc_clock_is_enable() local
215 u32 reg, val, clksrc_type; in pcc_clock_get_clksrc() local
256 u32 reg, val, rate, frac, div; in pcc_clock_get_rate() local
A Dscg.c20 u32 reg; in scg_src_get_rate() local
56 u32 reg, val, rate; in scg_sircdiv_get_rate() local
94 u32 reg, val, rate; in scg_fircdiv_get_rate() local
132 u32 reg, val, rate; in scg_soscdiv_get_rate() local
170 u32 reg, val, rate; in scg_apll_pfd_get_rate() local
220 u32 reg, val, rate; in scg_spll_pfd_get_rate() local
270 u32 reg, val, rate; in scg_apll_get_rate() local
298 u32 reg, val, rate; in scg_spll_get_rate() local
438 u32 reg, val, rate; in scg_sys_get_rate() local
633 u32 reg; in scg_enable_pll_pfd() local
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/u-boot/arch/arm/mach-imx/mx6/
A Dclock.c31 u32 reg; in enable_ocotp_clk() local
85 u32 reg; in enable_usboh3_clk() local
158 u32 reg; in enable_i2c_clk() local
198 u32 reg; in enable_spi_clk() local
556 u32 reg = 0; in enable_pll_video() local
621 u32 reg = 0; in mxs_set_lcdclk() local
1160 u32 reg; in hab_caam_clock_enable() local
1227 u32 reg; in enable_eim_clk() local
1348 int reg; in disable_ldb_di_clock_sources() local
1373 int reg; in enable_ldb_di_clock_sources() local
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/u-boot/board/freescale/ls1043ardb/
A Dcpld.c13 u8 cpld_read(unsigned int reg) in cpld_read()
20 void cpld_write(unsigned int reg, u8 value) in cpld_write()
30 u16 reg = CPLD_CFG_RCW_SRC_NOR; in cpld_set_altbank() local
52 u16 reg = CPLD_CFG_RCW_SRC_NOR; in cpld_set_defbank() local
71 u16 reg = CPLD_CFG_RCW_SRC_NAND; in cpld_set_nand() local
87 u16 reg = CPLD_CFG_RCW_SRC_SD; in cpld_set_sd() local
/u-boot/board/freescale/t102xrdb/
A Dcpld.c15 u8 cpld_read(unsigned int reg) in cpld_read()
22 void cpld_write(unsigned int reg, u8 value) in cpld_write()
34 u8 reg = CPLD_READ(flash_csr); in cpld_set_altbank() local
47 u8 reg = CPLD_READ(flash_csr); in cpld_set_defbank() local
/u-boot/board/freescale/t104xrdb/
A Dcpld.c19 u8 cpld_read(unsigned int reg) in cpld_read()
26 void cpld_write(unsigned int reg, u8 value) in cpld_write()
38 u8 reg = CPLD_READ(flash_ctl_status); in cpld_set_altbank() local
51 u8 reg = CPLD_READ(flash_ctl_status); in cpld_set_defbank() local
/u-boot/arch/arm/mach-tegra/
A Dpinmux-common.c160 u32 *reg = MUX_REG(pin); in pinmux_set_func() local
192 u32 *reg = PULL_REG(pin); in pinmux_set_pullupdown() local
207 u32 *reg = TRI_REG(pin); in pinmux_set_tristate() local
235 u32 *reg = REG(pin); in pinmux_set_io() local
257 u32 *reg = REG(pin); in pinmux_set_lock() local
284 u32 *reg = REG(pin); in pinmux_set_od() local
309 u32 *reg = REG(pin); in pinmux_set_ioreset() local
334 u32 *reg = REG(pin); in pinmux_set_rcv_sel() local
359 u32 *reg = REG(pin); in pinmux_set_e_io_hv() local
383 u32 *reg = REG(grp); in pinmux_set_schmt() local
[all …]
/u-boot/arch/arm/mach-tegra/tegra114/
A Dcpu.c24 u32 reg; in enable_cpu_power_rail() local
57 u32 reg; in enable_cpu_clocks() local
81 u32 reg; in remove_cpu_resets() local
191 u32 reg; in is_partition_powered() local
201 u32 reg; in is_clamp_enabled() local
/u-boot/arch/arm/mach-nexell/
A Dnx_sec_reg.c27 int write_sec_reg_by_id(void __iomem *reg, int val, int id) in write_sec_reg_by_id()
47 int read_sec_reg_by_id(void __iomem *reg, int id) in read_sec_reg_by_id()
67 int write_sec_reg(void __iomem *reg, int val) in write_sec_reg()
76 int read_sec_reg(void __iomem *reg) in read_sec_reg()
/u-boot/board/freescale/ls1046ardb/
A Dcpld.c13 u8 cpld_read(unsigned int reg) in cpld_read()
20 void cpld_write(unsigned int reg, u8 value) in cpld_write()
30 u16 reg = CPLD_CFG_RCW_SRC_QSPI; in cpld_set_altbank() local
52 u16 reg = CPLD_CFG_RCW_SRC_QSPI; in cpld_set_defbank() local
71 u16 reg = CPLD_CFG_RCW_SRC_SD; in cpld_set_sd() local
/u-boot/arch/arm/mach-sunxi/
A Dpmic_bus.c63 int pmic_bus_read(u8 reg, u8 *data) in pmic_bus_read()
82 int pmic_bus_write(u8 reg, u8 data) in pmic_bus_write()
101 int pmic_bus_setbits(u8 reg, u8 bits) in pmic_bus_setbits()
117 int pmic_bus_clrbits(u8 reg, u8 bits) in pmic_bus_clrbits()
/u-boot/drivers/i2c/
A Docores_i2c.c87 static void oc_setreg_8(struct ocores_i2c_bus *i2c, int reg, u8 value) in oc_setreg_8()
92 static void oc_setreg_16(struct ocores_i2c_bus *i2c, int reg, u8 value) in oc_setreg_16()
97 static void oc_setreg_32(struct ocores_i2c_bus *i2c, int reg, u8 value) in oc_setreg_32()
112 static inline u8 oc_getreg_8(struct ocores_i2c_bus *i2c, int reg) in oc_getreg_8()
117 static inline u8 oc_getreg_16(struct ocores_i2c_bus *i2c, int reg) in oc_getreg_16()
122 static inline u8 oc_getreg_32(struct ocores_i2c_bus *i2c, int reg) in oc_getreg_32()
127 static inline u8 oc_getreg_16be(struct ocores_i2c_bus *i2c, int reg) in oc_getreg_16be()
132 static inline u8 oc_getreg_32be(struct ocores_i2c_bus *i2c, int reg) in oc_getreg_32be()
142 static inline u8 oc_getreg(struct ocores_i2c_bus *i2c, int reg) in oc_getreg()
248 int reg, u8 mask, u8 val, in ocores_wait()
[all …]
/u-boot/drivers/mmc/
A Dbcm2835_sdhci.c72 int reg) in bcm2835_sdhci_raw_writel()
94 static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg) in bcm2835_sdhci_raw_readl()
99 static void bcm2835_sdhci_writel(struct sdhci_host *host, u32 val, int reg) in bcm2835_sdhci_writel()
104 static void bcm2835_sdhci_writew(struct sdhci_host *host, u16 val, int reg) in bcm2835_sdhci_writew()
120 static void bcm2835_sdhci_writeb(struct sdhci_host *host, u8 val, int reg) in bcm2835_sdhci_writeb()
131 static u32 bcm2835_sdhci_readl(struct sdhci_host *host, int reg) in bcm2835_sdhci_readl()
138 static u16 bcm2835_sdhci_readw(struct sdhci_host *host, int reg) in bcm2835_sdhci_readw()
148 static u8 bcm2835_sdhci_readb(struct sdhci_host *host, int reg) in bcm2835_sdhci_readb()

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