1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020  Realtek Corporation
3  */
4 
5 #include "debug.h"
6 #include "sar.h"
7 
rtw89_query_sar_config_common(struct rtw89_dev * rtwdev,s32 * cfg)8 static int rtw89_query_sar_config_common(struct rtw89_dev *rtwdev, s32 *cfg)
9 {
10 	struct rtw89_sar_cfg_common *rtwsar = &rtwdev->sar.cfg_common;
11 	enum rtw89_subband subband = rtwdev->hal.current_subband;
12 
13 	if (!rtwsar->set[subband])
14 		return -ENODATA;
15 
16 	*cfg = rtwsar->cfg[subband];
17 	return 0;
18 }
19 
20 static const
21 struct rtw89_sar_handler rtw89_sar_handlers[RTW89_SAR_SOURCE_NR] = {
22 	[RTW89_SAR_SOURCE_COMMON] = {
23 		.descr_sar_source = "RTW89_SAR_SOURCE_COMMON",
24 		.txpwr_factor_sar = 2,
25 		.query_sar_config = rtw89_query_sar_config_common,
26 	},
27 };
28 
29 #define rtw89_sar_set_src(_dev, _src, _cfg_name, _cfg_data)		\
30 	do {								\
31 		typeof(_src) _s = (_src);				\
32 		typeof(_dev) _d = (_dev);				\
33 		BUILD_BUG_ON(!rtw89_sar_handlers[_s].descr_sar_source);	\
34 		BUILD_BUG_ON(!rtw89_sar_handlers[_s].query_sar_config);	\
35 		lockdep_assert_held(&_d->mutex);			\
36 		_d->sar._cfg_name = *(_cfg_data);			\
37 		_d->sar.src = _s;					\
38 	} while (0)
39 
rtw89_txpwr_sar_to_mac(struct rtw89_dev * rtwdev,u8 fct,s32 cfg)40 static s8 rtw89_txpwr_sar_to_mac(struct rtw89_dev *rtwdev, u8 fct, s32 cfg)
41 {
42 	const u8 fct_mac = rtwdev->chip->txpwr_factor_mac;
43 	s32 cfg_mac;
44 
45 	cfg_mac = fct > fct_mac ?
46 		  cfg >> (fct - fct_mac) : cfg << (fct_mac - fct);
47 
48 	return (s8)clamp_t(s32, cfg_mac,
49 			   RTW89_SAR_TXPWR_MAC_MIN,
50 			   RTW89_SAR_TXPWR_MAC_MAX);
51 }
52 
rtw89_query_sar(struct rtw89_dev * rtwdev)53 s8 rtw89_query_sar(struct rtw89_dev *rtwdev)
54 {
55 	const enum rtw89_sar_sources src = rtwdev->sar.src;
56 	/* its members are protected by rtw89_sar_set_src() */
57 	const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
58 	int ret;
59 	s32 cfg;
60 	u8 fct;
61 
62 	lockdep_assert_held(&rtwdev->mutex);
63 
64 	if (src == RTW89_SAR_SOURCE_NONE)
65 		return RTW89_SAR_TXPWR_MAC_MAX;
66 
67 	ret = sar_hdl->query_sar_config(rtwdev, &cfg);
68 	if (ret)
69 		return RTW89_SAR_TXPWR_MAC_MAX;
70 
71 	fct = sar_hdl->txpwr_factor_sar;
72 
73 	return rtw89_txpwr_sar_to_mac(rtwdev, fct, cfg);
74 }
75 
rtw89_print_sar(struct seq_file * m,struct rtw89_dev * rtwdev)76 void rtw89_print_sar(struct seq_file *m, struct rtw89_dev *rtwdev)
77 {
78 	const enum rtw89_sar_sources src = rtwdev->sar.src;
79 	/* its members are protected by rtw89_sar_set_src() */
80 	const struct rtw89_sar_handler *sar_hdl = &rtw89_sar_handlers[src];
81 	const u8 fct_mac = rtwdev->chip->txpwr_factor_mac;
82 	int ret;
83 	s32 cfg;
84 	u8 fct;
85 
86 	lockdep_assert_held(&rtwdev->mutex);
87 
88 	if (src == RTW89_SAR_SOURCE_NONE) {
89 		seq_puts(m, "no SAR is applied\n");
90 		return;
91 	}
92 
93 	seq_printf(m, "source: %d (%s)\n", src, sar_hdl->descr_sar_source);
94 
95 	ret = sar_hdl->query_sar_config(rtwdev, &cfg);
96 	if (ret) {
97 		seq_printf(m, "config: return code: %d\n", ret);
98 		seq_printf(m, "assign: max setting: %d (unit: 1/%lu dBm)\n",
99 			   RTW89_SAR_TXPWR_MAC_MAX, BIT(fct_mac));
100 		return;
101 	}
102 
103 	fct = sar_hdl->txpwr_factor_sar;
104 
105 	seq_printf(m, "config: %d (unit: 1/%lu dBm)\n", cfg, BIT(fct));
106 }
107 
rtw89_apply_sar_common(struct rtw89_dev * rtwdev,const struct rtw89_sar_cfg_common * sar)108 static int rtw89_apply_sar_common(struct rtw89_dev *rtwdev,
109 				  const struct rtw89_sar_cfg_common *sar)
110 {
111 	enum rtw89_sar_sources src;
112 	int ret = 0;
113 
114 	mutex_lock(&rtwdev->mutex);
115 
116 	src = rtwdev->sar.src;
117 	if (src != RTW89_SAR_SOURCE_NONE && src != RTW89_SAR_SOURCE_COMMON) {
118 		rtw89_warn(rtwdev, "SAR source: %d is in use", src);
119 		ret = -EBUSY;
120 		goto exit;
121 	}
122 
123 	rtw89_sar_set_src(rtwdev, RTW89_SAR_SOURCE_COMMON, cfg_common, sar);
124 	rtw89_chip_set_txpwr(rtwdev);
125 
126 exit:
127 	mutex_unlock(&rtwdev->mutex);
128 	return ret;
129 }
130 
131 static const u8 rtw89_common_sar_subband_map[] = {
132 	RTW89_CH_2G,
133 	RTW89_CH_5G_BAND_1,
134 	RTW89_CH_5G_BAND_3,
135 	RTW89_CH_5G_BAND_4,
136 };
137 
138 static const struct cfg80211_sar_freq_ranges rtw89_common_sar_freq_ranges[] = {
139 	{ .start_freq = 2412, .end_freq = 2484, },
140 	{ .start_freq = 5180, .end_freq = 5320, },
141 	{ .start_freq = 5500, .end_freq = 5720, },
142 	{ .start_freq = 5745, .end_freq = 5825, },
143 };
144 
145 static_assert(ARRAY_SIZE(rtw89_common_sar_subband_map) ==
146 	      ARRAY_SIZE(rtw89_common_sar_freq_ranges));
147 
148 const struct cfg80211_sar_capa rtw89_sar_capa = {
149 	.type = NL80211_SAR_TYPE_POWER,
150 	.num_freq_ranges = ARRAY_SIZE(rtw89_common_sar_freq_ranges),
151 	.freq_ranges = rtw89_common_sar_freq_ranges,
152 };
153 
rtw89_ops_set_sar_specs(struct ieee80211_hw * hw,const struct cfg80211_sar_specs * sar)154 int rtw89_ops_set_sar_specs(struct ieee80211_hw *hw,
155 			    const struct cfg80211_sar_specs *sar)
156 {
157 	struct rtw89_dev *rtwdev = hw->priv;
158 	struct rtw89_sar_cfg_common sar_common = {0};
159 	u8 fct;
160 	u32 freq_start;
161 	u32 freq_end;
162 	u32 band;
163 	s32 power;
164 	u32 i, idx;
165 
166 	if (sar->type != NL80211_SAR_TYPE_POWER)
167 		return -EINVAL;
168 
169 	fct = rtw89_sar_handlers[RTW89_SAR_SOURCE_COMMON].txpwr_factor_sar;
170 
171 	for (i = 0; i < sar->num_sub_specs; i++) {
172 		idx = sar->sub_specs[i].freq_range_index;
173 		if (idx >= ARRAY_SIZE(rtw89_common_sar_freq_ranges))
174 			return -EINVAL;
175 
176 		freq_start = rtw89_common_sar_freq_ranges[idx].start_freq;
177 		freq_end = rtw89_common_sar_freq_ranges[idx].end_freq;
178 		band = rtw89_common_sar_subband_map[idx];
179 		power = sar->sub_specs[i].power;
180 
181 		rtw89_info(rtwdev, "On freq %u to %u, ", freq_start, freq_end);
182 		rtw89_info(rtwdev, "set SAR power limit %d (unit: 1/%lu dBm)\n",
183 			   power, BIT(fct));
184 
185 		sar_common.set[band] = true;
186 		sar_common.cfg[band] = power;
187 	}
188 
189 	return rtw89_apply_sar_common(rtwdev, &sar_common);
190 }
191