1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (c) 2015 Google, Inc
4 * Copyright (c) 2011 The Chromium OS Authors.
5 * Copyright (C) 2009 NVIDIA, Corporation
6 * Copyright (C) 2007-2008 SMSC (Steve Glendinning)
7 */
8
9 #include <common.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <log.h>
13 #include <malloc.h>
14 #include <memalign.h>
15 #include <net.h>
16 #include <usb.h>
17 #include <asm/unaligned.h>
18 #include <linux/delay.h>
19 #include <linux/mii.h>
20 #include "usb_ether.h"
21
22 /* SMSC LAN95xx based USB 2.0 Ethernet Devices */
23
24 /* LED defines */
25 #define LED_GPIO_CFG (0x24)
26 #define LED_GPIO_CFG_SPD_LED (0x01000000)
27 #define LED_GPIO_CFG_LNK_LED (0x00100000)
28 #define LED_GPIO_CFG_FDX_LED (0x00010000)
29
30 /* Tx command words */
31 #define TX_CMD_A_FIRST_SEG_ 0x00002000
32 #define TX_CMD_A_LAST_SEG_ 0x00001000
33
34 /* Rx status word */
35 #define RX_STS_FL_ 0x3FFF0000 /* Frame Length */
36 #define RX_STS_ES_ 0x00008000 /* Error Summary */
37
38 /* SCSRs */
39 #define ID_REV 0x00
40
41 #define INT_STS 0x08
42
43 #define TX_CFG 0x10
44 #define TX_CFG_ON_ 0x00000004
45
46 #define HW_CFG 0x14
47 #define HW_CFG_BIR_ 0x00001000
48 #define HW_CFG_RXDOFF_ 0x00000600
49 #define HW_CFG_MEF_ 0x00000020
50 #define HW_CFG_BCE_ 0x00000002
51 #define HW_CFG_LRST_ 0x00000008
52
53 #define PM_CTRL 0x20
54 #define PM_CTL_PHY_RST_ 0x00000010
55
56 #define AFC_CFG 0x2C
57
58 /*
59 * Hi watermark = 15.5Kb (~10 mtu pkts)
60 * low watermark = 3k (~2 mtu pkts)
61 * backpressure duration = ~ 350us
62 * Apply FC on any frame.
63 */
64 #define AFC_CFG_DEFAULT 0x00F830A1
65
66 #define E2P_CMD 0x30
67 #define E2P_CMD_BUSY_ 0x80000000
68 #define E2P_CMD_READ_ 0x00000000
69 #define E2P_CMD_TIMEOUT_ 0x00000400
70 #define E2P_CMD_LOADED_ 0x00000200
71 #define E2P_CMD_ADDR_ 0x000001FF
72
73 #define E2P_DATA 0x34
74
75 #define BURST_CAP 0x38
76
77 #define INT_EP_CTL 0x68
78 #define INT_EP_CTL_PHY_INT_ 0x00008000
79
80 #define BULK_IN_DLY 0x6C
81
82 /* MAC CSRs */
83 #define MAC_CR 0x100
84 #define MAC_CR_MCPAS_ 0x00080000
85 #define MAC_CR_PRMS_ 0x00040000
86 #define MAC_CR_HPFILT_ 0x00002000
87 #define MAC_CR_TXEN_ 0x00000008
88 #define MAC_CR_RXEN_ 0x00000004
89
90 #define ADDRH 0x104
91
92 #define ADDRL 0x108
93
94 #define MII_ADDR 0x114
95 #define MII_WRITE_ 0x02
96 #define MII_BUSY_ 0x01
97 #define MII_READ_ 0x00 /* ~of MII Write bit */
98
99 #define MII_DATA 0x118
100
101 #define FLOW 0x11C
102
103 #define VLAN1 0x120
104
105 #define COE_CR 0x130
106 #define Tx_COE_EN_ 0x00010000
107 #define Rx_COE_EN_ 0x00000001
108
109 /* Vendor-specific PHY Definitions */
110 #define PHY_INT_SRC 29
111
112 #define PHY_INT_MASK 30
113 #define PHY_INT_MASK_ANEG_COMP_ ((u16)0x0040)
114 #define PHY_INT_MASK_LINK_DOWN_ ((u16)0x0010)
115 #define PHY_INT_MASK_DEFAULT_ (PHY_INT_MASK_ANEG_COMP_ | \
116 PHY_INT_MASK_LINK_DOWN_)
117
118 /* USB Vendor Requests */
119 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0
120 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1
121
122 /* Some extra defines */
123 #define HS_USB_PKT_SIZE 512
124 #define FS_USB_PKT_SIZE 64
125 /* 5/33 is lower limit for BURST_CAP to work */
126 #define DEFAULT_HS_BURST_CAP_SIZE (5 * HS_USB_PKT_SIZE)
127 #define DEFAULT_FS_BURST_CAP_SIZE (33 * FS_USB_PKT_SIZE)
128 #define DEFAULT_BULK_IN_DELAY 0x00002000
129 #define MAX_SINGLE_PACKET_SIZE 2048
130 #define EEPROM_MAC_OFFSET 0x01
131 #define SMSC95XX_INTERNAL_PHY_ID 1
132 #define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */
133
134 /* local defines */
135 #define SMSC95XX_BASE_NAME "sms"
136 #define USB_CTRL_SET_TIMEOUT 5000
137 #define USB_CTRL_GET_TIMEOUT 5000
138 #define USB_BULK_SEND_TIMEOUT 5000
139 #define USB_BULK_RECV_TIMEOUT 5000
140
141 #define RX_URB_SIZE DEFAULT_HS_BURST_CAP_SIZE
142 #define PHY_CONNECT_TIMEOUT 5000
143
144 #define TURBO_MODE
145
146 #ifndef CONFIG_DM_ETH
147 /* local vars */
148 static int curr_eth_dev; /* index for name of next device detected */
149 #endif
150
151 /* driver private */
152 struct smsc95xx_private {
153 #ifdef CONFIG_DM_ETH
154 struct ueth_data ueth;
155 #endif
156 size_t rx_urb_size; /* maximum USB URB size */
157 u32 mac_cr; /* MAC control register value */
158 int have_hwaddr; /* 1 if we have a hardware MAC address */
159 };
160
161 /*
162 * Smsc95xx infrastructure commands
163 */
smsc95xx_write_reg(struct usb_device * udev,u32 index,u32 data)164 static int smsc95xx_write_reg(struct usb_device *udev, u32 index, u32 data)
165 {
166 int len;
167 ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
168
169 cpu_to_le32s(&data);
170 tmpbuf[0] = data;
171
172 len = usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
173 USB_VENDOR_REQUEST_WRITE_REGISTER,
174 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
175 0, index, tmpbuf, sizeof(data),
176 USB_CTRL_SET_TIMEOUT);
177 if (len != sizeof(data)) {
178 debug("smsc95xx_write_reg failed: index=%d, data=%d, len=%d",
179 index, data, len);
180 return -EIO;
181 }
182 return 0;
183 }
184
smsc95xx_read_reg(struct usb_device * udev,u32 index,u32 * data)185 static int smsc95xx_read_reg(struct usb_device *udev, u32 index, u32 *data)
186 {
187 int len;
188 ALLOC_CACHE_ALIGN_BUFFER(u32, tmpbuf, 1);
189
190 len = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
191 USB_VENDOR_REQUEST_READ_REGISTER,
192 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
193 0, index, tmpbuf, sizeof(*data),
194 USB_CTRL_GET_TIMEOUT);
195 *data = tmpbuf[0];
196 if (len != sizeof(*data)) {
197 debug("smsc95xx_read_reg failed: index=%d, len=%d",
198 index, len);
199 return -EIO;
200 }
201
202 le32_to_cpus(data);
203 return 0;
204 }
205
206 /* Loop until the read is completed with timeout */
smsc95xx_phy_wait_not_busy(struct usb_device * udev)207 static int smsc95xx_phy_wait_not_busy(struct usb_device *udev)
208 {
209 unsigned long start_time = get_timer(0);
210 u32 val;
211
212 do {
213 smsc95xx_read_reg(udev, MII_ADDR, &val);
214 if (!(val & MII_BUSY_))
215 return 0;
216 } while (get_timer(start_time) < 1000);
217
218 return -ETIMEDOUT;
219 }
220
smsc95xx_mdio_read(struct usb_device * udev,int phy_id,int idx)221 static int smsc95xx_mdio_read(struct usb_device *udev, int phy_id, int idx)
222 {
223 u32 val, addr;
224
225 /* confirm MII not busy */
226 if (smsc95xx_phy_wait_not_busy(udev)) {
227 debug("MII is busy in smsc95xx_mdio_read\n");
228 return -ETIMEDOUT;
229 }
230
231 /* set the address, index & direction (read from PHY) */
232 addr = (phy_id << 11) | (idx << 6) | MII_READ_;
233 smsc95xx_write_reg(udev, MII_ADDR, addr);
234
235 if (smsc95xx_phy_wait_not_busy(udev)) {
236 debug("Timed out reading MII reg %02X\n", idx);
237 return -ETIMEDOUT;
238 }
239
240 smsc95xx_read_reg(udev, MII_DATA, &val);
241
242 return (u16)(val & 0xFFFF);
243 }
244
smsc95xx_mdio_write(struct usb_device * udev,int phy_id,int idx,int regval)245 static void smsc95xx_mdio_write(struct usb_device *udev, int phy_id, int idx,
246 int regval)
247 {
248 u32 val, addr;
249
250 /* confirm MII not busy */
251 if (smsc95xx_phy_wait_not_busy(udev)) {
252 debug("MII is busy in smsc95xx_mdio_write\n");
253 return;
254 }
255
256 val = regval;
257 smsc95xx_write_reg(udev, MII_DATA, val);
258
259 /* set the address, index & direction (write to PHY) */
260 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_;
261 smsc95xx_write_reg(udev, MII_ADDR, addr);
262
263 if (smsc95xx_phy_wait_not_busy(udev))
264 debug("Timed out writing MII reg %02X\n", idx);
265 }
266
smsc95xx_eeprom_confirm_not_busy(struct usb_device * udev)267 static int smsc95xx_eeprom_confirm_not_busy(struct usb_device *udev)
268 {
269 unsigned long start_time = get_timer(0);
270 u32 val;
271
272 do {
273 smsc95xx_read_reg(udev, E2P_CMD, &val);
274 if (!(val & E2P_CMD_BUSY_))
275 return 0;
276 udelay(40);
277 } while (get_timer(start_time) < 1 * 1000 * 1000);
278
279 debug("EEPROM is busy\n");
280 return -ETIMEDOUT;
281 }
282
smsc95xx_wait_eeprom(struct usb_device * udev)283 static int smsc95xx_wait_eeprom(struct usb_device *udev)
284 {
285 unsigned long start_time = get_timer(0);
286 u32 val;
287
288 do {
289 smsc95xx_read_reg(udev, E2P_CMD, &val);
290 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
291 break;
292 udelay(40);
293 } while (get_timer(start_time) < 1 * 1000 * 1000);
294
295 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
296 debug("EEPROM read operation timeout\n");
297 return -ETIMEDOUT;
298 }
299 return 0;
300 }
301
smsc95xx_read_eeprom(struct usb_device * udev,u32 offset,u32 length,u8 * data)302 static int smsc95xx_read_eeprom(struct usb_device *udev, u32 offset, u32 length,
303 u8 *data)
304 {
305 u32 val;
306 int i, ret;
307
308 ret = smsc95xx_eeprom_confirm_not_busy(udev);
309 if (ret)
310 return ret;
311
312 for (i = 0; i < length; i++) {
313 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
314 smsc95xx_write_reg(udev, E2P_CMD, val);
315
316 ret = smsc95xx_wait_eeprom(udev);
317 if (ret < 0)
318 return ret;
319
320 smsc95xx_read_reg(udev, E2P_DATA, &val);
321 data[i] = val & 0xFF;
322 offset++;
323 }
324 return 0;
325 }
326
327 /*
328 * mii_nway_restart - restart NWay (autonegotiation) for this interface
329 *
330 * Returns 0 on success, negative on error.
331 */
mii_nway_restart(struct usb_device * udev,struct ueth_data * dev)332 static int mii_nway_restart(struct usb_device *udev, struct ueth_data *dev)
333 {
334 int bmcr;
335 int r = -1;
336
337 /* if autoneg is off, it's an error */
338 bmcr = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMCR);
339
340 if (bmcr & BMCR_ANENABLE) {
341 bmcr |= BMCR_ANRESTART;
342 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, bmcr);
343 r = 0;
344 }
345 return r;
346 }
347
smsc95xx_phy_initialize(struct usb_device * udev,struct ueth_data * dev)348 static int smsc95xx_phy_initialize(struct usb_device *udev,
349 struct ueth_data *dev)
350 {
351 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET);
352 smsc95xx_mdio_write(udev, dev->phy_id, MII_ADVERTISE,
353 ADVERTISE_ALL | ADVERTISE_CSMA |
354 ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
355
356 /* read to clear */
357 smsc95xx_mdio_read(udev, dev->phy_id, PHY_INT_SRC);
358
359 smsc95xx_mdio_write(udev, dev->phy_id, PHY_INT_MASK,
360 PHY_INT_MASK_DEFAULT_);
361 mii_nway_restart(udev, dev);
362
363 debug("phy initialised succesfully\n");
364 return 0;
365 }
366
smsc95xx_init_mac_address(unsigned char * enetaddr,struct usb_device * udev)367 static int smsc95xx_init_mac_address(unsigned char *enetaddr,
368 struct usb_device *udev)
369 {
370 int ret;
371
372 /* try reading mac address from EEPROM */
373 ret = smsc95xx_read_eeprom(udev, EEPROM_MAC_OFFSET, ETH_ALEN, enetaddr);
374 if (ret)
375 return ret;
376
377 if (is_valid_ethaddr(enetaddr)) {
378 /* eeprom values are valid so use them */
379 debug("MAC address read from EEPROM\n");
380 return 0;
381 }
382
383 /*
384 * No eeprom, or eeprom values are invalid. Generating a random MAC
385 * address is not safe. Just return an error.
386 */
387 debug("Invalid MAC address read from EEPROM\n");
388
389 return -ENXIO;
390 }
391
smsc95xx_write_hwaddr_common(struct usb_device * udev,struct smsc95xx_private * priv,unsigned char * enetaddr)392 static int smsc95xx_write_hwaddr_common(struct usb_device *udev,
393 struct smsc95xx_private *priv,
394 unsigned char *enetaddr)
395 {
396 u32 addr_lo = get_unaligned_le32(&enetaddr[0]);
397 u32 addr_hi = get_unaligned_le16(&enetaddr[4]);
398 int ret;
399
400 /* set hardware address */
401 debug("** %s()\n", __func__);
402 ret = smsc95xx_write_reg(udev, ADDRL, addr_lo);
403 if (ret < 0)
404 return ret;
405
406 ret = smsc95xx_write_reg(udev, ADDRH, addr_hi);
407 if (ret < 0)
408 return ret;
409
410 debug("MAC %pM\n", enetaddr);
411 priv->have_hwaddr = 1;
412
413 return 0;
414 }
415
416 /* Enable or disable Tx & Rx checksum offload engines */
smsc95xx_set_csums(struct usb_device * udev,int use_tx_csum,int use_rx_csum)417 static int smsc95xx_set_csums(struct usb_device *udev, int use_tx_csum,
418 int use_rx_csum)
419 {
420 u32 read_buf;
421 int ret = smsc95xx_read_reg(udev, COE_CR, &read_buf);
422 if (ret < 0)
423 return ret;
424
425 if (use_tx_csum)
426 read_buf |= Tx_COE_EN_;
427 else
428 read_buf &= ~Tx_COE_EN_;
429
430 if (use_rx_csum)
431 read_buf |= Rx_COE_EN_;
432 else
433 read_buf &= ~Rx_COE_EN_;
434
435 ret = smsc95xx_write_reg(udev, COE_CR, read_buf);
436 if (ret < 0)
437 return ret;
438
439 debug("COE_CR = 0x%08x\n", read_buf);
440 return 0;
441 }
442
smsc95xx_set_multicast(struct smsc95xx_private * priv)443 static void smsc95xx_set_multicast(struct smsc95xx_private *priv)
444 {
445 /* No multicast in u-boot */
446 priv->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
447 }
448
449 /* starts the TX path */
smsc95xx_start_tx_path(struct usb_device * udev,struct smsc95xx_private * priv)450 static void smsc95xx_start_tx_path(struct usb_device *udev,
451 struct smsc95xx_private *priv)
452 {
453 u32 reg_val;
454
455 /* Enable Tx at MAC */
456 priv->mac_cr |= MAC_CR_TXEN_;
457
458 smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
459
460 /* Enable Tx at SCSRs */
461 reg_val = TX_CFG_ON_;
462 smsc95xx_write_reg(udev, TX_CFG, reg_val);
463 }
464
465 /* Starts the Receive path */
smsc95xx_start_rx_path(struct usb_device * udev,struct smsc95xx_private * priv)466 static void smsc95xx_start_rx_path(struct usb_device *udev,
467 struct smsc95xx_private *priv)
468 {
469 priv->mac_cr |= MAC_CR_RXEN_;
470 smsc95xx_write_reg(udev, MAC_CR, priv->mac_cr);
471 }
472
smsc95xx_init_common(struct usb_device * udev,struct ueth_data * dev,struct smsc95xx_private * priv,unsigned char * enetaddr)473 static int smsc95xx_init_common(struct usb_device *udev, struct ueth_data *dev,
474 struct smsc95xx_private *priv,
475 unsigned char *enetaddr)
476 {
477 int ret;
478 u32 write_buf;
479 u32 read_buf;
480 u32 burst_cap;
481 int timeout;
482 #define TIMEOUT_RESOLUTION 50 /* ms */
483 int link_detected;
484
485 debug("** %s()\n", __func__);
486 dev->phy_id = SMSC95XX_INTERNAL_PHY_ID; /* fixed phy id */
487
488 write_buf = HW_CFG_LRST_;
489 ret = smsc95xx_write_reg(udev, HW_CFG, write_buf);
490 if (ret < 0)
491 return ret;
492
493 timeout = 0;
494 do {
495 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
496 if (ret < 0)
497 return ret;
498 udelay(10 * 1000);
499 timeout++;
500 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
501
502 if (timeout >= 100) {
503 debug("timeout waiting for completion of Lite Reset\n");
504 return -ETIMEDOUT;
505 }
506
507 write_buf = PM_CTL_PHY_RST_;
508 ret = smsc95xx_write_reg(udev, PM_CTRL, write_buf);
509 if (ret < 0)
510 return ret;
511
512 timeout = 0;
513 do {
514 ret = smsc95xx_read_reg(udev, PM_CTRL, &read_buf);
515 if (ret < 0)
516 return ret;
517 udelay(10 * 1000);
518 timeout++;
519 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
520 if (timeout >= 100) {
521 debug("timeout waiting for PHY Reset\n");
522 return -ETIMEDOUT;
523 }
524 #ifndef CONFIG_DM_ETH
525 if (!priv->have_hwaddr && smsc95xx_init_mac_address(enetaddr, udev) ==
526 0)
527 priv->have_hwaddr = 1;
528 #endif
529 if (!priv->have_hwaddr) {
530 puts("Error: SMSC95xx: No MAC address set - set usbethaddr\n");
531 return -EADDRNOTAVAIL;
532 }
533 ret = smsc95xx_write_hwaddr_common(udev, priv, enetaddr);
534 if (ret < 0)
535 return ret;
536
537 #ifdef TURBO_MODE
538 if (dev->pusb_dev->speed == USB_SPEED_HIGH) {
539 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
540 priv->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
541 } else {
542 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
543 priv->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
544 }
545 #else
546 burst_cap = 0;
547 priv->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
548 #endif
549 debug("rx_urb_size=%ld\n", (ulong)priv->rx_urb_size);
550
551 ret = smsc95xx_write_reg(udev, BURST_CAP, burst_cap);
552 if (ret < 0)
553 return ret;
554
555 ret = smsc95xx_read_reg(udev, BURST_CAP, &read_buf);
556 if (ret < 0)
557 return ret;
558 debug("Read Value from BURST_CAP after writing: 0x%08x\n", read_buf);
559
560 read_buf = DEFAULT_BULK_IN_DELAY;
561 ret = smsc95xx_write_reg(udev, BULK_IN_DLY, read_buf);
562 if (ret < 0)
563 return ret;
564
565 ret = smsc95xx_read_reg(udev, BULK_IN_DLY, &read_buf);
566 if (ret < 0)
567 return ret;
568 debug("Read Value from BULK_IN_DLY after writing: "
569 "0x%08x\n", read_buf);
570
571 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
572 if (ret < 0)
573 return ret;
574 debug("Read Value from HW_CFG: 0x%08x\n", read_buf);
575
576 #ifdef TURBO_MODE
577 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
578 #endif
579 read_buf &= ~HW_CFG_RXDOFF_;
580
581 #define NET_IP_ALIGN 0
582 read_buf |= NET_IP_ALIGN << 9;
583
584 ret = smsc95xx_write_reg(udev, HW_CFG, read_buf);
585 if (ret < 0)
586 return ret;
587
588 ret = smsc95xx_read_reg(udev, HW_CFG, &read_buf);
589 if (ret < 0)
590 return ret;
591 debug("Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
592
593 write_buf = 0xFFFFFFFF;
594 ret = smsc95xx_write_reg(udev, INT_STS, write_buf);
595 if (ret < 0)
596 return ret;
597
598 ret = smsc95xx_read_reg(udev, ID_REV, &read_buf);
599 if (ret < 0)
600 return ret;
601 debug("ID_REV = 0x%08x\n", read_buf);
602
603 /* Configure GPIO pins as LED outputs */
604 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
605 LED_GPIO_CFG_FDX_LED;
606 ret = smsc95xx_write_reg(udev, LED_GPIO_CFG, write_buf);
607 if (ret < 0)
608 return ret;
609 debug("LED_GPIO_CFG set\n");
610
611 /* Init Tx */
612 write_buf = 0;
613 ret = smsc95xx_write_reg(udev, FLOW, write_buf);
614 if (ret < 0)
615 return ret;
616
617 read_buf = AFC_CFG_DEFAULT;
618 ret = smsc95xx_write_reg(udev, AFC_CFG, read_buf);
619 if (ret < 0)
620 return ret;
621
622 ret = smsc95xx_read_reg(udev, MAC_CR, &priv->mac_cr);
623 if (ret < 0)
624 return ret;
625
626 /* Init Rx. Set Vlan */
627 write_buf = (u32)ETH_P_8021Q;
628 ret = smsc95xx_write_reg(udev, VLAN1, write_buf);
629 if (ret < 0)
630 return ret;
631
632 /* Disable checksum offload engines */
633 ret = smsc95xx_set_csums(udev, 0, 0);
634 if (ret < 0) {
635 debug("Failed to set csum offload: %d\n", ret);
636 return ret;
637 }
638 smsc95xx_set_multicast(priv);
639
640 ret = smsc95xx_phy_initialize(udev, dev);
641 if (ret < 0)
642 return ret;
643 ret = smsc95xx_read_reg(udev, INT_EP_CTL, &read_buf);
644 if (ret < 0)
645 return ret;
646
647 /* enable PHY interrupts */
648 read_buf |= INT_EP_CTL_PHY_INT_;
649
650 ret = smsc95xx_write_reg(udev, INT_EP_CTL, read_buf);
651 if (ret < 0)
652 return ret;
653
654 smsc95xx_start_tx_path(udev, priv);
655 smsc95xx_start_rx_path(udev, priv);
656
657 timeout = 0;
658 do {
659 link_detected = smsc95xx_mdio_read(udev, dev->phy_id, MII_BMSR)
660 & BMSR_LSTATUS;
661 if (!link_detected) {
662 if (timeout == 0)
663 printf("Waiting for Ethernet connection... ");
664 udelay(TIMEOUT_RESOLUTION * 1000);
665 timeout += TIMEOUT_RESOLUTION;
666 }
667 } while (!link_detected && timeout < PHY_CONNECT_TIMEOUT);
668 if (link_detected) {
669 if (timeout != 0)
670 printf("done.\n");
671 } else {
672 printf("unable to connect.\n");
673 return -EIO;
674 }
675 return 0;
676 }
677
smsc95xx_send_common(struct ueth_data * dev,void * packet,int length)678 static int smsc95xx_send_common(struct ueth_data *dev, void *packet, int length)
679 {
680 int err;
681 int actual_len;
682 u32 tx_cmd_a;
683 u32 tx_cmd_b;
684 ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg,
685 PKTSIZE + sizeof(tx_cmd_a) + sizeof(tx_cmd_b));
686
687 debug("** %s(), len %d, buf %#x\n", __func__, length,
688 (unsigned int)(ulong)msg);
689 if (length > PKTSIZE)
690 return -ENOSPC;
691
692 tx_cmd_a = (u32)length | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
693 tx_cmd_b = (u32)length;
694 cpu_to_le32s(&tx_cmd_a);
695 cpu_to_le32s(&tx_cmd_b);
696
697 /* prepend cmd_a and cmd_b */
698 memcpy(msg, &tx_cmd_a, sizeof(tx_cmd_a));
699 memcpy(msg + sizeof(tx_cmd_a), &tx_cmd_b, sizeof(tx_cmd_b));
700 memcpy(msg + sizeof(tx_cmd_a) + sizeof(tx_cmd_b), (void *)packet,
701 length);
702 err = usb_bulk_msg(dev->pusb_dev,
703 usb_sndbulkpipe(dev->pusb_dev, dev->ep_out),
704 (void *)msg,
705 length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b),
706 &actual_len,
707 USB_BULK_SEND_TIMEOUT);
708 debug("Tx: len = %u, actual = %u, err = %d\n",
709 (unsigned int)(length + sizeof(tx_cmd_a) + sizeof(tx_cmd_b)),
710 (unsigned int)actual_len, err);
711
712 return err;
713 }
714
715 #ifndef CONFIG_DM_ETH
716 /*
717 * Smsc95xx callbacks
718 */
smsc95xx_init(struct eth_device * eth,struct bd_info * bd)719 static int smsc95xx_init(struct eth_device *eth, struct bd_info *bd)
720 {
721 struct ueth_data *dev = (struct ueth_data *)eth->priv;
722 struct usb_device *udev = dev->pusb_dev;
723 struct smsc95xx_private *priv =
724 (struct smsc95xx_private *)dev->dev_priv;
725
726 return smsc95xx_init_common(udev, dev, priv, eth->enetaddr);
727 }
728
smsc95xx_send(struct eth_device * eth,void * packet,int length)729 static int smsc95xx_send(struct eth_device *eth, void *packet, int length)
730 {
731 struct ueth_data *dev = (struct ueth_data *)eth->priv;
732
733 return smsc95xx_send_common(dev, packet, length);
734 }
735
smsc95xx_recv(struct eth_device * eth)736 static int smsc95xx_recv(struct eth_device *eth)
737 {
738 struct ueth_data *dev = (struct ueth_data *)eth->priv;
739 DEFINE_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, RX_URB_SIZE);
740 unsigned char *buf_ptr;
741 int err;
742 int actual_len;
743 u32 packet_len;
744 int cur_buf_align;
745
746 debug("** %s()\n", __func__);
747 err = usb_bulk_msg(dev->pusb_dev,
748 usb_rcvbulkpipe(dev->pusb_dev, dev->ep_in),
749 (void *)recv_buf, RX_URB_SIZE, &actual_len,
750 USB_BULK_RECV_TIMEOUT);
751 debug("Rx: len = %u, actual = %u, err = %d\n", RX_URB_SIZE,
752 actual_len, err);
753 if (err != 0) {
754 debug("Rx: failed to receive\n");
755 return -err;
756 }
757 if (actual_len > RX_URB_SIZE) {
758 debug("Rx: received too many bytes %d\n", actual_len);
759 return -ENOSPC;
760 }
761
762 buf_ptr = recv_buf;
763 while (actual_len > 0) {
764 /*
765 * 1st 4 bytes contain the length of the actual data plus error
766 * info. Extract data length.
767 */
768 if (actual_len < sizeof(packet_len)) {
769 debug("Rx: incomplete packet length\n");
770 return -EIO;
771 }
772 memcpy(&packet_len, buf_ptr, sizeof(packet_len));
773 le32_to_cpus(&packet_len);
774 if (packet_len & RX_STS_ES_) {
775 debug("Rx: Error header=%#x", packet_len);
776 return -EIO;
777 }
778 packet_len = ((packet_len & RX_STS_FL_) >> 16);
779
780 if (packet_len > actual_len - sizeof(packet_len)) {
781 debug("Rx: too large packet: %d\n", packet_len);
782 return -EIO;
783 }
784
785 /* Notify net stack */
786 net_process_received_packet(buf_ptr + sizeof(packet_len),
787 packet_len - 4);
788
789 /* Adjust for next iteration */
790 actual_len -= sizeof(packet_len) + packet_len;
791 buf_ptr += sizeof(packet_len) + packet_len;
792 cur_buf_align = (ulong)buf_ptr - (ulong)recv_buf;
793
794 if (cur_buf_align & 0x03) {
795 int align = 4 - (cur_buf_align & 0x03);
796
797 actual_len -= align;
798 buf_ptr += align;
799 }
800 }
801 return err;
802 }
803
smsc95xx_halt(struct eth_device * eth)804 static void smsc95xx_halt(struct eth_device *eth)
805 {
806 debug("** %s()\n", __func__);
807 }
808
smsc95xx_write_hwaddr(struct eth_device * eth)809 static int smsc95xx_write_hwaddr(struct eth_device *eth)
810 {
811 struct ueth_data *dev = eth->priv;
812 struct usb_device *udev = dev->pusb_dev;
813 struct smsc95xx_private *priv = dev->dev_priv;
814
815 return smsc95xx_write_hwaddr_common(udev, priv, eth->enetaddr);
816 }
817
818 /*
819 * SMSC probing functions
820 */
smsc95xx_eth_before_probe(void)821 void smsc95xx_eth_before_probe(void)
822 {
823 curr_eth_dev = 0;
824 }
825
826 struct smsc95xx_dongle {
827 unsigned short vendor;
828 unsigned short product;
829 };
830
831 static const struct smsc95xx_dongle smsc95xx_dongles[] = {
832 { 0x0424, 0xec00 }, /* LAN9512/LAN9514 Ethernet */
833 { 0x0424, 0x9500 }, /* LAN9500 Ethernet */
834 { 0x0424, 0x9730 }, /* LAN9730 Ethernet (HSIC) */
835 { 0x0424, 0x9900 }, /* SMSC9500 USB Ethernet Device (SAL10) */
836 { 0x0424, 0x9e00 }, /* LAN9500A Ethernet */
837 { 0x0000, 0x0000 } /* END - Do not remove */
838 };
839
840 /* Probe to see if a new device is actually an SMSC device */
smsc95xx_eth_probe(struct usb_device * dev,unsigned int ifnum,struct ueth_data * ss)841 int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum,
842 struct ueth_data *ss)
843 {
844 struct usb_interface *iface;
845 struct usb_interface_descriptor *iface_desc;
846 int i;
847
848 /* let's examine the device now */
849 iface = &dev->config.if_desc[ifnum];
850 iface_desc = &dev->config.if_desc[ifnum].desc;
851
852 for (i = 0; smsc95xx_dongles[i].vendor != 0; i++) {
853 if (dev->descriptor.idVendor == smsc95xx_dongles[i].vendor &&
854 dev->descriptor.idProduct == smsc95xx_dongles[i].product)
855 /* Found a supported dongle */
856 break;
857 }
858 if (smsc95xx_dongles[i].vendor == 0)
859 return 0;
860
861 /* At this point, we know we've got a live one */
862 debug("\n\nUSB Ethernet device detected\n");
863 memset(ss, '\0', sizeof(struct ueth_data));
864
865 /* Initialize the ueth_data structure with some useful info */
866 ss->ifnum = ifnum;
867 ss->pusb_dev = dev;
868 ss->subclass = iface_desc->bInterfaceSubClass;
869 ss->protocol = iface_desc->bInterfaceProtocol;
870
871 /*
872 * We are expecting a minimum of 3 endpoints - in, out (bulk), and int.
873 * We will ignore any others.
874 */
875 for (i = 0; i < iface_desc->bNumEndpoints; i++) {
876 /* is it an BULK endpoint? */
877 if ((iface->ep_desc[i].bmAttributes &
878 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
879 if (iface->ep_desc[i].bEndpointAddress & USB_DIR_IN)
880 ss->ep_in =
881 iface->ep_desc[i].bEndpointAddress &
882 USB_ENDPOINT_NUMBER_MASK;
883 else
884 ss->ep_out =
885 iface->ep_desc[i].bEndpointAddress &
886 USB_ENDPOINT_NUMBER_MASK;
887 }
888
889 /* is it an interrupt endpoint? */
890 if ((iface->ep_desc[i].bmAttributes &
891 USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT) {
892 ss->ep_int = iface->ep_desc[i].bEndpointAddress &
893 USB_ENDPOINT_NUMBER_MASK;
894 ss->irqinterval = iface->ep_desc[i].bInterval;
895 }
896 }
897 debug("Endpoints In %d Out %d Int %d\n",
898 ss->ep_in, ss->ep_out, ss->ep_int);
899
900 /* Do some basic sanity checks, and bail if we find a problem */
901 if (usb_set_interface(dev, iface_desc->bInterfaceNumber, 0) ||
902 !ss->ep_in || !ss->ep_out || !ss->ep_int) {
903 debug("Problems with device\n");
904 return 0;
905 }
906 dev->privptr = (void *)ss;
907
908 /* alloc driver private */
909 ss->dev_priv = calloc(1, sizeof(struct smsc95xx_private));
910 if (!ss->dev_priv)
911 return 0;
912
913 return 1;
914 }
915
smsc95xx_eth_get_info(struct usb_device * dev,struct ueth_data * ss,struct eth_device * eth)916 int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss,
917 struct eth_device *eth)
918 {
919 debug("** %s()\n", __func__);
920 if (!eth) {
921 debug("%s: missing parameter.\n", __func__);
922 return 0;
923 }
924 sprintf(eth->name, "%s%d", SMSC95XX_BASE_NAME, curr_eth_dev++);
925 eth->init = smsc95xx_init;
926 eth->send = smsc95xx_send;
927 eth->recv = smsc95xx_recv;
928 eth->halt = smsc95xx_halt;
929 eth->write_hwaddr = smsc95xx_write_hwaddr;
930 eth->priv = ss;
931 return 1;
932 }
933 #endif /* !CONFIG_DM_ETH */
934
935 #ifdef CONFIG_DM_ETH
smsc95xx_eth_start(struct udevice * dev)936 static int smsc95xx_eth_start(struct udevice *dev)
937 {
938 struct usb_device *udev = dev_get_parent_priv(dev);
939 struct smsc95xx_private *priv = dev_get_priv(dev);
940 struct eth_pdata *pdata = dev_get_plat(dev);
941
942 /* Driver-model Ethernet ensures we have this */
943 priv->have_hwaddr = 1;
944
945 return smsc95xx_init_common(udev, &priv->ueth, priv, pdata->enetaddr);
946 }
947
smsc95xx_eth_stop(struct udevice * dev)948 void smsc95xx_eth_stop(struct udevice *dev)
949 {
950 debug("** %s()\n", __func__);
951 }
952
smsc95xx_eth_send(struct udevice * dev,void * packet,int length)953 int smsc95xx_eth_send(struct udevice *dev, void *packet, int length)
954 {
955 struct smsc95xx_private *priv = dev_get_priv(dev);
956
957 return smsc95xx_send_common(&priv->ueth, packet, length);
958 }
959
smsc95xx_eth_recv(struct udevice * dev,int flags,uchar ** packetp)960 int smsc95xx_eth_recv(struct udevice *dev, int flags, uchar **packetp)
961 {
962 struct smsc95xx_private *priv = dev_get_priv(dev);
963 struct ueth_data *ueth = &priv->ueth;
964 uint8_t *ptr;
965 int ret, len;
966 u32 packet_len;
967
968 len = usb_ether_get_rx_bytes(ueth, &ptr);
969 debug("%s: first try, len=%d\n", __func__, len);
970 if (!len) {
971 if (!(flags & ETH_RECV_CHECK_DEVICE))
972 return -EAGAIN;
973 ret = usb_ether_receive(ueth, RX_URB_SIZE);
974 if (ret == -EAGAIN)
975 return ret;
976
977 len = usb_ether_get_rx_bytes(ueth, &ptr);
978 debug("%s: second try, len=%d\n", __func__, len);
979 }
980
981 /*
982 * 1st 4 bytes contain the length of the actual data plus error info.
983 * Extract data length.
984 */
985 if (len < sizeof(packet_len)) {
986 debug("Rx: incomplete packet length\n");
987 goto err;
988 }
989 memcpy(&packet_len, ptr, sizeof(packet_len));
990 le32_to_cpus(&packet_len);
991 if (packet_len & RX_STS_ES_) {
992 debug("Rx: Error header=%#x", packet_len);
993 goto err;
994 }
995 packet_len = ((packet_len & RX_STS_FL_) >> 16);
996
997 if (packet_len > len - sizeof(packet_len)) {
998 debug("Rx: too large packet: %d\n", packet_len);
999 goto err;
1000 }
1001
1002 *packetp = ptr + sizeof(packet_len);
1003 return packet_len - 4;
1004
1005 err:
1006 usb_ether_advance_rxbuf(ueth, -1);
1007 return -EINVAL;
1008 }
1009
smsc95xx_free_pkt(struct udevice * dev,uchar * packet,int packet_len)1010 static int smsc95xx_free_pkt(struct udevice *dev, uchar *packet, int packet_len)
1011 {
1012 struct smsc95xx_private *priv = dev_get_priv(dev);
1013
1014 packet_len = ALIGN(packet_len + sizeof(u32), 4);
1015 usb_ether_advance_rxbuf(&priv->ueth, sizeof(u32) + packet_len);
1016
1017 return 0;
1018 }
1019
smsc95xx_write_hwaddr(struct udevice * dev)1020 int smsc95xx_write_hwaddr(struct udevice *dev)
1021 {
1022 struct usb_device *udev = dev_get_parent_priv(dev);
1023 struct eth_pdata *pdata = dev_get_plat(dev);
1024 struct smsc95xx_private *priv = dev_get_priv(dev);
1025
1026 return smsc95xx_write_hwaddr_common(udev, priv, pdata->enetaddr);
1027 }
1028
smsc95xx_read_rom_hwaddr(struct udevice * dev)1029 int smsc95xx_read_rom_hwaddr(struct udevice *dev)
1030 {
1031 struct usb_device *udev = dev_get_parent_priv(dev);
1032 struct eth_pdata *pdata = dev_get_plat(dev);
1033 int ret;
1034
1035 ret = smsc95xx_init_mac_address(pdata->enetaddr, udev);
1036 if (ret)
1037 memset(pdata->enetaddr, 0, 6);
1038
1039 return 0;
1040 }
1041
smsc95xx_eth_probe(struct udevice * dev)1042 static int smsc95xx_eth_probe(struct udevice *dev)
1043 {
1044 struct smsc95xx_private *priv = dev_get_priv(dev);
1045 struct ueth_data *ueth = &priv->ueth;
1046
1047 return usb_ether_register(dev, ueth, RX_URB_SIZE);
1048 }
1049
1050 static const struct eth_ops smsc95xx_eth_ops = {
1051 .start = smsc95xx_eth_start,
1052 .send = smsc95xx_eth_send,
1053 .recv = smsc95xx_eth_recv,
1054 .free_pkt = smsc95xx_free_pkt,
1055 .stop = smsc95xx_eth_stop,
1056 .write_hwaddr = smsc95xx_write_hwaddr,
1057 .read_rom_hwaddr = smsc95xx_read_rom_hwaddr,
1058 };
1059
1060 U_BOOT_DRIVER(smsc95xx_eth) = {
1061 .name = "smsc95xx_eth",
1062 .id = UCLASS_ETH,
1063 .probe = smsc95xx_eth_probe,
1064 .ops = &smsc95xx_eth_ops,
1065 .priv_auto = sizeof(struct smsc95xx_private),
1066 .plat_auto = sizeof(struct eth_pdata),
1067 };
1068
1069 static const struct usb_device_id smsc95xx_eth_id_table[] = {
1070 { USB_DEVICE(0x05ac, 0x1402) },
1071 { USB_DEVICE(0x0424, 0xec00) }, /* LAN9512/LAN9514 Ethernet */
1072 { USB_DEVICE(0x0424, 0x9500) }, /* LAN9500 Ethernet */
1073 { USB_DEVICE(0x0424, 0x9730) }, /* LAN9730 Ethernet (HSIC) */
1074 { USB_DEVICE(0x0424, 0x9900) }, /* SMSC9500 USB Ethernet (SAL10) */
1075 { USB_DEVICE(0x0424, 0x9e00) }, /* LAN9500A Ethernet */
1076 { } /* Terminating entry */
1077 };
1078
1079 U_BOOT_USB_DEVICE(smsc95xx_eth, smsc95xx_eth_id_table);
1080 #endif
1081