1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 //
3 // This file is provided under a dual BSD/GPLv2 license. When using or
4 // redistributing this file, you may do so under either license.
5 //
6 // Copyright(c) 2018 Intel Corporation. All rights reserved.
7 //
8 // Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
9 //
10 // Generic IPC layer that can work over MMIO and SPI/I2C. PHY layer provided
11 // by platform driver code.
12 //
13
14 #include <linux/mutex.h>
15 #include <linux/types.h>
16
17 #include "sof-priv.h"
18 #include "sof-audio.h"
19 #include "ops.h"
20
21 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_type);
22 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd);
23
24 /*
25 * IPC message Tx/Rx message handling.
26 */
27
28 /* SOF generic IPC data */
29 struct snd_sof_ipc {
30 struct snd_sof_dev *sdev;
31
32 /* protects messages and the disable flag */
33 struct mutex tx_mutex;
34 /* disables further sending of ipc's */
35 bool disable_ipc_tx;
36
37 struct snd_sof_ipc_msg msg;
38 };
39
40 struct sof_ipc_ctrl_data_params {
41 size_t msg_bytes;
42 size_t hdr_bytes;
43 size_t pl_size;
44 size_t elems;
45 u32 num_msg;
46 u8 *src;
47 u8 *dst;
48 };
49
50 #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG_VERBOSE_IPC)
ipc_log_header(struct device * dev,u8 * text,u32 cmd)51 static void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
52 {
53 u8 *str;
54 u8 *str2 = NULL;
55 u32 glb;
56 u32 type;
57 bool vdbg = false;
58
59 glb = cmd & SOF_GLB_TYPE_MASK;
60 type = cmd & SOF_CMD_TYPE_MASK;
61
62 switch (glb) {
63 case SOF_IPC_GLB_REPLY:
64 str = "GLB_REPLY"; break;
65 case SOF_IPC_GLB_COMPOUND:
66 str = "GLB_COMPOUND"; break;
67 case SOF_IPC_GLB_TPLG_MSG:
68 str = "GLB_TPLG_MSG";
69 switch (type) {
70 case SOF_IPC_TPLG_COMP_NEW:
71 str2 = "COMP_NEW"; break;
72 case SOF_IPC_TPLG_COMP_FREE:
73 str2 = "COMP_FREE"; break;
74 case SOF_IPC_TPLG_COMP_CONNECT:
75 str2 = "COMP_CONNECT"; break;
76 case SOF_IPC_TPLG_PIPE_NEW:
77 str2 = "PIPE_NEW"; break;
78 case SOF_IPC_TPLG_PIPE_FREE:
79 str2 = "PIPE_FREE"; break;
80 case SOF_IPC_TPLG_PIPE_CONNECT:
81 str2 = "PIPE_CONNECT"; break;
82 case SOF_IPC_TPLG_PIPE_COMPLETE:
83 str2 = "PIPE_COMPLETE"; break;
84 case SOF_IPC_TPLG_BUFFER_NEW:
85 str2 = "BUFFER_NEW"; break;
86 case SOF_IPC_TPLG_BUFFER_FREE:
87 str2 = "BUFFER_FREE"; break;
88 default:
89 str2 = "unknown type"; break;
90 }
91 break;
92 case SOF_IPC_GLB_PM_MSG:
93 str = "GLB_PM_MSG";
94 switch (type) {
95 case SOF_IPC_PM_CTX_SAVE:
96 str2 = "CTX_SAVE"; break;
97 case SOF_IPC_PM_CTX_RESTORE:
98 str2 = "CTX_RESTORE"; break;
99 case SOF_IPC_PM_CTX_SIZE:
100 str2 = "CTX_SIZE"; break;
101 case SOF_IPC_PM_CLK_SET:
102 str2 = "CLK_SET"; break;
103 case SOF_IPC_PM_CLK_GET:
104 str2 = "CLK_GET"; break;
105 case SOF_IPC_PM_CLK_REQ:
106 str2 = "CLK_REQ"; break;
107 case SOF_IPC_PM_CORE_ENABLE:
108 str2 = "CORE_ENABLE"; break;
109 case SOF_IPC_PM_GATE:
110 str2 = "GATE"; break;
111 default:
112 str2 = "unknown type"; break;
113 }
114 break;
115 case SOF_IPC_GLB_COMP_MSG:
116 str = "GLB_COMP_MSG";
117 switch (type) {
118 case SOF_IPC_COMP_SET_VALUE:
119 str2 = "SET_VALUE"; break;
120 case SOF_IPC_COMP_GET_VALUE:
121 str2 = "GET_VALUE"; break;
122 case SOF_IPC_COMP_SET_DATA:
123 str2 = "SET_DATA"; break;
124 case SOF_IPC_COMP_GET_DATA:
125 str2 = "GET_DATA"; break;
126 default:
127 str2 = "unknown type"; break;
128 }
129 break;
130 case SOF_IPC_GLB_STREAM_MSG:
131 str = "GLB_STREAM_MSG";
132 switch (type) {
133 case SOF_IPC_STREAM_PCM_PARAMS:
134 str2 = "PCM_PARAMS"; break;
135 case SOF_IPC_STREAM_PCM_PARAMS_REPLY:
136 str2 = "PCM_REPLY"; break;
137 case SOF_IPC_STREAM_PCM_FREE:
138 str2 = "PCM_FREE"; break;
139 case SOF_IPC_STREAM_TRIG_START:
140 str2 = "TRIG_START"; break;
141 case SOF_IPC_STREAM_TRIG_STOP:
142 str2 = "TRIG_STOP"; break;
143 case SOF_IPC_STREAM_TRIG_PAUSE:
144 str2 = "TRIG_PAUSE"; break;
145 case SOF_IPC_STREAM_TRIG_RELEASE:
146 str2 = "TRIG_RELEASE"; break;
147 case SOF_IPC_STREAM_TRIG_DRAIN:
148 str2 = "TRIG_DRAIN"; break;
149 case SOF_IPC_STREAM_TRIG_XRUN:
150 str2 = "TRIG_XRUN"; break;
151 case SOF_IPC_STREAM_POSITION:
152 vdbg = true;
153 str2 = "POSITION"; break;
154 case SOF_IPC_STREAM_VORBIS_PARAMS:
155 str2 = "VORBIS_PARAMS"; break;
156 case SOF_IPC_STREAM_VORBIS_FREE:
157 str2 = "VORBIS_FREE"; break;
158 default:
159 str2 = "unknown type"; break;
160 }
161 break;
162 case SOF_IPC_FW_READY:
163 str = "FW_READY"; break;
164 case SOF_IPC_GLB_DAI_MSG:
165 str = "GLB_DAI_MSG";
166 switch (type) {
167 case SOF_IPC_DAI_CONFIG:
168 str2 = "CONFIG"; break;
169 case SOF_IPC_DAI_LOOPBACK:
170 str2 = "LOOPBACK"; break;
171 default:
172 str2 = "unknown type"; break;
173 }
174 break;
175 case SOF_IPC_GLB_TRACE_MSG:
176 str = "GLB_TRACE_MSG"; break;
177 case SOF_IPC_GLB_TEST_MSG:
178 str = "GLB_TEST_MSG";
179 switch (type) {
180 case SOF_IPC_TEST_IPC_FLOOD:
181 str2 = "IPC_FLOOD"; break;
182 default:
183 str2 = "unknown type"; break;
184 }
185 break;
186 case SOF_IPC_GLB_DEBUG:
187 str = "GLB_DEBUG";
188 switch (type) {
189 case SOF_IPC_DEBUG_MEM_USAGE:
190 str2 = "MEM_USAGE"; break;
191 default:
192 str2 = "unknown type"; break;
193 }
194 break;
195 case SOF_IPC_GLB_PROBE:
196 str = "GLB_PROBE";
197 switch (type) {
198 case SOF_IPC_PROBE_INIT:
199 str2 = "INIT"; break;
200 case SOF_IPC_PROBE_DEINIT:
201 str2 = "DEINIT"; break;
202 case SOF_IPC_PROBE_DMA_ADD:
203 str2 = "DMA_ADD"; break;
204 case SOF_IPC_PROBE_DMA_INFO:
205 str2 = "DMA_INFO"; break;
206 case SOF_IPC_PROBE_DMA_REMOVE:
207 str2 = "DMA_REMOVE"; break;
208 case SOF_IPC_PROBE_POINT_ADD:
209 str2 = "POINT_ADD"; break;
210 case SOF_IPC_PROBE_POINT_INFO:
211 str2 = "POINT_INFO"; break;
212 case SOF_IPC_PROBE_POINT_REMOVE:
213 str2 = "POINT_REMOVE"; break;
214 default:
215 str2 = "unknown type"; break;
216 }
217 break;
218 default:
219 str = "unknown GLB command"; break;
220 }
221
222 if (str2) {
223 if (vdbg)
224 dev_vdbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2);
225 else
226 dev_dbg(dev, "%s: 0x%x: %s: %s\n", text, cmd, str, str2);
227 } else {
228 dev_dbg(dev, "%s: 0x%x: %s\n", text, cmd, str);
229 }
230 }
231 #else
ipc_log_header(struct device * dev,u8 * text,u32 cmd)232 static inline void ipc_log_header(struct device *dev, u8 *text, u32 cmd)
233 {
234 if ((cmd & SOF_GLB_TYPE_MASK) != SOF_IPC_GLB_TRACE_MSG)
235 dev_dbg(dev, "%s: 0x%x\n", text, cmd);
236 }
237 #endif
238
239 /* wait for IPC message reply */
tx_wait_done(struct snd_sof_ipc * ipc,struct snd_sof_ipc_msg * msg,void * reply_data)240 static int tx_wait_done(struct snd_sof_ipc *ipc, struct snd_sof_ipc_msg *msg,
241 void *reply_data)
242 {
243 struct snd_sof_dev *sdev = ipc->sdev;
244 struct sof_ipc_cmd_hdr *hdr = msg->msg_data;
245 int ret;
246
247 /* wait for DSP IPC completion */
248 ret = wait_event_timeout(msg->waitq, msg->ipc_complete,
249 msecs_to_jiffies(sdev->ipc_timeout));
250
251 if (ret == 0) {
252 dev_err(sdev->dev,
253 "ipc tx timed out for %#x (msg/reply size: %d/%zu)\n",
254 hdr->cmd, hdr->size, msg->reply_size);
255 snd_sof_handle_fw_exception(ipc->sdev);
256 ret = -ETIMEDOUT;
257 } else {
258 ret = msg->reply_error;
259 if (ret < 0) {
260 dev_err(sdev->dev,
261 "ipc tx error for %#x (msg/reply size: %d/%zu): %d\n",
262 hdr->cmd, hdr->size, msg->reply_size, ret);
263 } else {
264 ipc_log_header(sdev->dev, "ipc tx succeeded", hdr->cmd);
265 if (msg->reply_size)
266 /* copy the data returned from DSP */
267 memcpy(reply_data, msg->reply_data,
268 msg->reply_size);
269 }
270
271 /* re-enable dumps after successful IPC tx */
272 if (sdev->ipc_dump_printed) {
273 sdev->dbg_dump_printed = false;
274 sdev->ipc_dump_printed = false;
275 }
276 }
277
278 return ret;
279 }
280
281 /* send IPC message from host to DSP */
sof_ipc_tx_message_unlocked(struct snd_sof_ipc * ipc,u32 header,void * msg_data,size_t msg_bytes,void * reply_data,size_t reply_bytes)282 static int sof_ipc_tx_message_unlocked(struct snd_sof_ipc *ipc, u32 header,
283 void *msg_data, size_t msg_bytes,
284 void *reply_data, size_t reply_bytes)
285 {
286 struct snd_sof_dev *sdev = ipc->sdev;
287 struct snd_sof_ipc_msg *msg;
288 int ret;
289
290 if (ipc->disable_ipc_tx)
291 return -ENODEV;
292
293 /*
294 * The spin-lock is also still needed to protect message objects against
295 * other atomic contexts.
296 */
297 spin_lock_irq(&sdev->ipc_lock);
298
299 /* initialise the message */
300 msg = &ipc->msg;
301
302 msg->header = header;
303 msg->msg_size = msg_bytes;
304 msg->reply_size = reply_bytes;
305 msg->reply_error = 0;
306
307 /* attach any data */
308 if (msg_bytes)
309 memcpy(msg->msg_data, msg_data, msg_bytes);
310
311 sdev->msg = msg;
312
313 ret = snd_sof_dsp_send_msg(sdev, msg);
314 /* Next reply that we receive will be related to this message */
315 if (!ret)
316 msg->ipc_complete = false;
317
318 spin_unlock_irq(&sdev->ipc_lock);
319
320 if (ret) {
321 dev_err_ratelimited(sdev->dev,
322 "error: ipc tx failed with error %d\n",
323 ret);
324 return ret;
325 }
326
327 ipc_log_header(sdev->dev, "ipc tx", msg->header);
328
329 /* now wait for completion */
330 return tx_wait_done(ipc, msg, reply_data);
331 }
332
333 /* send IPC message from host to DSP */
sof_ipc_tx_message(struct snd_sof_ipc * ipc,u32 header,void * msg_data,size_t msg_bytes,void * reply_data,size_t reply_bytes)334 int sof_ipc_tx_message(struct snd_sof_ipc *ipc, u32 header,
335 void *msg_data, size_t msg_bytes, void *reply_data,
336 size_t reply_bytes)
337 {
338 const struct sof_dsp_power_state target_state = {
339 .state = SOF_DSP_PM_D0,
340 };
341 int ret;
342
343 /* ensure the DSP is in D0 before sending a new IPC */
344 ret = snd_sof_dsp_set_power_state(ipc->sdev, &target_state);
345 if (ret < 0) {
346 dev_err(ipc->sdev->dev, "error: resuming DSP %d\n", ret);
347 return ret;
348 }
349
350 return sof_ipc_tx_message_no_pm(ipc, header, msg_data, msg_bytes,
351 reply_data, reply_bytes);
352 }
353 EXPORT_SYMBOL(sof_ipc_tx_message);
354
355 /*
356 * send IPC message from host to DSP without modifying the DSP state.
357 * This will be used for IPC's that can be handled by the DSP
358 * even in a low-power D0 substate.
359 */
sof_ipc_tx_message_no_pm(struct snd_sof_ipc * ipc,u32 header,void * msg_data,size_t msg_bytes,void * reply_data,size_t reply_bytes)360 int sof_ipc_tx_message_no_pm(struct snd_sof_ipc *ipc, u32 header,
361 void *msg_data, size_t msg_bytes,
362 void *reply_data, size_t reply_bytes)
363 {
364 int ret;
365
366 if (msg_bytes > SOF_IPC_MSG_MAX_SIZE ||
367 reply_bytes > SOF_IPC_MSG_MAX_SIZE)
368 return -ENOBUFS;
369
370 /* Serialise IPC TX */
371 mutex_lock(&ipc->tx_mutex);
372
373 ret = sof_ipc_tx_message_unlocked(ipc, header, msg_data, msg_bytes,
374 reply_data, reply_bytes);
375
376 mutex_unlock(&ipc->tx_mutex);
377
378 return ret;
379 }
380 EXPORT_SYMBOL(sof_ipc_tx_message_no_pm);
381
382 /* handle reply message from DSP */
snd_sof_ipc_reply(struct snd_sof_dev * sdev,u32 msg_id)383 void snd_sof_ipc_reply(struct snd_sof_dev *sdev, u32 msg_id)
384 {
385 struct snd_sof_ipc_msg *msg = &sdev->ipc->msg;
386
387 if (msg->ipc_complete) {
388 dev_dbg(sdev->dev,
389 "no reply expected, received 0x%x, will be ignored",
390 msg_id);
391 return;
392 }
393
394 /* wake up and return the error if we have waiters on this message ? */
395 msg->ipc_complete = true;
396 wake_up(&msg->waitq);
397 }
398 EXPORT_SYMBOL(snd_sof_ipc_reply);
399
ipc_comp_notification(struct snd_sof_dev * sdev,struct sof_ipc_cmd_hdr * hdr)400 static void ipc_comp_notification(struct snd_sof_dev *sdev,
401 struct sof_ipc_cmd_hdr *hdr)
402 {
403 u32 msg_type = hdr->cmd & SOF_CMD_TYPE_MASK;
404 struct sof_ipc_ctrl_data *cdata;
405 int ret;
406
407 switch (msg_type) {
408 case SOF_IPC_COMP_GET_VALUE:
409 case SOF_IPC_COMP_GET_DATA:
410 cdata = kmalloc(hdr->size, GFP_KERNEL);
411 if (!cdata)
412 return;
413
414 /* read back full message */
415 ret = snd_sof_ipc_msg_data(sdev, NULL, cdata, hdr->size);
416 if (ret < 0) {
417 dev_err(sdev->dev,
418 "error: failed to read component event: %d\n", ret);
419 goto err;
420 }
421 break;
422 default:
423 dev_err(sdev->dev, "error: unhandled component message %#x\n", msg_type);
424 return;
425 }
426
427 snd_sof_control_notify(sdev, cdata);
428
429 err:
430 kfree(cdata);
431 }
432
433 /* DSP firmware has sent host a message */
snd_sof_ipc_msgs_rx(struct snd_sof_dev * sdev)434 void snd_sof_ipc_msgs_rx(struct snd_sof_dev *sdev)
435 {
436 struct sof_ipc_cmd_hdr hdr;
437 u32 cmd, type;
438 int err;
439
440 /* read back header */
441 err = snd_sof_ipc_msg_data(sdev, NULL, &hdr, sizeof(hdr));
442 if (err < 0) {
443 dev_warn(sdev->dev, "failed to read IPC header: %d\n", err);
444 return;
445 }
446 ipc_log_header(sdev->dev, "ipc rx", hdr.cmd);
447
448 cmd = hdr.cmd & SOF_GLB_TYPE_MASK;
449 type = hdr.cmd & SOF_CMD_TYPE_MASK;
450
451 /* check message type */
452 switch (cmd) {
453 case SOF_IPC_GLB_REPLY:
454 dev_err(sdev->dev, "error: ipc reply unknown\n");
455 break;
456 case SOF_IPC_FW_READY:
457 /* check for FW boot completion */
458 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS) {
459 err = sof_ops(sdev)->fw_ready(sdev, cmd);
460 if (err < 0)
461 sof_set_fw_state(sdev, SOF_FW_BOOT_READY_FAILED);
462 else
463 sof_set_fw_state(sdev, SOF_FW_BOOT_COMPLETE);
464
465 /* wake up firmware loader */
466 wake_up(&sdev->boot_wait);
467 }
468 break;
469 case SOF_IPC_GLB_COMPOUND:
470 case SOF_IPC_GLB_TPLG_MSG:
471 case SOF_IPC_GLB_PM_MSG:
472 break;
473 case SOF_IPC_GLB_COMP_MSG:
474 ipc_comp_notification(sdev, &hdr);
475 break;
476 case SOF_IPC_GLB_STREAM_MSG:
477 /* need to pass msg id into the function */
478 ipc_stream_message(sdev, hdr.cmd);
479 break;
480 case SOF_IPC_GLB_TRACE_MSG:
481 ipc_trace_message(sdev, type);
482 break;
483 default:
484 dev_err(sdev->dev, "error: unknown DSP message 0x%x\n", cmd);
485 break;
486 }
487
488 ipc_log_header(sdev->dev, "ipc rx done", hdr.cmd);
489 }
490 EXPORT_SYMBOL(snd_sof_ipc_msgs_rx);
491
492 /*
493 * IPC trace mechanism.
494 */
495
ipc_trace_message(struct snd_sof_dev * sdev,u32 msg_type)496 static void ipc_trace_message(struct snd_sof_dev *sdev, u32 msg_type)
497 {
498 struct sof_ipc_dma_trace_posn posn;
499 int ret;
500
501 switch (msg_type) {
502 case SOF_IPC_TRACE_DMA_POSITION:
503 /* read back full message */
504 ret = snd_sof_ipc_msg_data(sdev, NULL, &posn, sizeof(posn));
505 if (ret < 0)
506 dev_warn(sdev->dev, "failed to read trace position: %d\n", ret);
507 else
508 snd_sof_trace_update_pos(sdev, &posn);
509 break;
510 default:
511 dev_err(sdev->dev, "error: unhandled trace message %#x\n", msg_type);
512 break;
513 }
514 }
515
516 /*
517 * IPC stream position.
518 */
519
ipc_period_elapsed(struct snd_sof_dev * sdev,u32 msg_id)520 static void ipc_period_elapsed(struct snd_sof_dev *sdev, u32 msg_id)
521 {
522 struct snd_soc_component *scomp = sdev->component;
523 struct snd_sof_pcm_stream *stream;
524 struct sof_ipc_stream_posn posn;
525 struct snd_sof_pcm *spcm;
526 int direction, ret;
527
528 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction);
529 if (!spcm) {
530 dev_err(sdev->dev,
531 "error: period elapsed for unknown stream, msg_id %d\n",
532 msg_id);
533 return;
534 }
535
536 stream = &spcm->stream[direction];
537 ret = snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
538 if (ret < 0) {
539 dev_warn(sdev->dev, "failed to read stream position: %d\n", ret);
540 return;
541 }
542
543 dev_vdbg(sdev->dev, "posn : host 0x%llx dai 0x%llx wall 0x%llx\n",
544 posn.host_posn, posn.dai_posn, posn.wallclock);
545
546 memcpy(&stream->posn, &posn, sizeof(posn));
547
548 if (spcm->pcm.compress)
549 snd_sof_compr_fragment_elapsed(stream->cstream);
550 else if (!stream->substream->runtime->no_period_wakeup)
551 /* only inform ALSA for period_wakeup mode */
552 snd_sof_pcm_period_elapsed(stream->substream);
553 }
554
555 /* DSP notifies host of an XRUN within FW */
ipc_xrun(struct snd_sof_dev * sdev,u32 msg_id)556 static void ipc_xrun(struct snd_sof_dev *sdev, u32 msg_id)
557 {
558 struct snd_soc_component *scomp = sdev->component;
559 struct snd_sof_pcm_stream *stream;
560 struct sof_ipc_stream_posn posn;
561 struct snd_sof_pcm *spcm;
562 int direction, ret;
563
564 spcm = snd_sof_find_spcm_comp(scomp, msg_id, &direction);
565 if (!spcm) {
566 dev_err(sdev->dev, "error: XRUN for unknown stream, msg_id %d\n",
567 msg_id);
568 return;
569 }
570
571 stream = &spcm->stream[direction];
572 ret = snd_sof_ipc_msg_data(sdev, stream->substream, &posn, sizeof(posn));
573 if (ret < 0) {
574 dev_warn(sdev->dev, "failed to read overrun position: %d\n", ret);
575 return;
576 }
577
578 dev_dbg(sdev->dev, "posn XRUN: host %llx comp %d size %d\n",
579 posn.host_posn, posn.xrun_comp_id, posn.xrun_size);
580
581 #if defined(CONFIG_SND_SOC_SOF_DEBUG_XRUN_STOP)
582 /* stop PCM on XRUN - used for pipeline debug */
583 memcpy(&stream->posn, &posn, sizeof(posn));
584 snd_pcm_stop_xrun(stream->substream);
585 #endif
586 }
587
588 /* stream notifications from DSP FW */
ipc_stream_message(struct snd_sof_dev * sdev,u32 msg_cmd)589 static void ipc_stream_message(struct snd_sof_dev *sdev, u32 msg_cmd)
590 {
591 /* get msg cmd type and msd id */
592 u32 msg_type = msg_cmd & SOF_CMD_TYPE_MASK;
593 u32 msg_id = SOF_IPC_MESSAGE_ID(msg_cmd);
594
595 switch (msg_type) {
596 case SOF_IPC_STREAM_POSITION:
597 ipc_period_elapsed(sdev, msg_id);
598 break;
599 case SOF_IPC_STREAM_TRIG_XRUN:
600 ipc_xrun(sdev, msg_id);
601 break;
602 default:
603 dev_err(sdev->dev, "error: unhandled stream message %#x\n",
604 msg_id);
605 break;
606 }
607 }
608
609 /* get stream position IPC - use faster MMIO method if available on platform */
snd_sof_ipc_stream_posn(struct snd_soc_component * scomp,struct snd_sof_pcm * spcm,int direction,struct sof_ipc_stream_posn * posn)610 int snd_sof_ipc_stream_posn(struct snd_soc_component *scomp,
611 struct snd_sof_pcm *spcm, int direction,
612 struct sof_ipc_stream_posn *posn)
613 {
614 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp);
615 struct sof_ipc_stream stream;
616 int err;
617
618 /* read position via slower IPC */
619 stream.hdr.size = sizeof(stream);
620 stream.hdr.cmd = SOF_IPC_GLB_STREAM_MSG | SOF_IPC_STREAM_POSITION;
621 stream.comp_id = spcm->stream[direction].comp_id;
622
623 /* send IPC to the DSP */
624 err = sof_ipc_tx_message(sdev->ipc,
625 stream.hdr.cmd, &stream, sizeof(stream), posn,
626 sizeof(*posn));
627 if (err < 0) {
628 dev_err(sdev->dev, "error: failed to get stream %d position\n",
629 stream.comp_id);
630 return err;
631 }
632
633 return 0;
634 }
635 EXPORT_SYMBOL(snd_sof_ipc_stream_posn);
636
sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type,struct sof_ipc_ctrl_data * src,struct sof_ipc_ctrl_data * dst,struct sof_ipc_ctrl_data_params * sparams)637 static int sof_get_ctrl_copy_params(enum sof_ipc_ctrl_type ctrl_type,
638 struct sof_ipc_ctrl_data *src,
639 struct sof_ipc_ctrl_data *dst,
640 struct sof_ipc_ctrl_data_params *sparams)
641 {
642 switch (ctrl_type) {
643 case SOF_CTRL_TYPE_VALUE_CHAN_GET:
644 case SOF_CTRL_TYPE_VALUE_CHAN_SET:
645 sparams->src = (u8 *)src->chanv;
646 sparams->dst = (u8 *)dst->chanv;
647 break;
648 case SOF_CTRL_TYPE_VALUE_COMP_GET:
649 case SOF_CTRL_TYPE_VALUE_COMP_SET:
650 sparams->src = (u8 *)src->compv;
651 sparams->dst = (u8 *)dst->compv;
652 break;
653 case SOF_CTRL_TYPE_DATA_GET:
654 case SOF_CTRL_TYPE_DATA_SET:
655 sparams->src = (u8 *)src->data->data;
656 sparams->dst = (u8 *)dst->data->data;
657 break;
658 default:
659 return -EINVAL;
660 }
661
662 /* calculate payload size and number of messages */
663 sparams->pl_size = SOF_IPC_MSG_MAX_SIZE - sparams->hdr_bytes;
664 sparams->num_msg = DIV_ROUND_UP(sparams->msg_bytes, sparams->pl_size);
665
666 return 0;
667 }
668
sof_set_get_large_ctrl_data(struct snd_sof_dev * sdev,struct sof_ipc_ctrl_data * cdata,struct sof_ipc_ctrl_data_params * sparams,bool send)669 static int sof_set_get_large_ctrl_data(struct snd_sof_dev *sdev,
670 struct sof_ipc_ctrl_data *cdata,
671 struct sof_ipc_ctrl_data_params *sparams,
672 bool send)
673 {
674 struct sof_ipc_ctrl_data *partdata;
675 size_t send_bytes;
676 size_t offset = 0;
677 size_t msg_bytes;
678 size_t pl_size;
679 int err;
680 int i;
681
682 /* allocate max ipc size because we have at least one */
683 partdata = kzalloc(SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL);
684 if (!partdata)
685 return -ENOMEM;
686
687 if (send)
688 err = sof_get_ctrl_copy_params(cdata->type, cdata, partdata,
689 sparams);
690 else
691 err = sof_get_ctrl_copy_params(cdata->type, partdata, cdata,
692 sparams);
693 if (err < 0) {
694 kfree(partdata);
695 return err;
696 }
697
698 msg_bytes = sparams->msg_bytes;
699 pl_size = sparams->pl_size;
700
701 /* copy the header data */
702 memcpy(partdata, cdata, sparams->hdr_bytes);
703
704 /* Serialise IPC TX */
705 mutex_lock(&sdev->ipc->tx_mutex);
706
707 /* copy the payload data in a loop */
708 for (i = 0; i < sparams->num_msg; i++) {
709 send_bytes = min(msg_bytes, pl_size);
710 partdata->num_elems = send_bytes;
711 partdata->rhdr.hdr.size = sparams->hdr_bytes + send_bytes;
712 partdata->msg_index = i;
713 msg_bytes -= send_bytes;
714 partdata->elems_remaining = msg_bytes;
715
716 if (send)
717 memcpy(sparams->dst, sparams->src + offset, send_bytes);
718
719 err = sof_ipc_tx_message_unlocked(sdev->ipc,
720 partdata->rhdr.hdr.cmd,
721 partdata,
722 partdata->rhdr.hdr.size,
723 partdata,
724 partdata->rhdr.hdr.size);
725 if (err < 0)
726 break;
727
728 if (!send)
729 memcpy(sparams->dst + offset, sparams->src, send_bytes);
730
731 offset += pl_size;
732 }
733
734 mutex_unlock(&sdev->ipc->tx_mutex);
735
736 kfree(partdata);
737 return err;
738 }
739
740 /*
741 * IPC get()/set() for kcontrols.
742 */
snd_sof_ipc_set_get_comp_data(struct snd_sof_control * scontrol,u32 ipc_cmd,enum sof_ipc_ctrl_type ctrl_type,enum sof_ipc_ctrl_cmd ctrl_cmd,bool send)743 int snd_sof_ipc_set_get_comp_data(struct snd_sof_control *scontrol,
744 u32 ipc_cmd,
745 enum sof_ipc_ctrl_type ctrl_type,
746 enum sof_ipc_ctrl_cmd ctrl_cmd,
747 bool send)
748 {
749 struct snd_soc_component *scomp = scontrol->scomp;
750 struct sof_ipc_ctrl_data *cdata = scontrol->control_data;
751 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scomp);
752 struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
753 struct sof_ipc_fw_version *v = &ready->version;
754 struct sof_ipc_ctrl_data_params sparams;
755 struct snd_sof_widget *swidget;
756 bool widget_found = false;
757 size_t send_bytes;
758 int err;
759
760 list_for_each_entry(swidget, &sdev->widget_list, list) {
761 if (swidget->comp_id == scontrol->comp_id) {
762 widget_found = true;
763 break;
764 }
765 }
766
767 if (!widget_found) {
768 dev_err(sdev->dev, "error: can't find widget with id %d\n", scontrol->comp_id);
769 return -EINVAL;
770 }
771
772 /*
773 * Volatile controls should always be part of static pipelines and the widget use_count
774 * would always be > 0 in this case. For the others, just return the cached value if the
775 * widget is not set up.
776 */
777 if (!swidget->use_count)
778 return 0;
779
780 /* read or write firmware volume */
781 if (scontrol->readback_offset != 0) {
782 /* write/read value header via mmaped region */
783 send_bytes = sizeof(struct sof_ipc_ctrl_value_chan) *
784 cdata->num_elems;
785 if (send)
786 err = snd_sof_dsp_block_write(sdev, SOF_FW_BLK_TYPE_IRAM,
787 scontrol->readback_offset,
788 cdata->chanv, send_bytes);
789
790 else
791 err = snd_sof_dsp_block_read(sdev, SOF_FW_BLK_TYPE_IRAM,
792 scontrol->readback_offset,
793 cdata->chanv, send_bytes);
794
795 if (err)
796 dev_err_once(sdev->dev, "error: %s TYPE_IRAM failed\n",
797 send ? "write to" : "read from");
798 return err;
799 }
800
801 cdata->rhdr.hdr.cmd = SOF_IPC_GLB_COMP_MSG | ipc_cmd;
802 cdata->cmd = ctrl_cmd;
803 cdata->type = ctrl_type;
804 cdata->comp_id = scontrol->comp_id;
805 cdata->msg_index = 0;
806
807 /* calculate header and data size */
808 switch (cdata->type) {
809 case SOF_CTRL_TYPE_VALUE_CHAN_GET:
810 case SOF_CTRL_TYPE_VALUE_CHAN_SET:
811 sparams.msg_bytes = scontrol->num_channels *
812 sizeof(struct sof_ipc_ctrl_value_chan);
813 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
814 sparams.elems = scontrol->num_channels;
815 break;
816 case SOF_CTRL_TYPE_VALUE_COMP_GET:
817 case SOF_CTRL_TYPE_VALUE_COMP_SET:
818 sparams.msg_bytes = scontrol->num_channels *
819 sizeof(struct sof_ipc_ctrl_value_comp);
820 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data);
821 sparams.elems = scontrol->num_channels;
822 break;
823 case SOF_CTRL_TYPE_DATA_GET:
824 case SOF_CTRL_TYPE_DATA_SET:
825 sparams.msg_bytes = cdata->data->size;
826 sparams.hdr_bytes = sizeof(struct sof_ipc_ctrl_data) +
827 sizeof(struct sof_abi_hdr);
828 sparams.elems = cdata->data->size;
829 break;
830 default:
831 return -EINVAL;
832 }
833
834 cdata->rhdr.hdr.size = sparams.msg_bytes + sparams.hdr_bytes;
835 cdata->num_elems = sparams.elems;
836 cdata->elems_remaining = 0;
837
838 /* send normal size ipc in one part */
839 if (cdata->rhdr.hdr.size <= SOF_IPC_MSG_MAX_SIZE) {
840 err = sof_ipc_tx_message(sdev->ipc, cdata->rhdr.hdr.cmd, cdata,
841 cdata->rhdr.hdr.size, cdata,
842 cdata->rhdr.hdr.size);
843
844 if (err < 0)
845 dev_err(sdev->dev, "error: set/get ctrl ipc comp %d\n",
846 cdata->comp_id);
847
848 return err;
849 }
850
851 /* data is bigger than max ipc size, chop into smaller pieces */
852 dev_dbg(sdev->dev, "large ipc size %u, control size %u\n",
853 cdata->rhdr.hdr.size, scontrol->size);
854
855 /* large messages is only supported from ABI 3.3.0 onwards */
856 if (v->abi_version < SOF_ABI_VER(3, 3, 0)) {
857 dev_err(sdev->dev, "error: incompatible FW ABI version\n");
858 return -EINVAL;
859 }
860
861 err = sof_set_get_large_ctrl_data(sdev, cdata, &sparams, send);
862
863 if (err < 0)
864 dev_err(sdev->dev, "error: set/get large ctrl ipc comp %d\n",
865 cdata->comp_id);
866
867 return err;
868 }
869 EXPORT_SYMBOL(snd_sof_ipc_set_get_comp_data);
870
snd_sof_ipc_valid(struct snd_sof_dev * sdev)871 int snd_sof_ipc_valid(struct snd_sof_dev *sdev)
872 {
873 struct sof_ipc_fw_ready *ready = &sdev->fw_ready;
874 struct sof_ipc_fw_version *v = &ready->version;
875
876 dev_info(sdev->dev,
877 "Firmware info: version %d:%d:%d-%s\n", v->major, v->minor,
878 v->micro, v->tag);
879 dev_info(sdev->dev,
880 "Firmware: ABI %d:%d:%d Kernel ABI %d:%d:%d\n",
881 SOF_ABI_VERSION_MAJOR(v->abi_version),
882 SOF_ABI_VERSION_MINOR(v->abi_version),
883 SOF_ABI_VERSION_PATCH(v->abi_version),
884 SOF_ABI_MAJOR, SOF_ABI_MINOR, SOF_ABI_PATCH);
885
886 if (SOF_ABI_VERSION_INCOMPATIBLE(SOF_ABI_VERSION, v->abi_version)) {
887 dev_err(sdev->dev, "error: incompatible FW ABI version\n");
888 return -EINVAL;
889 }
890
891 if (SOF_ABI_VERSION_MINOR(v->abi_version) > SOF_ABI_MINOR) {
892 if (!IS_ENABLED(CONFIG_SND_SOC_SOF_STRICT_ABI_CHECKS)) {
893 dev_warn(sdev->dev, "warn: FW ABI is more recent than kernel\n");
894 } else {
895 dev_err(sdev->dev, "error: FW ABI is more recent than kernel\n");
896 return -EINVAL;
897 }
898 }
899
900 if (ready->flags & SOF_IPC_INFO_BUILD) {
901 dev_info(sdev->dev,
902 "Firmware debug build %d on %s-%s - options:\n"
903 " GDB: %s\n"
904 " lock debug: %s\n"
905 " lock vdebug: %s\n",
906 v->build, v->date, v->time,
907 (ready->flags & SOF_IPC_INFO_GDB) ?
908 "enabled" : "disabled",
909 (ready->flags & SOF_IPC_INFO_LOCKS) ?
910 "enabled" : "disabled",
911 (ready->flags & SOF_IPC_INFO_LOCKSV) ?
912 "enabled" : "disabled");
913 }
914
915 /* copy the fw_version into debugfs at first boot */
916 memcpy(&sdev->fw_version, v, sizeof(*v));
917
918 return 0;
919 }
920 EXPORT_SYMBOL(snd_sof_ipc_valid);
921
sof_ipc_init_msg_memory(struct snd_sof_dev * sdev)922 int sof_ipc_init_msg_memory(struct snd_sof_dev *sdev)
923 {
924 struct snd_sof_ipc_msg *msg;
925
926 msg = &sdev->ipc->msg;
927 msg->msg_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL);
928 if (!msg->msg_data)
929 return -ENOMEM;
930
931 msg->reply_data = devm_kzalloc(sdev->dev, SOF_IPC_MSG_MAX_SIZE, GFP_KERNEL);
932 if (!msg->reply_data)
933 return -ENOMEM;
934
935 return 0;
936 }
937
snd_sof_ipc_init(struct snd_sof_dev * sdev)938 struct snd_sof_ipc *snd_sof_ipc_init(struct snd_sof_dev *sdev)
939 {
940 struct snd_sof_ipc *ipc;
941 struct snd_sof_ipc_msg *msg;
942
943 ipc = devm_kzalloc(sdev->dev, sizeof(*ipc), GFP_KERNEL);
944 if (!ipc)
945 return NULL;
946
947 mutex_init(&ipc->tx_mutex);
948 ipc->sdev = sdev;
949 msg = &ipc->msg;
950
951 /* indicate that we aren't sending a message ATM */
952 msg->ipc_complete = true;
953
954 init_waitqueue_head(&msg->waitq);
955
956 return ipc;
957 }
958 EXPORT_SYMBOL(snd_sof_ipc_init);
959
snd_sof_ipc_free(struct snd_sof_dev * sdev)960 void snd_sof_ipc_free(struct snd_sof_dev *sdev)
961 {
962 struct snd_sof_ipc *ipc = sdev->ipc;
963
964 if (!ipc)
965 return;
966
967 /* disable sending of ipc's */
968 mutex_lock(&ipc->tx_mutex);
969 ipc->disable_ipc_tx = true;
970 mutex_unlock(&ipc->tx_mutex);
971 }
972 EXPORT_SYMBOL(snd_sof_ipc_free);
973