1 #ifndef __ASM_ARM_ARM32_PROCESSOR_H
2 #define __ASM_ARM_ARM32_PROCESSOR_H
3 
4 #define ACTLR_CAXX_SMP      (1<<6)
5 
6 #ifndef __ASSEMBLY__
7 /* On stack VCPU state */
8 struct cpu_user_regs
9 {
10     uint32_t r0;
11     uint32_t r1;
12     uint32_t r2;
13     uint32_t r3;
14     uint32_t r4;
15     uint32_t r5;
16     uint32_t r6;
17     uint32_t r7;
18     uint32_t r8;
19     uint32_t r9;
20     uint32_t r10;
21     union {
22         uint32_t r11;
23         uint32_t fp;
24     };
25     uint32_t r12;
26 
27     uint32_t sp; /* r13 - SP: Valid for Hyp. frames only, o/w banked (see below) */
28 
29     /* r14 - LR: is the same physical register as LR_usr */
30     union {
31         uint32_t lr; /* r14 - LR: Valid for Hyp. Same physical register as lr_usr. */
32 
33         uint32_t lr_usr;
34     };
35 
36     union {  /* Return IP, pc32 is used to allow code to be common with 64-bit */
37         uint32_t pc, pc32;
38     };
39     uint32_t cpsr; /* Return mode */
40     uint32_t hsr;  /* Exception Syndrome */
41 
42     /* Outer guest frame only from here on... */
43 
44     uint32_t sp_usr; /* LR_usr is the same register as LR, see above */
45 
46     uint32_t sp_irq, lr_irq;
47     uint32_t sp_svc, lr_svc;
48     uint32_t sp_abt, lr_abt;
49     uint32_t sp_und, lr_und;
50 
51     uint32_t r8_fiq, r9_fiq, r10_fiq, r11_fiq, r12_fiq;
52     uint32_t sp_fiq, lr_fiq;
53 
54     uint32_t spsr_svc, spsr_abt, spsr_und, spsr_irq, spsr_fiq;
55 
56     uint32_t pad1; /* Doubleword-align the user half of the frame */
57 };
58 
59 #endif
60 
61 #endif /* __ASM_ARM_ARM32_PROCESSOR_H */
62 /*
63  * Local variables:
64  * mode: C
65  * c-file-style: "BSD"
66  * c-basic-offset: 4
67  * indent-tabs-mode: nil
68  * End:
69  */
70