1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2009
4  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
5  */
6 
7 #include <common.h>
8 #include <command.h>
9 #include <cpu_func.h>
10 #include <env.h>
11 #include <i2c.h>
12 #include <init.h>
13 #include <net.h>
14 #include <asm/global_data.h>
15 #include <linux/mtd/st_smi.h>
16 #include <asm/io.h>
17 #include <asm/arch/hardware.h>
18 #include <asm/arch/spr_emi.h>
19 #include <asm/arch/spr_defs.h>
20 
21 #define CPU		0
22 #define DDR		1
23 #define SRAM_REL	0xD2801000
24 
25 DECLARE_GLOBAL_DATA_PTR;
26 
27 #if defined(CONFIG_CMD_NET)
28 static int i2c_read_mac(uchar *buffer);
29 #endif
30 
dram_init(void)31 int dram_init(void)
32 {
33 	/* Store complete RAM size and return */
34 	gd->ram_size = get_ram_size(PHYS_SDRAM_1, PHYS_SDRAM_1_MAXSIZE);
35 
36 	return 0;
37 }
38 
dram_init_banksize(void)39 int dram_init_banksize(void)
40 {
41 	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
42 	gd->bd->bi_dram[0].size = gd->ram_size;
43 
44 	return 0;
45 }
46 
board_early_init_f()47 int board_early_init_f()
48 {
49 #if defined(CONFIG_ST_SMI)
50 	smi_init();
51 #endif
52 	return 0;
53 }
misc_init_r(void)54 int misc_init_r(void)
55 {
56 #if defined(CONFIG_CMD_NET)
57 	uchar mac_id[6];
58 
59 	if (!eth_env_get_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
60 		eth_env_set_enetaddr("ethaddr", mac_id);
61 #endif
62 	env_set("verify", "n");
63 
64 #if defined(CONFIG_SPEAR_USBTTY)
65 	env_set("stdin", "usbtty");
66 	env_set("stdout", "usbtty");
67 	env_set("stderr", "usbtty");
68 
69 #ifndef CONFIG_SYS_NO_DCACHE
70 	dcache_enable();
71 #endif
72 #endif
73 	return 0;
74 }
75 
76 #ifdef CONFIG_SPEAR_EMI
77 struct cust_emi_para {
78 	unsigned int tap;
79 	unsigned int tsdp;
80 	unsigned int tdpw;
81 	unsigned int tdpr;
82 	unsigned int tdcs;
83 };
84 
85 /* EMI timing setting of m28w640hc of linux kernel */
86 const struct cust_emi_para emi_timing_m28w640hc = {
87 	.tap = 0x10,
88 	.tsdp = 0x05,
89 	.tdpw = 0x0a,
90 	.tdpr = 0x0a,
91 	.tdcs = 0x05,
92 };
93 
94 /* EMI timing setting of bootrom */
95 const struct cust_emi_para emi_timing_bootrom = {
96 	.tap = 0xf,
97 	.tsdp = 0x0,
98 	.tdpw = 0xff,
99 	.tdpr = 0x111,
100 	.tdcs = 0x02,
101 };
102 
spear_emi_init(void)103 void spear_emi_init(void)
104 {
105 	const struct cust_emi_para *p = &emi_timing_m28w640hc;
106 	struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE;
107 	unsigned int cs;
108 	unsigned int val, tmp;
109 
110 	val = readl(CONFIG_SPEAR_RASBASE);
111 
112 	if (val & EMI_ACKMSK)
113 		tmp = 0x3f;
114 	else
115 		tmp = 0x0;
116 
117 	writel(tmp, &emi_regs_p->ack);
118 
119 	for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) {
120 		writel(p->tap, &emi_regs_p->bank_regs[cs].tap);
121 		writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp);
122 		writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw);
123 		writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr);
124 		writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs);
125 		writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3),
126 		       &emi_regs_p->bank_regs[cs].control);
127 	}
128 }
129 #endif
130 
spear_board_init(ulong mach_type)131 int spear_board_init(ulong mach_type)
132 {
133 	gd->bd->bi_arch_number = mach_type;
134 
135 	/* adress of boot parameters */
136 	gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
137 
138 #ifdef CONFIG_SPEAR_EMI
139 	spear_emi_init();
140 #endif
141 	return 0;
142 }
143 
144 #if defined(CONFIG_CMD_NET)
i2c_read_mac(uchar * buffer)145 static int i2c_read_mac(uchar *buffer)
146 {
147 	u8 buf[2];
148 
149 	i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
150 
151 	/* Check if mac in i2c memory is valid */
152 	if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
153 		/* Valid mac address is saved in i2c eeprom */
154 		i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, buffer, MAC_LEN);
155 		return 0;
156 	}
157 
158 	return -1;
159 }
160 
write_mac(uchar * mac)161 static int write_mac(uchar *mac)
162 {
163 	u8 buf[2];
164 
165 	buf[0] = (u8)MAGIC_BYTE0;
166 	buf[1] = (u8)MAGIC_BYTE1;
167 	i2c_write(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
168 
169 	buf[0] = (u8)~MAGIC_BYTE0;
170 	buf[1] = (u8)~MAGIC_BYTE1;
171 
172 	i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
173 
174 	/* check if valid MAC address is saved in I2C EEPROM or not? */
175 	if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
176 		i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN);
177 		puts("I2C EEPROM written with mac address \n");
178 		return 0;
179 	}
180 
181 	puts("I2C EEPROM writing failed\n");
182 	return -1;
183 }
184 #endif
185 
do_chip_config(struct cmd_tbl * cmdtp,int flag,int argc,char * const argv[])186 int do_chip_config(struct cmd_tbl *cmdtp, int flag, int argc,
187 		   char *const argv[])
188 {
189 	void (*sram_setfreq) (unsigned int, unsigned int);
190 	unsigned int frequency;
191 #if defined(CONFIG_CMD_NET)
192 	unsigned char mac[6];
193 #endif
194 
195 	if ((argc > 3) || (argc < 2))
196 		return cmd_usage(cmdtp);
197 
198 	if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
199 
200 		frequency = simple_strtoul(argv[2], NULL, 0);
201 
202 		if (frequency > 333) {
203 			printf("Frequency is limited to 333MHz\n");
204 			return 1;
205 		}
206 
207 		sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz);
208 
209 		if (!strcmp(argv[1], "cpufreq")) {
210 			sram_setfreq(CPU, frequency);
211 			printf("CPU frequency changed to %u\n", frequency);
212 		} else {
213 			sram_setfreq(DDR, frequency);
214 			printf("DDR frequency changed to %u\n", frequency);
215 		}
216 
217 		return 0;
218 
219 #if defined(CONFIG_CMD_NET)
220 	} else if (!strcmp(argv[1], "ethaddr")) {
221 
222 		u32 reg;
223 		char *e, *s = argv[2];
224 		for (reg = 0; reg < 6; ++reg) {
225 			mac[reg] = s ? simple_strtoul(s, &e, 16) : 0;
226 			if (s)
227 				s = (*e) ? e + 1 : e;
228 		}
229 		write_mac(mac);
230 
231 		return 0;
232 #endif
233 	} else if (!strcmp(argv[1], "print")) {
234 #if defined(CONFIG_CMD_NET)
235 		if (!i2c_read_mac(mac)) {
236 			printf("Ethaddr (from i2c mem) = %pM\n", mac);
237 		} else {
238 			printf("Ethaddr (from i2c mem) = Not set\n");
239 		}
240 #endif
241 		return 0;
242 	}
243 
244 	return cmd_usage(cmdtp);
245 }
246 
247 U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
248 	   "configure chip",
249 	   "chip_config cpufreq/ddrfreq frequency\n"
250 #if defined(CONFIG_CMD_NET)
251 	   "chip_config ethaddr XX:XX:XX:XX:XX:XX\n"
252 #endif
253 	   "chip_config print");
254