1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Spreadtrum pin controller driver
4 * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com
5 */
6
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/init.h>
10 #include <linux/io.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/of.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pinctrl/machine.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinconf-generic.h>
19 #include <linux/pinctrl/pinctrl.h>
20 #include <linux/pinctrl/pinmux.h>
21 #include <linux/slab.h>
22
23 #include "../core.h"
24 #include "../pinmux.h"
25 #include "../pinconf.h"
26 #include "../pinctrl-utils.h"
27 #include "pinctrl-sprd.h"
28
29 #define PINCTRL_BIT_MASK(width) (~(~0UL << (width)))
30 #define PINCTRL_REG_OFFSET 0x20
31 #define PINCTRL_REG_MISC_OFFSET 0x4020
32 #define PINCTRL_REG_LEN 0x4
33
34 #define PIN_FUNC_MASK (BIT(4) | BIT(5))
35 #define PIN_FUNC_SEL_1 ~PIN_FUNC_MASK
36 #define PIN_FUNC_SEL_2 BIT(4)
37 #define PIN_FUNC_SEL_3 BIT(5)
38 #define PIN_FUNC_SEL_4 PIN_FUNC_MASK
39
40 #define AP_SLEEP_MODE BIT(13)
41 #define PUBCP_SLEEP_MODE BIT(14)
42 #define TGLDSP_SLEEP_MODE BIT(15)
43 #define AGDSP_SLEEP_MODE BIT(16)
44 #define CM4_SLEEP_MODE BIT(17)
45 #define SLEEP_MODE_MASK GENMASK(5, 0)
46 #define SLEEP_MODE_SHIFT 13
47
48 #define SLEEP_INPUT BIT(1)
49 #define SLEEP_INPUT_MASK 0x1
50 #define SLEEP_INPUT_SHIFT 1
51
52 #define SLEEP_OUTPUT BIT(0)
53 #define SLEEP_OUTPUT_MASK 0x1
54 #define SLEEP_OUTPUT_SHIFT 0
55
56 #define DRIVE_STRENGTH_MASK GENMASK(3, 0)
57 #define DRIVE_STRENGTH_SHIFT 19
58
59 #define SLEEP_PULL_DOWN BIT(2)
60 #define SLEEP_PULL_DOWN_MASK 0x1
61 #define SLEEP_PULL_DOWN_SHIFT 2
62
63 #define PULL_DOWN BIT(6)
64 #define PULL_DOWN_MASK 0x1
65 #define PULL_DOWN_SHIFT 6
66
67 #define SLEEP_PULL_UP BIT(3)
68 #define SLEEP_PULL_UP_MASK 0x1
69 #define SLEEP_PULL_UP_SHIFT 3
70
71 #define PULL_UP_4_7K (BIT(12) | BIT(7))
72 #define PULL_UP_20K BIT(7)
73 #define PULL_UP_MASK 0x21
74 #define PULL_UP_SHIFT 7
75
76 #define INPUT_SCHMITT BIT(11)
77 #define INPUT_SCHMITT_MASK 0x1
78 #define INPUT_SCHMITT_SHIFT 11
79
80 enum pin_sleep_mode {
81 AP_SLEEP = BIT(0),
82 PUBCP_SLEEP = BIT(1),
83 TGLDSP_SLEEP = BIT(2),
84 AGDSP_SLEEP = BIT(3),
85 CM4_SLEEP = BIT(4),
86 };
87
88 enum pin_func_sel {
89 PIN_FUNC_1,
90 PIN_FUNC_2,
91 PIN_FUNC_3,
92 PIN_FUNC_4,
93 PIN_FUNC_MAX,
94 };
95
96 /**
97 * struct sprd_pin: represent one pin's description
98 * @name: pin name
99 * @number: pin number
100 * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN
101 * @reg: pin register address
102 * @bit_offset: bit offset in pin register
103 * @bit_width: bit width in pin register
104 */
105 struct sprd_pin {
106 const char *name;
107 unsigned int number;
108 enum pin_type type;
109 unsigned long reg;
110 unsigned long bit_offset;
111 unsigned long bit_width;
112 };
113
114 /**
115 * struct sprd_pin_group: represent one group's description
116 * @name: group name
117 * @npins: pin numbers of this group
118 * @pins: pointer to pins array
119 */
120 struct sprd_pin_group {
121 const char *name;
122 unsigned int npins;
123 unsigned int *pins;
124 };
125
126 /**
127 * struct sprd_pinctrl_soc_info: represent the SoC's pins description
128 * @groups: pointer to groups of pins
129 * @ngroups: group numbers of the whole SoC
130 * @pins: pointer to pins description
131 * @npins: pin numbers of the whole SoC
132 * @grp_names: pointer to group names array
133 */
134 struct sprd_pinctrl_soc_info {
135 struct sprd_pin_group *groups;
136 unsigned int ngroups;
137 struct sprd_pin *pins;
138 unsigned int npins;
139 const char **grp_names;
140 };
141
142 /**
143 * struct sprd_pinctrl: represent the pin controller device
144 * @dev: pointer to the device structure
145 * @pctl: pointer to the pinctrl handle
146 * @base: base address of the controller
147 * @info: pointer to SoC's pins description information
148 */
149 struct sprd_pinctrl {
150 struct device *dev;
151 struct pinctrl_dev *pctl;
152 void __iomem *base;
153 struct sprd_pinctrl_soc_info *info;
154 };
155
156 #define SPRD_PIN_CONFIG_CONTROL (PIN_CONFIG_END + 1)
157 #define SPRD_PIN_CONFIG_SLEEP_MODE (PIN_CONFIG_END + 2)
158
sprd_pinctrl_get_id_by_name(struct sprd_pinctrl * sprd_pctl,const char * name)159 static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl,
160 const char *name)
161 {
162 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
163 int i;
164
165 for (i = 0; i < info->npins; i++) {
166 if (!strcmp(info->pins[i].name, name))
167 return info->pins[i].number;
168 }
169
170 return -ENODEV;
171 }
172
173 static struct sprd_pin *
sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl * sprd_pctl,unsigned int id)174 sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id)
175 {
176 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
177 struct sprd_pin *pin = NULL;
178 int i;
179
180 for (i = 0; i < info->npins; i++) {
181 if (info->pins[i].number == id) {
182 pin = &info->pins[i];
183 break;
184 }
185 }
186
187 return pin;
188 }
189
190 static const struct sprd_pin_group *
sprd_pinctrl_find_group_by_name(struct sprd_pinctrl * sprd_pctl,const char * name)191 sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl,
192 const char *name)
193 {
194 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
195 const struct sprd_pin_group *grp = NULL;
196 int i;
197
198 for (i = 0; i < info->ngroups; i++) {
199 if (!strcmp(info->groups[i].name, name)) {
200 grp = &info->groups[i];
201 break;
202 }
203 }
204
205 return grp;
206 }
207
sprd_pctrl_group_count(struct pinctrl_dev * pctldev)208 static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev)
209 {
210 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
211 struct sprd_pinctrl_soc_info *info = pctl->info;
212
213 return info->ngroups;
214 }
215
sprd_pctrl_group_name(struct pinctrl_dev * pctldev,unsigned int selector)216 static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev,
217 unsigned int selector)
218 {
219 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
220 struct sprd_pinctrl_soc_info *info = pctl->info;
221
222 return info->groups[selector].name;
223 }
224
sprd_pctrl_group_pins(struct pinctrl_dev * pctldev,unsigned int selector,const unsigned int ** pins,unsigned int * npins)225 static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev,
226 unsigned int selector,
227 const unsigned int **pins,
228 unsigned int *npins)
229 {
230 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
231 struct sprd_pinctrl_soc_info *info = pctl->info;
232
233 if (selector >= info->ngroups)
234 return -EINVAL;
235
236 *pins = info->groups[selector].pins;
237 *npins = info->groups[selector].npins;
238
239 return 0;
240 }
241
sprd_dt_node_to_map(struct pinctrl_dev * pctldev,struct device_node * np,struct pinctrl_map ** map,unsigned int * num_maps)242 static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev,
243 struct device_node *np,
244 struct pinctrl_map **map,
245 unsigned int *num_maps)
246 {
247 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
248 const struct sprd_pin_group *grp;
249 unsigned long *configs = NULL;
250 unsigned int num_configs = 0;
251 unsigned int reserved_maps = 0;
252 unsigned int reserve = 0;
253 const char *function;
254 enum pinctrl_map_type type;
255 int ret;
256
257 grp = sprd_pinctrl_find_group_by_name(pctl, np->name);
258 if (!grp) {
259 dev_err(pctl->dev, "unable to find group for node %s\n",
260 of_node_full_name(np));
261 return -EINVAL;
262 }
263
264 ret = of_property_count_strings(np, "pins");
265 if (ret < 0)
266 return ret;
267
268 if (ret == 1)
269 type = PIN_MAP_TYPE_CONFIGS_PIN;
270 else
271 type = PIN_MAP_TYPE_CONFIGS_GROUP;
272
273 ret = of_property_read_string(np, "function", &function);
274 if (ret < 0) {
275 if (ret != -EINVAL)
276 dev_err(pctl->dev,
277 "%s: could not parse property function\n",
278 of_node_full_name(np));
279 function = NULL;
280 }
281
282 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
283 &num_configs);
284 if (ret < 0) {
285 dev_err(pctl->dev, "%s: could not parse node property\n",
286 of_node_full_name(np));
287 return ret;
288 }
289
290 *map = NULL;
291 *num_maps = 0;
292
293 if (function != NULL)
294 reserve++;
295 if (num_configs)
296 reserve++;
297
298 ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps,
299 num_maps, reserve);
300 if (ret < 0)
301 goto out;
302
303 if (function) {
304 ret = pinctrl_utils_add_map_mux(pctldev, map,
305 &reserved_maps, num_maps,
306 grp->name, function);
307 if (ret < 0)
308 goto out;
309 }
310
311 if (num_configs) {
312 const char *group_or_pin;
313 unsigned int pin_id;
314
315 if (type == PIN_MAP_TYPE_CONFIGS_PIN) {
316 pin_id = grp->pins[0];
317 group_or_pin = pin_get_name(pctldev, pin_id);
318 } else {
319 group_or_pin = grp->name;
320 }
321
322 ret = pinctrl_utils_add_map_configs(pctldev, map,
323 &reserved_maps, num_maps,
324 group_or_pin, configs,
325 num_configs, type);
326 }
327
328 out:
329 kfree(configs);
330 return ret;
331 }
332
sprd_pctrl_dbg_show(struct pinctrl_dev * pctldev,struct seq_file * s,unsigned int offset)333 static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
334 unsigned int offset)
335 {
336 seq_printf(s, "%s", dev_name(pctldev->dev));
337 }
338
339 static const struct pinctrl_ops sprd_pctrl_ops = {
340 .get_groups_count = sprd_pctrl_group_count,
341 .get_group_name = sprd_pctrl_group_name,
342 .get_group_pins = sprd_pctrl_group_pins,
343 .pin_dbg_show = sprd_pctrl_dbg_show,
344 .dt_node_to_map = sprd_dt_node_to_map,
345 .dt_free_map = pinctrl_utils_free_map,
346 };
347
sprd_pmx_get_function_count(struct pinctrl_dev * pctldev)348 static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev)
349 {
350 return PIN_FUNC_MAX;
351 }
352
sprd_pmx_get_function_name(struct pinctrl_dev * pctldev,unsigned int selector)353 static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev,
354 unsigned int selector)
355 {
356 switch (selector) {
357 case PIN_FUNC_1:
358 return "func1";
359 case PIN_FUNC_2:
360 return "func2";
361 case PIN_FUNC_3:
362 return "func3";
363 case PIN_FUNC_4:
364 return "func4";
365 default:
366 return "null";
367 }
368 }
369
sprd_pmx_get_function_groups(struct pinctrl_dev * pctldev,unsigned int selector,const char * const ** groups,unsigned int * const num_groups)370 static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev,
371 unsigned int selector,
372 const char * const **groups,
373 unsigned int * const num_groups)
374 {
375 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
376 struct sprd_pinctrl_soc_info *info = pctl->info;
377
378 *groups = info->grp_names;
379 *num_groups = info->ngroups;
380
381 return 0;
382 }
383
sprd_pmx_set_mux(struct pinctrl_dev * pctldev,unsigned int func_selector,unsigned int group_selector)384 static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev,
385 unsigned int func_selector,
386 unsigned int group_selector)
387 {
388 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
389 struct sprd_pinctrl_soc_info *info = pctl->info;
390 struct sprd_pin_group *grp = &info->groups[group_selector];
391 unsigned int i, grp_pins = grp->npins;
392 unsigned long reg;
393 unsigned int val = 0;
394
395 if (group_selector >= info->ngroups)
396 return -EINVAL;
397
398 switch (func_selector) {
399 case PIN_FUNC_1:
400 val &= PIN_FUNC_SEL_1;
401 break;
402 case PIN_FUNC_2:
403 val |= PIN_FUNC_SEL_2;
404 break;
405 case PIN_FUNC_3:
406 val |= PIN_FUNC_SEL_3;
407 break;
408 case PIN_FUNC_4:
409 val |= PIN_FUNC_SEL_4;
410 break;
411 default:
412 break;
413 }
414
415 for (i = 0; i < grp_pins; i++) {
416 unsigned int pin_id = grp->pins[i];
417 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
418
419 if (!pin || pin->type != COMMON_PIN)
420 continue;
421
422 reg = readl((void __iomem *)pin->reg);
423 reg &= ~PIN_FUNC_MASK;
424 reg |= val;
425 writel(reg, (void __iomem *)pin->reg);
426 }
427
428 return 0;
429 }
430
431 static const struct pinmux_ops sprd_pmx_ops = {
432 .get_functions_count = sprd_pmx_get_function_count,
433 .get_function_name = sprd_pmx_get_function_name,
434 .get_function_groups = sprd_pmx_get_function_groups,
435 .set_mux = sprd_pmx_set_mux,
436 };
437
sprd_pinconf_get(struct pinctrl_dev * pctldev,unsigned int pin_id,unsigned long * config)438 static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id,
439 unsigned long *config)
440 {
441 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
442 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
443 unsigned int param = pinconf_to_config_param(*config);
444 unsigned int reg, arg;
445
446 if (!pin)
447 return -EINVAL;
448
449 if (pin->type == GLOBAL_CTRL_PIN) {
450 reg = (readl((void __iomem *)pin->reg) >>
451 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
452 } else {
453 reg = readl((void __iomem *)pin->reg);
454 }
455
456 if (pin->type == GLOBAL_CTRL_PIN &&
457 param == SPRD_PIN_CONFIG_CONTROL) {
458 arg = reg;
459 } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
460 switch (param) {
461 case SPRD_PIN_CONFIG_SLEEP_MODE:
462 arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK;
463 break;
464 case PIN_CONFIG_INPUT_ENABLE:
465 arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK;
466 break;
467 case PIN_CONFIG_OUTPUT_ENABLE:
468 arg = reg & SLEEP_OUTPUT_MASK;
469 break;
470 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
471 if ((reg & SLEEP_OUTPUT) || (reg & SLEEP_INPUT))
472 return -EINVAL;
473
474 arg = 1;
475 break;
476 case PIN_CONFIG_DRIVE_STRENGTH:
477 arg = (reg >> DRIVE_STRENGTH_SHIFT) &
478 DRIVE_STRENGTH_MASK;
479 break;
480 case PIN_CONFIG_BIAS_PULL_DOWN:
481 /* combine sleep pull down and pull down config */
482 arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) &
483 SLEEP_PULL_DOWN_MASK) << 16;
484 arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK;
485 break;
486 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
487 arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK;
488 break;
489 case PIN_CONFIG_BIAS_PULL_UP:
490 /* combine sleep pull up and pull up config */
491 arg = ((reg >> SLEEP_PULL_UP_SHIFT) &
492 SLEEP_PULL_UP_MASK) << 16;
493 arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK;
494 break;
495 case PIN_CONFIG_BIAS_DISABLE:
496 if ((reg & (SLEEP_PULL_DOWN | SLEEP_PULL_UP)) ||
497 (reg & (PULL_DOWN | PULL_UP_4_7K | PULL_UP_20K)))
498 return -EINVAL;
499
500 arg = 1;
501 break;
502 case PIN_CONFIG_SLEEP_HARDWARE_STATE:
503 arg = 0;
504 break;
505 default:
506 return -ENOTSUPP;
507 }
508 } else {
509 return -ENOTSUPP;
510 }
511
512 *config = pinconf_to_config_packed(param, arg);
513 return 0;
514 }
515
sprd_pinconf_drive(unsigned int mA)516 static unsigned int sprd_pinconf_drive(unsigned int mA)
517 {
518 unsigned int val = 0;
519
520 switch (mA) {
521 case 2:
522 break;
523 case 4:
524 val |= BIT(19);
525 break;
526 case 6:
527 val |= BIT(20);
528 break;
529 case 8:
530 val |= BIT(19) | BIT(20);
531 break;
532 case 10:
533 val |= BIT(21);
534 break;
535 case 12:
536 val |= BIT(21) | BIT(19);
537 break;
538 case 14:
539 val |= BIT(21) | BIT(20);
540 break;
541 case 16:
542 val |= BIT(19) | BIT(20) | BIT(21);
543 break;
544 case 20:
545 val |= BIT(22);
546 break;
547 case 21:
548 val |= BIT(22) | BIT(19);
549 break;
550 case 24:
551 val |= BIT(22) | BIT(20);
552 break;
553 case 25:
554 val |= BIT(22) | BIT(20) | BIT(19);
555 break;
556 case 27:
557 val |= BIT(22) | BIT(21);
558 break;
559 case 29:
560 val |= BIT(22) | BIT(21) | BIT(19);
561 break;
562 case 31:
563 val |= BIT(22) | BIT(21) | BIT(20);
564 break;
565 case 33:
566 val |= BIT(22) | BIT(21) | BIT(20) | BIT(19);
567 break;
568 default:
569 break;
570 }
571
572 return val;
573 }
574
sprd_pinctrl_check_sleep_config(unsigned long * configs,unsigned int num_configs)575 static bool sprd_pinctrl_check_sleep_config(unsigned long *configs,
576 unsigned int num_configs)
577 {
578 unsigned int param;
579 int i;
580
581 for (i = 0; i < num_configs; i++) {
582 param = pinconf_to_config_param(configs[i]);
583 if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE)
584 return true;
585 }
586
587 return false;
588 }
589
sprd_pinconf_set(struct pinctrl_dev * pctldev,unsigned int pin_id,unsigned long * configs,unsigned int num_configs)590 static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id,
591 unsigned long *configs, unsigned int num_configs)
592 {
593 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
594 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
595 bool is_sleep_config;
596 unsigned long reg;
597 int i;
598
599 if (!pin)
600 return -EINVAL;
601
602 is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs);
603
604 for (i = 0; i < num_configs; i++) {
605 unsigned int param, arg, shift, mask, val;
606
607 param = pinconf_to_config_param(configs[i]);
608 arg = pinconf_to_config_argument(configs[i]);
609
610 val = 0;
611 shift = 0;
612 mask = 0;
613 if (pin->type == GLOBAL_CTRL_PIN &&
614 param == SPRD_PIN_CONFIG_CONTROL) {
615 val = arg;
616 } else if (pin->type == COMMON_PIN || pin->type == MISC_PIN) {
617 switch (param) {
618 case SPRD_PIN_CONFIG_SLEEP_MODE:
619 if (arg & AP_SLEEP)
620 val |= AP_SLEEP_MODE;
621 if (arg & PUBCP_SLEEP)
622 val |= PUBCP_SLEEP_MODE;
623 if (arg & TGLDSP_SLEEP)
624 val |= TGLDSP_SLEEP_MODE;
625 if (arg & AGDSP_SLEEP)
626 val |= AGDSP_SLEEP_MODE;
627 if (arg & CM4_SLEEP)
628 val |= CM4_SLEEP_MODE;
629
630 mask = SLEEP_MODE_MASK;
631 shift = SLEEP_MODE_SHIFT;
632 break;
633 case PIN_CONFIG_INPUT_ENABLE:
634 if (is_sleep_config == true) {
635 if (arg > 0)
636 val |= SLEEP_INPUT;
637 else
638 val &= ~SLEEP_INPUT;
639
640 mask = SLEEP_INPUT_MASK;
641 shift = SLEEP_INPUT_SHIFT;
642 }
643 break;
644 case PIN_CONFIG_OUTPUT_ENABLE:
645 if (is_sleep_config == true) {
646 if (arg > 0)
647 val |= SLEEP_OUTPUT;
648 else
649 val &= ~SLEEP_OUTPUT;
650
651 mask = SLEEP_OUTPUT_MASK;
652 shift = SLEEP_OUTPUT_SHIFT;
653 }
654 break;
655 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
656 if (is_sleep_config == true) {
657 val = shift = 0;
658 mask = SLEEP_OUTPUT | SLEEP_INPUT;
659 }
660 break;
661 case PIN_CONFIG_DRIVE_STRENGTH:
662 if (arg < 2 || arg > 60)
663 return -EINVAL;
664
665 val = sprd_pinconf_drive(arg);
666 mask = DRIVE_STRENGTH_MASK;
667 shift = DRIVE_STRENGTH_SHIFT;
668 break;
669 case PIN_CONFIG_BIAS_PULL_DOWN:
670 if (is_sleep_config == true) {
671 val |= SLEEP_PULL_DOWN;
672 mask = SLEEP_PULL_DOWN_MASK;
673 shift = SLEEP_PULL_DOWN_SHIFT;
674 } else {
675 val |= PULL_DOWN;
676 mask = PULL_DOWN_MASK;
677 shift = PULL_DOWN_SHIFT;
678 }
679 break;
680 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
681 if (arg > 0)
682 val |= INPUT_SCHMITT;
683 else
684 val &= ~INPUT_SCHMITT;
685
686 mask = INPUT_SCHMITT_MASK;
687 shift = INPUT_SCHMITT_SHIFT;
688 break;
689 case PIN_CONFIG_BIAS_PULL_UP:
690 if (is_sleep_config) {
691 val |= SLEEP_PULL_UP;
692 mask = SLEEP_PULL_UP_MASK;
693 shift = SLEEP_PULL_UP_SHIFT;
694 } else {
695 if (arg == 20000)
696 val |= PULL_UP_20K;
697 else if (arg == 4700)
698 val |= PULL_UP_4_7K;
699
700 mask = PULL_UP_MASK;
701 shift = PULL_UP_SHIFT;
702 }
703 break;
704 case PIN_CONFIG_BIAS_DISABLE:
705 if (is_sleep_config == true) {
706 val = shift = 0;
707 mask = SLEEP_PULL_DOWN | SLEEP_PULL_UP;
708 } else {
709 val = shift = 0;
710 mask = PULL_DOWN | PULL_UP_20K |
711 PULL_UP_4_7K;
712 }
713 break;
714 case PIN_CONFIG_SLEEP_HARDWARE_STATE:
715 continue;
716 default:
717 return -ENOTSUPP;
718 }
719 } else {
720 return -ENOTSUPP;
721 }
722
723 if (pin->type == GLOBAL_CTRL_PIN) {
724 reg = readl((void __iomem *)pin->reg);
725 reg &= ~(PINCTRL_BIT_MASK(pin->bit_width)
726 << pin->bit_offset);
727 reg |= (val & PINCTRL_BIT_MASK(pin->bit_width))
728 << pin->bit_offset;
729 writel(reg, (void __iomem *)pin->reg);
730 } else {
731 reg = readl((void __iomem *)pin->reg);
732 reg &= ~(mask << shift);
733 reg |= val;
734 writel(reg, (void __iomem *)pin->reg);
735 }
736 }
737
738 return 0;
739 }
740
sprd_pinconf_group_get(struct pinctrl_dev * pctldev,unsigned int selector,unsigned long * config)741 static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev,
742 unsigned int selector, unsigned long *config)
743 {
744 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
745 struct sprd_pinctrl_soc_info *info = pctl->info;
746 struct sprd_pin_group *grp;
747 unsigned int pin_id;
748
749 if (selector >= info->ngroups)
750 return -EINVAL;
751
752 grp = &info->groups[selector];
753 pin_id = grp->pins[0];
754
755 return sprd_pinconf_get(pctldev, pin_id, config);
756 }
757
sprd_pinconf_group_set(struct pinctrl_dev * pctldev,unsigned int selector,unsigned long * configs,unsigned int num_configs)758 static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev,
759 unsigned int selector,
760 unsigned long *configs,
761 unsigned int num_configs)
762 {
763 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
764 struct sprd_pinctrl_soc_info *info = pctl->info;
765 struct sprd_pin_group *grp;
766 int ret, i;
767
768 if (selector >= info->ngroups)
769 return -EINVAL;
770
771 grp = &info->groups[selector];
772
773 for (i = 0; i < grp->npins; i++) {
774 unsigned int pin_id = grp->pins[i];
775
776 ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs);
777 if (ret)
778 return ret;
779 }
780
781 return 0;
782 }
783
sprd_pinconf_get_config(struct pinctrl_dev * pctldev,unsigned int pin_id,unsigned long * config)784 static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev,
785 unsigned int pin_id,
786 unsigned long *config)
787 {
788 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
789 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
790
791 if (!pin)
792 return -EINVAL;
793
794 if (pin->type == GLOBAL_CTRL_PIN) {
795 *config = (readl((void __iomem *)pin->reg) >>
796 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
797 } else {
798 *config = readl((void __iomem *)pin->reg);
799 }
800
801 return 0;
802 }
803
sprd_pinconf_dbg_show(struct pinctrl_dev * pctldev,struct seq_file * s,unsigned int pin_id)804 static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev,
805 struct seq_file *s, unsigned int pin_id)
806 {
807 unsigned long config;
808 int ret;
809
810 ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
811 if (ret)
812 return;
813
814 seq_printf(s, "0x%lx", config);
815 }
816
sprd_pinconf_group_dbg_show(struct pinctrl_dev * pctldev,struct seq_file * s,unsigned int selector)817 static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
818 struct seq_file *s,
819 unsigned int selector)
820 {
821 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
822 struct sprd_pinctrl_soc_info *info = pctl->info;
823 struct sprd_pin_group *grp;
824 unsigned long config;
825 const char *name;
826 int i, ret;
827
828 if (selector >= info->ngroups)
829 return;
830
831 grp = &info->groups[selector];
832
833 seq_putc(s, '\n');
834 for (i = 0; i < grp->npins; i++, config++) {
835 unsigned int pin_id = grp->pins[i];
836
837 name = pin_get_name(pctldev, pin_id);
838 ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
839 if (ret)
840 return;
841
842 seq_printf(s, "%s: 0x%lx ", name, config);
843 }
844 }
845
846 static const struct pinconf_ops sprd_pinconf_ops = {
847 .is_generic = true,
848 .pin_config_get = sprd_pinconf_get,
849 .pin_config_set = sprd_pinconf_set,
850 .pin_config_group_get = sprd_pinconf_group_get,
851 .pin_config_group_set = sprd_pinconf_group_set,
852 .pin_config_dbg_show = sprd_pinconf_dbg_show,
853 .pin_config_group_dbg_show = sprd_pinconf_group_dbg_show,
854 };
855
856 static const struct pinconf_generic_params sprd_dt_params[] = {
857 {"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0},
858 {"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0},
859 };
860
861 #ifdef CONFIG_DEBUG_FS
862 static const struct pin_config_item sprd_conf_items[] = {
863 PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true),
864 PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true),
865 };
866 #endif
867
868 static struct pinctrl_desc sprd_pinctrl_desc = {
869 .pctlops = &sprd_pctrl_ops,
870 .pmxops = &sprd_pmx_ops,
871 .confops = &sprd_pinconf_ops,
872 .num_custom_params = ARRAY_SIZE(sprd_dt_params),
873 .custom_params = sprd_dt_params,
874 #ifdef CONFIG_DEBUG_FS
875 .custom_conf_items = sprd_conf_items,
876 #endif
877 .owner = THIS_MODULE,
878 };
879
sprd_pinctrl_parse_groups(struct device_node * np,struct sprd_pinctrl * sprd_pctl,struct sprd_pin_group * grp)880 static int sprd_pinctrl_parse_groups(struct device_node *np,
881 struct sprd_pinctrl *sprd_pctl,
882 struct sprd_pin_group *grp)
883 {
884 struct property *prop;
885 const char *pin_name;
886 int ret, i = 0;
887
888 ret = of_property_count_strings(np, "pins");
889 if (ret < 0)
890 return ret;
891
892 grp->name = np->name;
893 grp->npins = ret;
894 grp->pins = devm_kcalloc(sprd_pctl->dev,
895 grp->npins, sizeof(unsigned int),
896 GFP_KERNEL);
897 if (!grp->pins)
898 return -ENOMEM;
899
900 of_property_for_each_string(np, "pins", prop, pin_name) {
901 ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name);
902 if (ret >= 0)
903 grp->pins[i++] = ret;
904 }
905
906 for (i = 0; i < grp->npins; i++) {
907 dev_dbg(sprd_pctl->dev,
908 "Group[%s] contains [%d] pins: id = %d\n",
909 grp->name, grp->npins, grp->pins[i]);
910 }
911
912 return 0;
913 }
914
sprd_pinctrl_get_groups(struct device_node * np)915 static unsigned int sprd_pinctrl_get_groups(struct device_node *np)
916 {
917 struct device_node *child;
918 unsigned int group_cnt, cnt;
919
920 group_cnt = of_get_child_count(np);
921
922 for_each_child_of_node(np, child) {
923 cnt = of_get_child_count(child);
924 if (cnt > 0)
925 group_cnt += cnt;
926 }
927
928 return group_cnt;
929 }
930
sprd_pinctrl_parse_dt(struct sprd_pinctrl * sprd_pctl)931 static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl)
932 {
933 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
934 struct device_node *np = sprd_pctl->dev->of_node;
935 struct device_node *child, *sub_child;
936 struct sprd_pin_group *grp;
937 const char **temp;
938 int ret;
939
940 if (!np)
941 return -ENODEV;
942
943 info->ngroups = sprd_pinctrl_get_groups(np);
944 if (!info->ngroups)
945 return 0;
946
947 info->groups = devm_kcalloc(sprd_pctl->dev,
948 info->ngroups,
949 sizeof(struct sprd_pin_group),
950 GFP_KERNEL);
951 if (!info->groups)
952 return -ENOMEM;
953
954 info->grp_names = devm_kcalloc(sprd_pctl->dev,
955 info->ngroups, sizeof(char *),
956 GFP_KERNEL);
957 if (!info->grp_names)
958 return -ENOMEM;
959
960 temp = info->grp_names;
961 grp = info->groups;
962
963 for_each_child_of_node(np, child) {
964 ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp);
965 if (ret) {
966 of_node_put(child);
967 return ret;
968 }
969
970 *temp++ = grp->name;
971 grp++;
972
973 if (of_get_child_count(child) > 0) {
974 for_each_child_of_node(child, sub_child) {
975 ret = sprd_pinctrl_parse_groups(sub_child,
976 sprd_pctl, grp);
977 if (ret) {
978 of_node_put(sub_child);
979 of_node_put(child);
980 return ret;
981 }
982
983 *temp++ = grp->name;
984 grp++;
985 }
986 }
987 }
988
989 return 0;
990 }
991
sprd_pinctrl_add_pins(struct sprd_pinctrl * sprd_pctl,struct sprd_pins_info * sprd_soc_pin_info,int pins_cnt)992 static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl,
993 struct sprd_pins_info *sprd_soc_pin_info,
994 int pins_cnt)
995 {
996 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
997 unsigned int ctrl_pin = 0, com_pin = 0;
998 struct sprd_pin *pin;
999 int i;
1000
1001 info->npins = pins_cnt;
1002 info->pins = devm_kcalloc(sprd_pctl->dev,
1003 info->npins, sizeof(struct sprd_pin),
1004 GFP_KERNEL);
1005 if (!info->pins)
1006 return -ENOMEM;
1007
1008 for (i = 0, pin = info->pins; i < info->npins; i++, pin++) {
1009 unsigned int reg;
1010
1011 pin->name = sprd_soc_pin_info[i].name;
1012 pin->type = sprd_soc_pin_info[i].type;
1013 pin->number = sprd_soc_pin_info[i].num;
1014 reg = sprd_soc_pin_info[i].reg;
1015 if (pin->type == GLOBAL_CTRL_PIN) {
1016 pin->reg = (unsigned long)sprd_pctl->base +
1017 PINCTRL_REG_LEN * reg;
1018 pin->bit_offset = sprd_soc_pin_info[i].bit_offset;
1019 pin->bit_width = sprd_soc_pin_info[i].bit_width;
1020 ctrl_pin++;
1021 } else if (pin->type == COMMON_PIN) {
1022 pin->reg = (unsigned long)sprd_pctl->base +
1023 PINCTRL_REG_OFFSET + PINCTRL_REG_LEN *
1024 (i - ctrl_pin);
1025 com_pin++;
1026 } else if (pin->type == MISC_PIN) {
1027 pin->reg = (unsigned long)sprd_pctl->base +
1028 PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN *
1029 (i - ctrl_pin - com_pin);
1030 }
1031 }
1032
1033 for (i = 0, pin = info->pins; i < info->npins; pin++, i++) {
1034 dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, "
1035 "bit offset = %ld, bit width = %ld, reg = 0x%lx\n",
1036 pin->name, pin->number, pin->type,
1037 pin->bit_offset, pin->bit_width, pin->reg);
1038 }
1039
1040 return 0;
1041 }
1042
sprd_pinctrl_core_probe(struct platform_device * pdev,struct sprd_pins_info * sprd_soc_pin_info,int pins_cnt)1043 int sprd_pinctrl_core_probe(struct platform_device *pdev,
1044 struct sprd_pins_info *sprd_soc_pin_info,
1045 int pins_cnt)
1046 {
1047 struct sprd_pinctrl *sprd_pctl;
1048 struct sprd_pinctrl_soc_info *pinctrl_info;
1049 struct pinctrl_pin_desc *pin_desc;
1050 int ret, i;
1051
1052 sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl),
1053 GFP_KERNEL);
1054 if (!sprd_pctl)
1055 return -ENOMEM;
1056
1057 sprd_pctl->base = devm_platform_ioremap_resource(pdev, 0);
1058 if (IS_ERR(sprd_pctl->base))
1059 return PTR_ERR(sprd_pctl->base);
1060
1061 pinctrl_info = devm_kzalloc(&pdev->dev,
1062 sizeof(struct sprd_pinctrl_soc_info),
1063 GFP_KERNEL);
1064 if (!pinctrl_info)
1065 return -ENOMEM;
1066
1067 sprd_pctl->info = pinctrl_info;
1068 sprd_pctl->dev = &pdev->dev;
1069 platform_set_drvdata(pdev, sprd_pctl);
1070
1071 ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt);
1072 if (ret) {
1073 dev_err(&pdev->dev, "fail to add pins information\n");
1074 return ret;
1075 }
1076
1077 ret = sprd_pinctrl_parse_dt(sprd_pctl);
1078 if (ret) {
1079 dev_err(&pdev->dev, "fail to parse dt properties\n");
1080 return ret;
1081 }
1082
1083 pin_desc = devm_kcalloc(&pdev->dev,
1084 pinctrl_info->npins,
1085 sizeof(struct pinctrl_pin_desc),
1086 GFP_KERNEL);
1087 if (!pin_desc)
1088 return -ENOMEM;
1089
1090 for (i = 0; i < pinctrl_info->npins; i++) {
1091 pin_desc[i].number = pinctrl_info->pins[i].number;
1092 pin_desc[i].name = pinctrl_info->pins[i].name;
1093 pin_desc[i].drv_data = pinctrl_info;
1094 }
1095
1096 sprd_pinctrl_desc.pins = pin_desc;
1097 sprd_pinctrl_desc.name = dev_name(&pdev->dev);
1098 sprd_pinctrl_desc.npins = pinctrl_info->npins;
1099
1100 sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc,
1101 &pdev->dev, (void *)sprd_pctl);
1102 if (IS_ERR(sprd_pctl->pctl)) {
1103 dev_err(&pdev->dev, "could not register pinctrl driver\n");
1104 return PTR_ERR(sprd_pctl->pctl);
1105 }
1106
1107 return 0;
1108 }
1109 EXPORT_SYMBOL_GPL(sprd_pinctrl_core_probe);
1110
sprd_pinctrl_remove(struct platform_device * pdev)1111 int sprd_pinctrl_remove(struct platform_device *pdev)
1112 {
1113 struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev);
1114
1115 pinctrl_unregister(sprd_pctl->pctl);
1116 return 0;
1117 }
1118 EXPORT_SYMBOL_GPL(sprd_pinctrl_remove);
1119
sprd_pinctrl_shutdown(struct platform_device * pdev)1120 void sprd_pinctrl_shutdown(struct platform_device *pdev)
1121 {
1122 struct pinctrl *pinctl;
1123 struct pinctrl_state *state;
1124
1125 pinctl = devm_pinctrl_get(&pdev->dev);
1126 if (IS_ERR(pinctl))
1127 return;
1128 state = pinctrl_lookup_state(pinctl, "shutdown");
1129 if (IS_ERR(state))
1130 return;
1131 pinctrl_select_state(pinctl, state);
1132 }
1133 EXPORT_SYMBOL_GPL(sprd_pinctrl_shutdown);
1134
1135 MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver");
1136 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>");
1137 MODULE_LICENSE("GPL v2");
1138