1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * STMicroelectronics st_lsm6dsx sensor driver
4 *
5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
7 * interface standard output.
8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
10 * +-125/+-245/+-500/+-1000/+-2000 dps
11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
12 * allowing dynamic batching of sensor data.
13 * LSM9DSx series is similar but includes an additional magnetometer, handled
14 * by a different driver.
15 *
16 * Supported sensors:
17 * - LSM6DS3:
18 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
21 * - FIFO size: 8KB
22 *
23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C:
24 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416
25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
27 * - FIFO size: 4KB
28 *
29 * - LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/ISM330DHCX/LSM6DST/LSM6DSOP:
30 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416,
31 * 833
32 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
33 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
34 * - FIFO size: 3KB
35 *
36 * - LSM9DS1/LSM6DS0:
37 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952
38 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
39 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952
40 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000
41 * - FIFO size: 32
42 *
43 * Copyright 2016 STMicroelectronics Inc.
44 *
45 * Lorenzo Bianconi <lorenzo.bianconi@st.com>
46 * Denis Ciocca <denis.ciocca@st.com>
47 */
48
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/delay.h>
52 #include <linux/iio/events.h>
53 #include <linux/iio/iio.h>
54 #include <linux/iio/sysfs.h>
55 #include <linux/interrupt.h>
56 #include <linux/irq.h>
57 #include <linux/pm.h>
58 #include <linux/property.h>
59 #include <linux/regmap.h>
60 #include <linux/bitfield.h>
61
62 #include <linux/platform_data/st_sensors_pdata.h>
63
64 #include "st_lsm6dsx.h"
65
66 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
67
68 #define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */
69
70 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
71 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0),
72 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1),
73 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2),
74 IIO_CHAN_SOFT_TIMESTAMP(3),
75 };
76
77 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
78 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0),
79 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1),
80 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2),
81 IIO_CHAN_SOFT_TIMESTAMP(3),
82 };
83
84 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = {
85 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0),
86 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1),
87 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2),
88 IIO_CHAN_SOFT_TIMESTAMP(3),
89 };
90
91 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
92 {
93 .reset = {
94 .addr = 0x22,
95 .mask = BIT(0),
96 },
97 .boot = {
98 .addr = 0x22,
99 .mask = BIT(7),
100 },
101 .bdu = {
102 .addr = 0x22,
103 .mask = BIT(6),
104 },
105 .id = {
106 {
107 .hw_id = ST_LSM9DS1_ID,
108 .name = ST_LSM9DS1_DEV_NAME,
109 .wai = 0x68,
110 }, {
111 .hw_id = ST_LSM6DS0_ID,
112 .name = ST_LSM6DS0_DEV_NAME,
113 .wai = 0x68,
114 },
115 },
116 .channels = {
117 [ST_LSM6DSX_ID_ACC] = {
118 .chan = st_lsm6dsx_acc_channels,
119 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
120 },
121 [ST_LSM6DSX_ID_GYRO] = {
122 .chan = st_lsm6ds0_gyro_channels,
123 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels),
124 },
125 },
126 .odr_table = {
127 [ST_LSM6DSX_ID_ACC] = {
128 .reg = {
129 .addr = 0x20,
130 .mask = GENMASK(7, 5),
131 },
132 .odr_avl[0] = { 10000, 0x01 },
133 .odr_avl[1] = { 50000, 0x02 },
134 .odr_avl[2] = { 119000, 0x03 },
135 .odr_avl[3] = { 238000, 0x04 },
136 .odr_avl[4] = { 476000, 0x05 },
137 .odr_avl[5] = { 952000, 0x06 },
138 .odr_len = 6,
139 },
140 [ST_LSM6DSX_ID_GYRO] = {
141 .reg = {
142 .addr = 0x10,
143 .mask = GENMASK(7, 5),
144 },
145 .odr_avl[0] = { 14900, 0x01 },
146 .odr_avl[1] = { 59500, 0x02 },
147 .odr_avl[2] = { 119000, 0x03 },
148 .odr_avl[3] = { 238000, 0x04 },
149 .odr_avl[4] = { 476000, 0x05 },
150 .odr_avl[5] = { 952000, 0x06 },
151 .odr_len = 6,
152 },
153 },
154 .fs_table = {
155 [ST_LSM6DSX_ID_ACC] = {
156 .reg = {
157 .addr = 0x20,
158 .mask = GENMASK(4, 3),
159 },
160 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
161 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
162 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
163 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
164 .fs_len = 4,
165 },
166 [ST_LSM6DSX_ID_GYRO] = {
167 .reg = {
168 .addr = 0x10,
169 .mask = GENMASK(4, 3),
170 },
171
172 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
173 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
174 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
175 .fs_len = 3,
176 },
177 },
178 .irq_config = {
179 .irq1 = {
180 .addr = 0x0c,
181 .mask = BIT(3),
182 },
183 .irq2 = {
184 .addr = 0x0d,
185 .mask = BIT(3),
186 },
187 .hla = {
188 .addr = 0x22,
189 .mask = BIT(5),
190 },
191 .od = {
192 .addr = 0x22,
193 .mask = BIT(4),
194 },
195 },
196 .fifo_ops = {
197 .max_size = 32,
198 },
199 },
200 {
201 .reset = {
202 .addr = 0x12,
203 .mask = BIT(0),
204 },
205 .boot = {
206 .addr = 0x12,
207 .mask = BIT(7),
208 },
209 .bdu = {
210 .addr = 0x12,
211 .mask = BIT(6),
212 },
213 .id = {
214 {
215 .hw_id = ST_LSM6DS3_ID,
216 .name = ST_LSM6DS3_DEV_NAME,
217 .wai = 0x69,
218 },
219 },
220 .channels = {
221 [ST_LSM6DSX_ID_ACC] = {
222 .chan = st_lsm6dsx_acc_channels,
223 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
224 },
225 [ST_LSM6DSX_ID_GYRO] = {
226 .chan = st_lsm6dsx_gyro_channels,
227 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
228 },
229 },
230 .odr_table = {
231 [ST_LSM6DSX_ID_ACC] = {
232 .reg = {
233 .addr = 0x10,
234 .mask = GENMASK(7, 4),
235 },
236 .odr_avl[0] = { 12500, 0x01 },
237 .odr_avl[1] = { 26000, 0x02 },
238 .odr_avl[2] = { 52000, 0x03 },
239 .odr_avl[3] = { 104000, 0x04 },
240 .odr_avl[4] = { 208000, 0x05 },
241 .odr_avl[5] = { 416000, 0x06 },
242 .odr_len = 6,
243 },
244 [ST_LSM6DSX_ID_GYRO] = {
245 .reg = {
246 .addr = 0x11,
247 .mask = GENMASK(7, 4),
248 },
249 .odr_avl[0] = { 12500, 0x01 },
250 .odr_avl[1] = { 26000, 0x02 },
251 .odr_avl[2] = { 52000, 0x03 },
252 .odr_avl[3] = { 104000, 0x04 },
253 .odr_avl[4] = { 208000, 0x05 },
254 .odr_avl[5] = { 416000, 0x06 },
255 .odr_len = 6,
256 },
257 },
258 .fs_table = {
259 [ST_LSM6DSX_ID_ACC] = {
260 .reg = {
261 .addr = 0x10,
262 .mask = GENMASK(3, 2),
263 },
264 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
265 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
266 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
267 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
268 .fs_len = 4,
269 },
270 [ST_LSM6DSX_ID_GYRO] = {
271 .reg = {
272 .addr = 0x11,
273 .mask = GENMASK(3, 2),
274 },
275 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
276 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
277 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
278 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
279 .fs_len = 4,
280 },
281 },
282 .irq_config = {
283 .irq1 = {
284 .addr = 0x0d,
285 .mask = BIT(3),
286 },
287 .irq2 = {
288 .addr = 0x0e,
289 .mask = BIT(3),
290 },
291 .lir = {
292 .addr = 0x58,
293 .mask = BIT(0),
294 },
295 .irq1_func = {
296 .addr = 0x5e,
297 .mask = BIT(5),
298 },
299 .irq2_func = {
300 .addr = 0x5f,
301 .mask = BIT(5),
302 },
303 .hla = {
304 .addr = 0x12,
305 .mask = BIT(5),
306 },
307 .od = {
308 .addr = 0x12,
309 .mask = BIT(4),
310 },
311 },
312 .decimator = {
313 [ST_LSM6DSX_ID_ACC] = {
314 .addr = 0x08,
315 .mask = GENMASK(2, 0),
316 },
317 [ST_LSM6DSX_ID_GYRO] = {
318 .addr = 0x08,
319 .mask = GENMASK(5, 3),
320 },
321 },
322 .fifo_ops = {
323 .update_fifo = st_lsm6dsx_update_fifo,
324 .read_fifo = st_lsm6dsx_read_fifo,
325 .fifo_th = {
326 .addr = 0x06,
327 .mask = GENMASK(11, 0),
328 },
329 .fifo_diff = {
330 .addr = 0x3a,
331 .mask = GENMASK(11, 0),
332 },
333 .max_size = 1365,
334 .th_wl = 3, /* 1LSB = 2B */
335 },
336 .ts_settings = {
337 .timer_en = {
338 .addr = 0x58,
339 .mask = BIT(7),
340 },
341 .hr_timer = {
342 .addr = 0x5c,
343 .mask = BIT(4),
344 },
345 .fifo_en = {
346 .addr = 0x07,
347 .mask = BIT(7),
348 },
349 .decimator = {
350 .addr = 0x09,
351 .mask = GENMASK(5, 3),
352 },
353 },
354 .event_settings = {
355 .wakeup_reg = {
356 .addr = 0x5B,
357 .mask = GENMASK(5, 0),
358 },
359 .wakeup_src_reg = 0x1b,
360 .wakeup_src_status_mask = BIT(3),
361 .wakeup_src_z_mask = BIT(0),
362 .wakeup_src_y_mask = BIT(1),
363 .wakeup_src_x_mask = BIT(2),
364 },
365 },
366 {
367 .reset = {
368 .addr = 0x12,
369 .mask = BIT(0),
370 },
371 .boot = {
372 .addr = 0x12,
373 .mask = BIT(7),
374 },
375 .bdu = {
376 .addr = 0x12,
377 .mask = BIT(6),
378 },
379 .id = {
380 {
381 .hw_id = ST_LSM6DS3H_ID,
382 .name = ST_LSM6DS3H_DEV_NAME,
383 .wai = 0x69,
384 },
385 },
386 .channels = {
387 [ST_LSM6DSX_ID_ACC] = {
388 .chan = st_lsm6dsx_acc_channels,
389 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
390 },
391 [ST_LSM6DSX_ID_GYRO] = {
392 .chan = st_lsm6dsx_gyro_channels,
393 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
394 },
395 },
396 .odr_table = {
397 [ST_LSM6DSX_ID_ACC] = {
398 .reg = {
399 .addr = 0x10,
400 .mask = GENMASK(7, 4),
401 },
402 .odr_avl[0] = { 12500, 0x01 },
403 .odr_avl[1] = { 26000, 0x02 },
404 .odr_avl[2] = { 52000, 0x03 },
405 .odr_avl[3] = { 104000, 0x04 },
406 .odr_avl[4] = { 208000, 0x05 },
407 .odr_avl[5] = { 416000, 0x06 },
408 .odr_len = 6,
409 },
410 [ST_LSM6DSX_ID_GYRO] = {
411 .reg = {
412 .addr = 0x11,
413 .mask = GENMASK(7, 4),
414 },
415 .odr_avl[0] = { 12500, 0x01 },
416 .odr_avl[1] = { 26000, 0x02 },
417 .odr_avl[2] = { 52000, 0x03 },
418 .odr_avl[3] = { 104000, 0x04 },
419 .odr_avl[4] = { 208000, 0x05 },
420 .odr_avl[5] = { 416000, 0x06 },
421 .odr_len = 6,
422 },
423 },
424 .fs_table = {
425 [ST_LSM6DSX_ID_ACC] = {
426 .reg = {
427 .addr = 0x10,
428 .mask = GENMASK(3, 2),
429 },
430 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
431 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
432 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
433 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
434 .fs_len = 4,
435 },
436 [ST_LSM6DSX_ID_GYRO] = {
437 .reg = {
438 .addr = 0x11,
439 .mask = GENMASK(3, 2),
440 },
441 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
442 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
443 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
444 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
445 .fs_len = 4,
446 },
447 },
448 .irq_config = {
449 .irq1 = {
450 .addr = 0x0d,
451 .mask = BIT(3),
452 },
453 .irq2 = {
454 .addr = 0x0e,
455 .mask = BIT(3),
456 },
457 .lir = {
458 .addr = 0x58,
459 .mask = BIT(0),
460 },
461 .irq1_func = {
462 .addr = 0x5e,
463 .mask = BIT(5),
464 },
465 .irq2_func = {
466 .addr = 0x5f,
467 .mask = BIT(5),
468 },
469 .hla = {
470 .addr = 0x12,
471 .mask = BIT(5),
472 },
473 .od = {
474 .addr = 0x12,
475 .mask = BIT(4),
476 },
477 },
478 .decimator = {
479 [ST_LSM6DSX_ID_ACC] = {
480 .addr = 0x08,
481 .mask = GENMASK(2, 0),
482 },
483 [ST_LSM6DSX_ID_GYRO] = {
484 .addr = 0x08,
485 .mask = GENMASK(5, 3),
486 },
487 },
488 .fifo_ops = {
489 .update_fifo = st_lsm6dsx_update_fifo,
490 .read_fifo = st_lsm6dsx_read_fifo,
491 .fifo_th = {
492 .addr = 0x06,
493 .mask = GENMASK(11, 0),
494 },
495 .fifo_diff = {
496 .addr = 0x3a,
497 .mask = GENMASK(11, 0),
498 },
499 .max_size = 682,
500 .th_wl = 3, /* 1LSB = 2B */
501 },
502 .ts_settings = {
503 .timer_en = {
504 .addr = 0x58,
505 .mask = BIT(7),
506 },
507 .hr_timer = {
508 .addr = 0x5c,
509 .mask = BIT(4),
510 },
511 .fifo_en = {
512 .addr = 0x07,
513 .mask = BIT(7),
514 },
515 .decimator = {
516 .addr = 0x09,
517 .mask = GENMASK(5, 3),
518 },
519 },
520 .event_settings = {
521 .wakeup_reg = {
522 .addr = 0x5B,
523 .mask = GENMASK(5, 0),
524 },
525 .wakeup_src_reg = 0x1b,
526 .wakeup_src_status_mask = BIT(3),
527 .wakeup_src_z_mask = BIT(0),
528 .wakeup_src_y_mask = BIT(1),
529 .wakeup_src_x_mask = BIT(2),
530 },
531 },
532 {
533 .reset = {
534 .addr = 0x12,
535 .mask = BIT(0),
536 },
537 .boot = {
538 .addr = 0x12,
539 .mask = BIT(7),
540 },
541 .bdu = {
542 .addr = 0x12,
543 .mask = BIT(6),
544 },
545 .id = {
546 {
547 .hw_id = ST_LSM6DSL_ID,
548 .name = ST_LSM6DSL_DEV_NAME,
549 .wai = 0x6a,
550 }, {
551 .hw_id = ST_LSM6DSM_ID,
552 .name = ST_LSM6DSM_DEV_NAME,
553 .wai = 0x6a,
554 }, {
555 .hw_id = ST_ISM330DLC_ID,
556 .name = ST_ISM330DLC_DEV_NAME,
557 .wai = 0x6a,
558 }, {
559 .hw_id = ST_LSM6DS3TRC_ID,
560 .name = ST_LSM6DS3TRC_DEV_NAME,
561 .wai = 0x6a,
562 },
563 },
564 .channels = {
565 [ST_LSM6DSX_ID_ACC] = {
566 .chan = st_lsm6dsx_acc_channels,
567 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
568 },
569 [ST_LSM6DSX_ID_GYRO] = {
570 .chan = st_lsm6dsx_gyro_channels,
571 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
572 },
573 },
574 .odr_table = {
575 [ST_LSM6DSX_ID_ACC] = {
576 .reg = {
577 .addr = 0x10,
578 .mask = GENMASK(7, 4),
579 },
580 .odr_avl[0] = { 12500, 0x01 },
581 .odr_avl[1] = { 26000, 0x02 },
582 .odr_avl[2] = { 52000, 0x03 },
583 .odr_avl[3] = { 104000, 0x04 },
584 .odr_avl[4] = { 208000, 0x05 },
585 .odr_avl[5] = { 416000, 0x06 },
586 .odr_len = 6,
587 },
588 [ST_LSM6DSX_ID_GYRO] = {
589 .reg = {
590 .addr = 0x11,
591 .mask = GENMASK(7, 4),
592 },
593 .odr_avl[0] = { 12500, 0x01 },
594 .odr_avl[1] = { 26000, 0x02 },
595 .odr_avl[2] = { 52000, 0x03 },
596 .odr_avl[3] = { 104000, 0x04 },
597 .odr_avl[4] = { 208000, 0x05 },
598 .odr_avl[5] = { 416000, 0x06 },
599 .odr_len = 6,
600 },
601 },
602 .fs_table = {
603 [ST_LSM6DSX_ID_ACC] = {
604 .reg = {
605 .addr = 0x10,
606 .mask = GENMASK(3, 2),
607 },
608 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
609 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
610 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
611 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
612 .fs_len = 4,
613 },
614 [ST_LSM6DSX_ID_GYRO] = {
615 .reg = {
616 .addr = 0x11,
617 .mask = GENMASK(3, 2),
618 },
619 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
620 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
621 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
622 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
623 .fs_len = 4,
624 },
625 },
626 .irq_config = {
627 .irq1 = {
628 .addr = 0x0d,
629 .mask = BIT(3),
630 },
631 .irq2 = {
632 .addr = 0x0e,
633 .mask = BIT(3),
634 },
635 .lir = {
636 .addr = 0x58,
637 .mask = BIT(0),
638 },
639 .irq1_func = {
640 .addr = 0x5e,
641 .mask = BIT(5),
642 },
643 .irq2_func = {
644 .addr = 0x5f,
645 .mask = BIT(5),
646 },
647 .hla = {
648 .addr = 0x12,
649 .mask = BIT(5),
650 },
651 .od = {
652 .addr = 0x12,
653 .mask = BIT(4),
654 },
655 },
656 .decimator = {
657 [ST_LSM6DSX_ID_ACC] = {
658 .addr = 0x08,
659 .mask = GENMASK(2, 0),
660 },
661 [ST_LSM6DSX_ID_GYRO] = {
662 .addr = 0x08,
663 .mask = GENMASK(5, 3),
664 },
665 [ST_LSM6DSX_ID_EXT0] = {
666 .addr = 0x09,
667 .mask = GENMASK(2, 0),
668 },
669 },
670 .fifo_ops = {
671 .update_fifo = st_lsm6dsx_update_fifo,
672 .read_fifo = st_lsm6dsx_read_fifo,
673 .fifo_th = {
674 .addr = 0x06,
675 .mask = GENMASK(10, 0),
676 },
677 .fifo_diff = {
678 .addr = 0x3a,
679 .mask = GENMASK(10, 0),
680 },
681 .max_size = 682,
682 .th_wl = 3, /* 1LSB = 2B */
683 },
684 .ts_settings = {
685 .timer_en = {
686 .addr = 0x19,
687 .mask = BIT(5),
688 },
689 .hr_timer = {
690 .addr = 0x5c,
691 .mask = BIT(4),
692 },
693 .fifo_en = {
694 .addr = 0x07,
695 .mask = BIT(7),
696 },
697 .decimator = {
698 .addr = 0x09,
699 .mask = GENMASK(5, 3),
700 },
701 },
702 .shub_settings = {
703 .page_mux = {
704 .addr = 0x01,
705 .mask = BIT(7),
706 },
707 .master_en = {
708 .addr = 0x1a,
709 .mask = BIT(0),
710 },
711 .pullup_en = {
712 .addr = 0x1a,
713 .mask = BIT(3),
714 },
715 .aux_sens = {
716 .addr = 0x04,
717 .mask = GENMASK(5, 4),
718 },
719 .wr_once = {
720 .addr = 0x07,
721 .mask = BIT(5),
722 },
723 .emb_func = {
724 .addr = 0x19,
725 .mask = BIT(2),
726 },
727 .num_ext_dev = 1,
728 .shub_out = {
729 .addr = 0x2e,
730 },
731 .slv0_addr = 0x02,
732 .dw_slv0_addr = 0x0e,
733 .pause = 0x7,
734 },
735 .event_settings = {
736 .enable_reg = {
737 .addr = 0x58,
738 .mask = BIT(7),
739 },
740 .wakeup_reg = {
741 .addr = 0x5B,
742 .mask = GENMASK(5, 0),
743 },
744 .wakeup_src_reg = 0x1b,
745 .wakeup_src_status_mask = BIT(3),
746 .wakeup_src_z_mask = BIT(0),
747 .wakeup_src_y_mask = BIT(1),
748 .wakeup_src_x_mask = BIT(2),
749 },
750 },
751 {
752 .reset = {
753 .addr = 0x12,
754 .mask = BIT(0),
755 },
756 .boot = {
757 .addr = 0x12,
758 .mask = BIT(7),
759 },
760 .bdu = {
761 .addr = 0x12,
762 .mask = BIT(6),
763 },
764 .id = {
765 {
766 .hw_id = ST_LSM6DSR_ID,
767 .name = ST_LSM6DSR_DEV_NAME,
768 .wai = 0x6b,
769 }, {
770 .hw_id = ST_ISM330DHCX_ID,
771 .name = ST_ISM330DHCX_DEV_NAME,
772 .wai = 0x6b,
773 }, {
774 .hw_id = ST_LSM6DSRX_ID,
775 .name = ST_LSM6DSRX_DEV_NAME,
776 .wai = 0x6b,
777 }, {
778 .hw_id = ST_LSM6DSO_ID,
779 .name = ST_LSM6DSO_DEV_NAME,
780 .wai = 0x6c,
781 }, {
782 .hw_id = ST_LSM6DSOX_ID,
783 .name = ST_LSM6DSOX_DEV_NAME,
784 .wai = 0x6c,
785 }, {
786 .hw_id = ST_LSM6DST_ID,
787 .name = ST_LSM6DST_DEV_NAME,
788 .wai = 0x6d,
789 },
790 },
791 .channels = {
792 [ST_LSM6DSX_ID_ACC] = {
793 .chan = st_lsm6dsx_acc_channels,
794 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
795 },
796 [ST_LSM6DSX_ID_GYRO] = {
797 .chan = st_lsm6dsx_gyro_channels,
798 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
799 },
800 },
801 .drdy_mask = {
802 .addr = 0x13,
803 .mask = BIT(3),
804 },
805 .odr_table = {
806 [ST_LSM6DSX_ID_ACC] = {
807 .reg = {
808 .addr = 0x10,
809 .mask = GENMASK(7, 4),
810 },
811 .odr_avl[0] = { 12500, 0x01 },
812 .odr_avl[1] = { 26000, 0x02 },
813 .odr_avl[2] = { 52000, 0x03 },
814 .odr_avl[3] = { 104000, 0x04 },
815 .odr_avl[4] = { 208000, 0x05 },
816 .odr_avl[5] = { 416000, 0x06 },
817 .odr_avl[6] = { 833000, 0x07 },
818 .odr_len = 7,
819 },
820 [ST_LSM6DSX_ID_GYRO] = {
821 .reg = {
822 .addr = 0x11,
823 .mask = GENMASK(7, 4),
824 },
825 .odr_avl[0] = { 12500, 0x01 },
826 .odr_avl[1] = { 26000, 0x02 },
827 .odr_avl[2] = { 52000, 0x03 },
828 .odr_avl[3] = { 104000, 0x04 },
829 .odr_avl[4] = { 208000, 0x05 },
830 .odr_avl[5] = { 416000, 0x06 },
831 .odr_avl[6] = { 833000, 0x07 },
832 .odr_len = 7,
833 },
834 },
835 .fs_table = {
836 [ST_LSM6DSX_ID_ACC] = {
837 .reg = {
838 .addr = 0x10,
839 .mask = GENMASK(3, 2),
840 },
841 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
842 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
843 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
844 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
845 .fs_len = 4,
846 },
847 [ST_LSM6DSX_ID_GYRO] = {
848 .reg = {
849 .addr = 0x11,
850 .mask = GENMASK(3, 2),
851 },
852 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
853 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
854 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
855 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
856 .fs_len = 4,
857 },
858 },
859 .irq_config = {
860 .irq1 = {
861 .addr = 0x0d,
862 .mask = BIT(3),
863 },
864 .irq2 = {
865 .addr = 0x0e,
866 .mask = BIT(3),
867 },
868 .lir = {
869 .addr = 0x56,
870 .mask = BIT(0),
871 },
872 .clear_on_read = {
873 .addr = 0x56,
874 .mask = BIT(6),
875 },
876 .irq1_func = {
877 .addr = 0x5e,
878 .mask = BIT(5),
879 },
880 .irq2_func = {
881 .addr = 0x5f,
882 .mask = BIT(5),
883 },
884 .hla = {
885 .addr = 0x12,
886 .mask = BIT(5),
887 },
888 .od = {
889 .addr = 0x12,
890 .mask = BIT(4),
891 },
892 },
893 .batch = {
894 [ST_LSM6DSX_ID_ACC] = {
895 .addr = 0x09,
896 .mask = GENMASK(3, 0),
897 },
898 [ST_LSM6DSX_ID_GYRO] = {
899 .addr = 0x09,
900 .mask = GENMASK(7, 4),
901 },
902 },
903 .fifo_ops = {
904 .update_fifo = st_lsm6dsx_update_fifo,
905 .read_fifo = st_lsm6dsx_read_tagged_fifo,
906 .fifo_th = {
907 .addr = 0x07,
908 .mask = GENMASK(8, 0),
909 },
910 .fifo_diff = {
911 .addr = 0x3a,
912 .mask = GENMASK(9, 0),
913 },
914 .max_size = 512,
915 .th_wl = 1,
916 },
917 .ts_settings = {
918 .timer_en = {
919 .addr = 0x19,
920 .mask = BIT(5),
921 },
922 .decimator = {
923 .addr = 0x0a,
924 .mask = GENMASK(7, 6),
925 },
926 .freq_fine = 0x63,
927 },
928 .shub_settings = {
929 .page_mux = {
930 .addr = 0x01,
931 .mask = BIT(6),
932 },
933 .master_en = {
934 .sec_page = true,
935 .addr = 0x14,
936 .mask = BIT(2),
937 },
938 .pullup_en = {
939 .sec_page = true,
940 .addr = 0x14,
941 .mask = BIT(3),
942 },
943 .aux_sens = {
944 .addr = 0x14,
945 .mask = GENMASK(1, 0),
946 },
947 .wr_once = {
948 .addr = 0x14,
949 .mask = BIT(6),
950 },
951 .num_ext_dev = 3,
952 .shub_out = {
953 .sec_page = true,
954 .addr = 0x02,
955 },
956 .slv0_addr = 0x15,
957 .dw_slv0_addr = 0x21,
958 .batch_en = BIT(3),
959 },
960 .event_settings = {
961 .enable_reg = {
962 .addr = 0x58,
963 .mask = BIT(7),
964 },
965 .wakeup_reg = {
966 .addr = 0x5b,
967 .mask = GENMASK(5, 0),
968 },
969 .wakeup_src_reg = 0x1b,
970 .wakeup_src_status_mask = BIT(3),
971 .wakeup_src_z_mask = BIT(0),
972 .wakeup_src_y_mask = BIT(1),
973 .wakeup_src_x_mask = BIT(2),
974 },
975 },
976 {
977 .reset = {
978 .addr = 0x12,
979 .mask = BIT(0),
980 },
981 .boot = {
982 .addr = 0x12,
983 .mask = BIT(7),
984 },
985 .bdu = {
986 .addr = 0x12,
987 .mask = BIT(6),
988 },
989 .id = {
990 {
991 .hw_id = ST_ASM330LHH_ID,
992 .name = ST_ASM330LHH_DEV_NAME,
993 .wai = 0x6b,
994 }, {
995 .hw_id = ST_LSM6DSOP_ID,
996 .name = ST_LSM6DSOP_DEV_NAME,
997 .wai = 0x6c,
998 },
999 },
1000 .channels = {
1001 [ST_LSM6DSX_ID_ACC] = {
1002 .chan = st_lsm6dsx_acc_channels,
1003 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels),
1004 },
1005 [ST_LSM6DSX_ID_GYRO] = {
1006 .chan = st_lsm6dsx_gyro_channels,
1007 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels),
1008 },
1009 },
1010 .drdy_mask = {
1011 .addr = 0x13,
1012 .mask = BIT(3),
1013 },
1014 .odr_table = {
1015 [ST_LSM6DSX_ID_ACC] = {
1016 .reg = {
1017 .addr = 0x10,
1018 .mask = GENMASK(7, 4),
1019 },
1020 .odr_avl[0] = { 12500, 0x01 },
1021 .odr_avl[1] = { 26000, 0x02 },
1022 .odr_avl[2] = { 52000, 0x03 },
1023 .odr_avl[3] = { 104000, 0x04 },
1024 .odr_avl[4] = { 208000, 0x05 },
1025 .odr_avl[5] = { 416000, 0x06 },
1026 .odr_avl[6] = { 833000, 0x07 },
1027 .odr_len = 7,
1028 },
1029 [ST_LSM6DSX_ID_GYRO] = {
1030 .reg = {
1031 .addr = 0x11,
1032 .mask = GENMASK(7, 4),
1033 },
1034 .odr_avl[0] = { 12500, 0x01 },
1035 .odr_avl[1] = { 26000, 0x02 },
1036 .odr_avl[2] = { 52000, 0x03 },
1037 .odr_avl[3] = { 104000, 0x04 },
1038 .odr_avl[4] = { 208000, 0x05 },
1039 .odr_avl[5] = { 416000, 0x06 },
1040 .odr_avl[6] = { 833000, 0x07 },
1041 .odr_len = 7,
1042 },
1043 },
1044 .fs_table = {
1045 [ST_LSM6DSX_ID_ACC] = {
1046 .reg = {
1047 .addr = 0x10,
1048 .mask = GENMASK(3, 2),
1049 },
1050 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 },
1051 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
1052 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
1053 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
1054 .fs_len = 4,
1055 },
1056 [ST_LSM6DSX_ID_GYRO] = {
1057 .reg = {
1058 .addr = 0x11,
1059 .mask = GENMASK(3, 2),
1060 },
1061 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 },
1062 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
1063 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
1064 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
1065 .fs_len = 4,
1066 },
1067 },
1068 .irq_config = {
1069 .irq1 = {
1070 .addr = 0x0d,
1071 .mask = BIT(3),
1072 },
1073 .irq2 = {
1074 .addr = 0x0e,
1075 .mask = BIT(3),
1076 },
1077 .lir = {
1078 .addr = 0x56,
1079 .mask = BIT(0),
1080 },
1081 .clear_on_read = {
1082 .addr = 0x56,
1083 .mask = BIT(6),
1084 },
1085 .irq1_func = {
1086 .addr = 0x5e,
1087 .mask = BIT(5),
1088 },
1089 .irq2_func = {
1090 .addr = 0x5f,
1091 .mask = BIT(5),
1092 },
1093 .hla = {
1094 .addr = 0x12,
1095 .mask = BIT(5),
1096 },
1097 .od = {
1098 .addr = 0x12,
1099 .mask = BIT(4),
1100 },
1101 },
1102 .batch = {
1103 [ST_LSM6DSX_ID_ACC] = {
1104 .addr = 0x09,
1105 .mask = GENMASK(3, 0),
1106 },
1107 [ST_LSM6DSX_ID_GYRO] = {
1108 .addr = 0x09,
1109 .mask = GENMASK(7, 4),
1110 },
1111 },
1112 .fifo_ops = {
1113 .update_fifo = st_lsm6dsx_update_fifo,
1114 .read_fifo = st_lsm6dsx_read_tagged_fifo,
1115 .fifo_th = {
1116 .addr = 0x07,
1117 .mask = GENMASK(8, 0),
1118 },
1119 .fifo_diff = {
1120 .addr = 0x3a,
1121 .mask = GENMASK(9, 0),
1122 },
1123 .max_size = 512,
1124 .th_wl = 1,
1125 },
1126 .ts_settings = {
1127 .timer_en = {
1128 .addr = 0x19,
1129 .mask = BIT(5),
1130 },
1131 .decimator = {
1132 .addr = 0x0a,
1133 .mask = GENMASK(7, 6),
1134 },
1135 .freq_fine = 0x63,
1136 },
1137 .event_settings = {
1138 .enable_reg = {
1139 .addr = 0x58,
1140 .mask = BIT(7),
1141 },
1142 .wakeup_reg = {
1143 .addr = 0x5B,
1144 .mask = GENMASK(5, 0),
1145 },
1146 .wakeup_src_reg = 0x1b,
1147 .wakeup_src_status_mask = BIT(3),
1148 .wakeup_src_z_mask = BIT(0),
1149 .wakeup_src_y_mask = BIT(1),
1150 .wakeup_src_x_mask = BIT(2),
1151 },
1152 },
1153 };
1154
st_lsm6dsx_set_page(struct st_lsm6dsx_hw * hw,bool enable)1155 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable)
1156 {
1157 const struct st_lsm6dsx_shub_settings *hub_settings;
1158 unsigned int data;
1159 int err;
1160
1161 hub_settings = &hw->settings->shub_settings;
1162 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask);
1163 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr,
1164 hub_settings->page_mux.mask, data);
1165 usleep_range(100, 150);
1166
1167 return err;
1168 }
1169
st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw * hw,int id,const char ** name)1170 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id,
1171 const char **name)
1172 {
1173 int err, i, j, data;
1174
1175 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
1176 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
1177 if (st_lsm6dsx_sensor_settings[i].id[j].name &&
1178 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id)
1179 break;
1180 }
1181 if (j < ST_LSM6DSX_MAX_ID)
1182 break;
1183 }
1184
1185 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
1186 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
1187 return -ENODEV;
1188 }
1189
1190 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data);
1191 if (err < 0) {
1192 dev_err(hw->dev, "failed to read whoami register\n");
1193 return err;
1194 }
1195
1196 if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) {
1197 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
1198 return -ENODEV;
1199 }
1200
1201 *name = st_lsm6dsx_sensor_settings[i].id[j].name;
1202 hw->settings = &st_lsm6dsx_sensor_settings[i];
1203
1204 return 0;
1205 }
1206
st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor * sensor,u32 gain)1207 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
1208 u32 gain)
1209 {
1210 const struct st_lsm6dsx_fs_table_entry *fs_table;
1211 unsigned int data;
1212 int i, err;
1213
1214 fs_table = &sensor->hw->settings->fs_table[sensor->id];
1215 for (i = 0; i < fs_table->fs_len; i++) {
1216 if (fs_table->fs_avl[i].gain == gain)
1217 break;
1218 }
1219
1220 if (i == fs_table->fs_len)
1221 return -EINVAL;
1222
1223 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val,
1224 fs_table->reg.mask);
1225 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr,
1226 fs_table->reg.mask, data);
1227 if (err < 0)
1228 return err;
1229
1230 sensor->gain = gain;
1231
1232 return 0;
1233 }
1234
st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor * sensor,u32 odr,u8 * val)1235 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val)
1236 {
1237 const struct st_lsm6dsx_odr_table_entry *odr_table;
1238 int i;
1239
1240 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1241 for (i = 0; i < odr_table->odr_len; i++) {
1242 /*
1243 * ext devices can run at different odr respect to
1244 * accel sensor
1245 */
1246 if (odr_table->odr_avl[i].milli_hz >= odr)
1247 break;
1248 }
1249
1250 if (i == odr_table->odr_len)
1251 return -EINVAL;
1252
1253 *val = odr_table->odr_avl[i].val;
1254 return odr_table->odr_avl[i].milli_hz;
1255 }
1256
1257 static int
st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw * hw,u32 odr,enum st_lsm6dsx_sensor_id id)1258 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr,
1259 enum st_lsm6dsx_sensor_id id)
1260 {
1261 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]);
1262
1263 if (odr > 0) {
1264 if (hw->enable_mask & BIT(id))
1265 return max_t(u32, ref->odr, odr);
1266 else
1267 return odr;
1268 } else {
1269 return (hw->enable_mask & BIT(id)) ? ref->odr : 0;
1270 }
1271 }
1272
1273 static int
st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor * sensor,u32 req_odr)1274 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr)
1275 {
1276 struct st_lsm6dsx_sensor *ref_sensor = sensor;
1277 struct st_lsm6dsx_hw *hw = sensor->hw;
1278 const struct st_lsm6dsx_reg *reg;
1279 unsigned int data;
1280 u8 val = 0;
1281 int err;
1282
1283 switch (sensor->id) {
1284 case ST_LSM6DSX_ID_GYRO:
1285 break;
1286 case ST_LSM6DSX_ID_EXT0:
1287 case ST_LSM6DSX_ID_EXT1:
1288 case ST_LSM6DSX_ID_EXT2:
1289 case ST_LSM6DSX_ID_ACC: {
1290 u32 odr;
1291 int i;
1292
1293 /*
1294 * i2c embedded controller relies on the accelerometer sensor as
1295 * bus read/write trigger so we need to enable accel device
1296 * at odr = max(accel_odr, ext_odr) in order to properly
1297 * communicate with i2c slave devices
1298 */
1299 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
1300 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) {
1301 if (!hw->iio_devs[i] || i == sensor->id)
1302 continue;
1303
1304 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i);
1305 if (odr != req_odr)
1306 /* device already configured */
1307 return 0;
1308 }
1309 break;
1310 }
1311 default: /* should never occur */
1312 return -EINVAL;
1313 }
1314
1315 if (req_odr > 0) {
1316 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val);
1317 if (err < 0)
1318 return err;
1319 }
1320
1321 reg = &hw->settings->odr_table[ref_sensor->id].reg;
1322 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1323 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data);
1324 }
1325
1326 static int
__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1327 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1328 bool enable)
1329 {
1330 struct st_lsm6dsx_hw *hw = sensor->hw;
1331 u32 odr = enable ? sensor->odr : 0;
1332 int err;
1333
1334 err = st_lsm6dsx_set_odr(sensor, odr);
1335 if (err < 0)
1336 return err;
1337
1338 if (enable)
1339 hw->enable_mask |= BIT(sensor->id);
1340 else
1341 hw->enable_mask &= ~BIT(sensor->id);
1342
1343 return 0;
1344 }
1345
1346 static int
st_lsm6dsx_check_events(struct st_lsm6dsx_sensor * sensor,bool enable)1347 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable)
1348 {
1349 struct st_lsm6dsx_hw *hw = sensor->hw;
1350
1351 if (sensor->id == ST_LSM6DSX_ID_GYRO || enable)
1352 return 0;
1353
1354 return hw->enable_event;
1355 }
1356
st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor * sensor,bool enable)1357 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor,
1358 bool enable)
1359 {
1360 if (st_lsm6dsx_check_events(sensor, enable))
1361 return 0;
1362
1363 return __st_lsm6dsx_sensor_set_enable(sensor, enable);
1364 }
1365
st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor * sensor,u8 addr,int * val)1366 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
1367 u8 addr, int *val)
1368 {
1369 struct st_lsm6dsx_hw *hw = sensor->hw;
1370 int err, delay;
1371 __le16 data;
1372
1373 err = st_lsm6dsx_sensor_set_enable(sensor, true);
1374 if (err < 0)
1375 return err;
1376
1377 delay = 1000000000 / sensor->odr;
1378 usleep_range(delay, 2 * delay);
1379
1380 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data));
1381 if (err < 0)
1382 return err;
1383
1384 if (!hw->enable_event) {
1385 err = st_lsm6dsx_sensor_set_enable(sensor, false);
1386 if (err < 0)
1387 return err;
1388 }
1389
1390 *val = (s16)le16_to_cpu(data);
1391
1392 return IIO_VAL_INT;
1393 }
1394
st_lsm6dsx_read_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * ch,int * val,int * val2,long mask)1395 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
1396 struct iio_chan_spec const *ch,
1397 int *val, int *val2, long mask)
1398 {
1399 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1400 int ret;
1401
1402 switch (mask) {
1403 case IIO_CHAN_INFO_RAW:
1404 ret = iio_device_claim_direct_mode(iio_dev);
1405 if (ret)
1406 break;
1407
1408 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
1409 iio_device_release_direct_mode(iio_dev);
1410 break;
1411 case IIO_CHAN_INFO_SAMP_FREQ:
1412 *val = sensor->odr / 1000;
1413 *val2 = (sensor->odr % 1000) * 1000;
1414 ret = IIO_VAL_INT_PLUS_MICRO;
1415 break;
1416 case IIO_CHAN_INFO_SCALE:
1417 *val = 0;
1418 *val2 = sensor->gain;
1419 ret = IIO_VAL_INT_PLUS_NANO;
1420 break;
1421 default:
1422 ret = -EINVAL;
1423 break;
1424 }
1425
1426 return ret;
1427 }
1428
st_lsm6dsx_write_raw(struct iio_dev * iio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)1429 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
1430 struct iio_chan_spec const *chan,
1431 int val, int val2, long mask)
1432 {
1433 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1434 int err;
1435
1436 err = iio_device_claim_direct_mode(iio_dev);
1437 if (err)
1438 return err;
1439
1440 switch (mask) {
1441 case IIO_CHAN_INFO_SCALE:
1442 err = st_lsm6dsx_set_full_scale(sensor, val2);
1443 break;
1444 case IIO_CHAN_INFO_SAMP_FREQ: {
1445 u8 data;
1446
1447 val = val * 1000 + val2 / 1000;
1448 val = st_lsm6dsx_check_odr(sensor, val, &data);
1449 if (val < 0)
1450 err = val;
1451 else
1452 sensor->odr = val;
1453 break;
1454 }
1455 default:
1456 err = -EINVAL;
1457 break;
1458 }
1459
1460 iio_device_release_direct_mode(iio_dev);
1461
1462 return err;
1463 }
1464
st_lsm6dsx_event_setup(struct st_lsm6dsx_hw * hw,int state)1465 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state)
1466 {
1467 const struct st_lsm6dsx_reg *reg;
1468 unsigned int data;
1469 int err;
1470
1471 if (!hw->settings->irq_config.irq1_func.addr)
1472 return -ENOTSUPP;
1473
1474 reg = &hw->settings->event_settings.enable_reg;
1475 if (reg->addr) {
1476 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask);
1477 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1478 reg->mask, data);
1479 if (err < 0)
1480 return err;
1481 }
1482
1483 /* Enable wakeup interrupt */
1484 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask);
1485 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr,
1486 hw->irq_routing->mask, data);
1487 }
1488
st_lsm6dsx_read_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)1489 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev,
1490 const struct iio_chan_spec *chan,
1491 enum iio_event_type type,
1492 enum iio_event_direction dir,
1493 enum iio_event_info info,
1494 int *val, int *val2)
1495 {
1496 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1497 struct st_lsm6dsx_hw *hw = sensor->hw;
1498
1499 if (type != IIO_EV_TYPE_THRESH)
1500 return -EINVAL;
1501
1502 *val2 = 0;
1503 *val = hw->event_threshold;
1504
1505 return IIO_VAL_INT;
1506 }
1507
1508 static int
st_lsm6dsx_write_event(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)1509 st_lsm6dsx_write_event(struct iio_dev *iio_dev,
1510 const struct iio_chan_spec *chan,
1511 enum iio_event_type type,
1512 enum iio_event_direction dir,
1513 enum iio_event_info info,
1514 int val, int val2)
1515 {
1516 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1517 struct st_lsm6dsx_hw *hw = sensor->hw;
1518 const struct st_lsm6dsx_reg *reg;
1519 unsigned int data;
1520 int err;
1521
1522 if (type != IIO_EV_TYPE_THRESH)
1523 return -EINVAL;
1524
1525 if (val < 0 || val > 31)
1526 return -EINVAL;
1527
1528 reg = &hw->settings->event_settings.wakeup_reg;
1529 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask);
1530 err = st_lsm6dsx_update_bits_locked(hw, reg->addr,
1531 reg->mask, data);
1532 if (err < 0)
1533 return -EINVAL;
1534
1535 hw->event_threshold = val;
1536
1537 return 0;
1538 }
1539
1540 static int
st_lsm6dsx_read_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)1541 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev,
1542 const struct iio_chan_spec *chan,
1543 enum iio_event_type type,
1544 enum iio_event_direction dir)
1545 {
1546 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1547 struct st_lsm6dsx_hw *hw = sensor->hw;
1548
1549 if (type != IIO_EV_TYPE_THRESH)
1550 return -EINVAL;
1551
1552 return !!(hw->enable_event & BIT(chan->channel2));
1553 }
1554
1555 static int
st_lsm6dsx_write_event_config(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)1556 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev,
1557 const struct iio_chan_spec *chan,
1558 enum iio_event_type type,
1559 enum iio_event_direction dir, int state)
1560 {
1561 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1562 struct st_lsm6dsx_hw *hw = sensor->hw;
1563 u8 enable_event;
1564 int err;
1565
1566 if (type != IIO_EV_TYPE_THRESH)
1567 return -EINVAL;
1568
1569 if (state) {
1570 enable_event = hw->enable_event | BIT(chan->channel2);
1571
1572 /* do not enable events if they are already enabled */
1573 if (hw->enable_event)
1574 goto out;
1575 } else {
1576 enable_event = hw->enable_event & ~BIT(chan->channel2);
1577
1578 /* only turn off sensor if no events is enabled */
1579 if (enable_event)
1580 goto out;
1581 }
1582
1583 /* stop here if no changes have been made */
1584 if (hw->enable_event == enable_event)
1585 return 0;
1586
1587 err = st_lsm6dsx_event_setup(hw, state);
1588 if (err < 0)
1589 return err;
1590
1591 mutex_lock(&hw->conf_lock);
1592 if (enable_event || !(hw->fifo_mask & BIT(sensor->id)))
1593 err = __st_lsm6dsx_sensor_set_enable(sensor, state);
1594 mutex_unlock(&hw->conf_lock);
1595 if (err < 0)
1596 return err;
1597
1598 out:
1599 hw->enable_event = enable_event;
1600
1601 return 0;
1602 }
1603
st_lsm6dsx_set_watermark(struct iio_dev * iio_dev,unsigned int val)1604 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
1605 {
1606 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
1607 struct st_lsm6dsx_hw *hw = sensor->hw;
1608 int err;
1609
1610 if (val < 1 || val > hw->settings->fifo_ops.max_size)
1611 return -EINVAL;
1612
1613 mutex_lock(&hw->conf_lock);
1614
1615 err = st_lsm6dsx_update_watermark(sensor, val);
1616
1617 mutex_unlock(&hw->conf_lock);
1618
1619 if (err < 0)
1620 return err;
1621
1622 sensor->watermark = val;
1623
1624 return 0;
1625 }
1626
1627 static ssize_t
st_lsm6dsx_sysfs_sampling_frequency_avail(struct device * dev,struct device_attribute * attr,char * buf)1628 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
1629 struct device_attribute *attr,
1630 char *buf)
1631 {
1632 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1633 const struct st_lsm6dsx_odr_table_entry *odr_table;
1634 int i, len = 0;
1635
1636 odr_table = &sensor->hw->settings->odr_table[sensor->id];
1637 for (i = 0; i < odr_table->odr_len; i++)
1638 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ",
1639 odr_table->odr_avl[i].milli_hz / 1000,
1640 odr_table->odr_avl[i].milli_hz % 1000);
1641 buf[len - 1] = '\n';
1642
1643 return len;
1644 }
1645
st_lsm6dsx_sysfs_scale_avail(struct device * dev,struct device_attribute * attr,char * buf)1646 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
1647 struct device_attribute *attr,
1648 char *buf)
1649 {
1650 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
1651 const struct st_lsm6dsx_fs_table_entry *fs_table;
1652 struct st_lsm6dsx_hw *hw = sensor->hw;
1653 int i, len = 0;
1654
1655 fs_table = &hw->settings->fs_table[sensor->id];
1656 for (i = 0; i < fs_table->fs_len; i++)
1657 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%09u ",
1658 fs_table->fs_avl[i].gain);
1659 buf[len - 1] = '\n';
1660
1661 return len;
1662 }
1663
st_lsm6dsx_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)1664 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
1665 struct iio_chan_spec const *chan,
1666 long mask)
1667 {
1668 switch (mask) {
1669 case IIO_CHAN_INFO_SCALE:
1670 switch (chan->type) {
1671 case IIO_ANGL_VEL:
1672 case IIO_ACCEL:
1673 return IIO_VAL_INT_PLUS_NANO;
1674 default:
1675 return IIO_VAL_INT_PLUS_MICRO;
1676 }
1677 default:
1678 return IIO_VAL_INT_PLUS_MICRO;
1679 }
1680 }
1681
1682 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
1683 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
1684 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1685 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
1686 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
1687
1688 static struct attribute *st_lsm6dsx_acc_attributes[] = {
1689 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1690 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
1691 NULL,
1692 };
1693
1694 static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
1695 .attrs = st_lsm6dsx_acc_attributes,
1696 };
1697
1698 static const struct iio_info st_lsm6dsx_acc_info = {
1699 .attrs = &st_lsm6dsx_acc_attribute_group,
1700 .read_raw = st_lsm6dsx_read_raw,
1701 .write_raw = st_lsm6dsx_write_raw,
1702 .read_event_value = st_lsm6dsx_read_event,
1703 .write_event_value = st_lsm6dsx_write_event,
1704 .read_event_config = st_lsm6dsx_read_event_config,
1705 .write_event_config = st_lsm6dsx_write_event_config,
1706 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1707 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
1708 };
1709
1710 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
1711 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1712 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
1713 NULL,
1714 };
1715
1716 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
1717 .attrs = st_lsm6dsx_gyro_attributes,
1718 };
1719
1720 static const struct iio_info st_lsm6dsx_gyro_info = {
1721 .attrs = &st_lsm6dsx_gyro_attribute_group,
1722 .read_raw = st_lsm6dsx_read_raw,
1723 .write_raw = st_lsm6dsx_write_raw,
1724 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
1725 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
1726 };
1727
st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw * hw,int * drdy_pin)1728 static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
1729 {
1730 struct device *dev = hw->dev;
1731
1732 if (!dev_fwnode(dev))
1733 return -EINVAL;
1734
1735 return device_property_read_u32(dev, "st,drdy-int-pin", drdy_pin);
1736 }
1737
1738 static int
st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw * hw,const struct st_lsm6dsx_reg ** drdy_reg)1739 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw,
1740 const struct st_lsm6dsx_reg **drdy_reg)
1741 {
1742 int err = 0, drdy_pin;
1743
1744 if (st_lsm6dsx_get_drdy_pin(hw, &drdy_pin) < 0) {
1745 struct st_sensors_platform_data *pdata;
1746 struct device *dev = hw->dev;
1747
1748 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1749 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
1750 }
1751
1752 switch (drdy_pin) {
1753 case 1:
1754 hw->irq_routing = &hw->settings->irq_config.irq1_func;
1755 *drdy_reg = &hw->settings->irq_config.irq1;
1756 break;
1757 case 2:
1758 hw->irq_routing = &hw->settings->irq_config.irq2_func;
1759 *drdy_reg = &hw->settings->irq_config.irq2;
1760 break;
1761 default:
1762 dev_err(hw->dev, "unsupported data ready pin\n");
1763 err = -EINVAL;
1764 break;
1765 }
1766
1767 return err;
1768 }
1769
st_lsm6dsx_init_shub(struct st_lsm6dsx_hw * hw)1770 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw)
1771 {
1772 const struct st_lsm6dsx_shub_settings *hub_settings;
1773 struct st_sensors_platform_data *pdata;
1774 struct device *dev = hw->dev;
1775 unsigned int data;
1776 int err = 0;
1777
1778 hub_settings = &hw->settings->shub_settings;
1779
1780 pdata = (struct st_sensors_platform_data *)dev->platform_data;
1781 if ((dev_fwnode(dev) && device_property_read_bool(dev, "st,pullups")) ||
1782 (pdata && pdata->pullups)) {
1783 if (hub_settings->pullup_en.sec_page) {
1784 err = st_lsm6dsx_set_page(hw, true);
1785 if (err < 0)
1786 return err;
1787 }
1788
1789 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask);
1790 err = regmap_update_bits(hw->regmap,
1791 hub_settings->pullup_en.addr,
1792 hub_settings->pullup_en.mask, data);
1793
1794 if (hub_settings->pullup_en.sec_page)
1795 st_lsm6dsx_set_page(hw, false);
1796
1797 if (err < 0)
1798 return err;
1799 }
1800
1801 if (hub_settings->aux_sens.addr) {
1802 /* configure aux sensors */
1803 err = st_lsm6dsx_set_page(hw, true);
1804 if (err < 0)
1805 return err;
1806
1807 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask);
1808 err = regmap_update_bits(hw->regmap,
1809 hub_settings->aux_sens.addr,
1810 hub_settings->aux_sens.mask, data);
1811
1812 st_lsm6dsx_set_page(hw, false);
1813
1814 if (err < 0)
1815 return err;
1816 }
1817
1818 if (hub_settings->emb_func.addr) {
1819 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask);
1820 err = regmap_update_bits(hw->regmap,
1821 hub_settings->emb_func.addr,
1822 hub_settings->emb_func.mask, data);
1823 }
1824
1825 return err;
1826 }
1827
st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw * hw)1828 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw)
1829 {
1830 const struct st_lsm6dsx_hw_ts_settings *ts_settings;
1831 int err, val;
1832
1833 ts_settings = &hw->settings->ts_settings;
1834 /* enable hw timestamp generation if necessary */
1835 if (ts_settings->timer_en.addr) {
1836 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask);
1837 err = regmap_update_bits(hw->regmap,
1838 ts_settings->timer_en.addr,
1839 ts_settings->timer_en.mask, val);
1840 if (err < 0)
1841 return err;
1842 }
1843
1844 /* enable high resolution for hw ts timer if necessary */
1845 if (ts_settings->hr_timer.addr) {
1846 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask);
1847 err = regmap_update_bits(hw->regmap,
1848 ts_settings->hr_timer.addr,
1849 ts_settings->hr_timer.mask, val);
1850 if (err < 0)
1851 return err;
1852 }
1853
1854 /* enable ts queueing in FIFO if necessary */
1855 if (ts_settings->fifo_en.addr) {
1856 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask);
1857 err = regmap_update_bits(hw->regmap,
1858 ts_settings->fifo_en.addr,
1859 ts_settings->fifo_en.mask, val);
1860 if (err < 0)
1861 return err;
1862 }
1863
1864 /* calibrate timestamp sensitivity */
1865 hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY;
1866 if (ts_settings->freq_fine) {
1867 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val);
1868 if (err < 0)
1869 return err;
1870
1871 /*
1872 * linearize the AN5192 formula:
1873 * 1 / (1 + x) ~= 1 - x (Taylor’s Series)
1874 * ttrim[s] = 1 / (40000 * (1 + 0.0015 * val))
1875 * ttrim[ns] ~= 25000 - 37.5 * val
1876 * ttrim[ns] ~= 25000 - (37500 * val) / 1000
1877 */
1878 hw->ts_gain -= ((s8)val * 37500) / 1000;
1879 }
1880
1881 return 0;
1882 }
1883
st_lsm6dsx_reset_device(struct st_lsm6dsx_hw * hw)1884 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
1885 {
1886 const struct st_lsm6dsx_reg *reg;
1887 int err;
1888
1889 /*
1890 * flush hw FIFO before device reset in order to avoid
1891 * possible races on interrupt line 1. If the first interrupt
1892 * line is asserted during hw reset the device will work in
1893 * I3C-only mode (if it is supported)
1894 */
1895 err = st_lsm6dsx_flush_fifo(hw);
1896 if (err < 0 && err != -ENOTSUPP)
1897 return err;
1898
1899 /* device sw reset */
1900 reg = &hw->settings->reset;
1901 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1902 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1903 if (err < 0)
1904 return err;
1905
1906 msleep(50);
1907
1908 /* reload trimming parameter */
1909 reg = &hw->settings->boot;
1910 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1911 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1912 if (err < 0)
1913 return err;
1914
1915 msleep(50);
1916
1917 return 0;
1918 }
1919
st_lsm6dsx_init_device(struct st_lsm6dsx_hw * hw)1920 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
1921 {
1922 const struct st_lsm6dsx_reg *reg;
1923 int err;
1924
1925 err = st_lsm6dsx_reset_device(hw);
1926 if (err < 0)
1927 return err;
1928
1929 /* enable Block Data Update */
1930 reg = &hw->settings->bdu;
1931 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1932 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1933 if (err < 0)
1934 return err;
1935
1936 /* enable FIFO watermak interrupt */
1937 err = st_lsm6dsx_get_drdy_reg(hw, ®);
1938 if (err < 0)
1939 return err;
1940
1941 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1942 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1943 if (err < 0)
1944 return err;
1945
1946 /* enable Latched interrupts for device events */
1947 if (hw->settings->irq_config.lir.addr) {
1948 reg = &hw->settings->irq_config.lir;
1949 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1950 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1951 if (err < 0)
1952 return err;
1953
1954 /* enable clear on read for latched interrupts */
1955 if (hw->settings->irq_config.clear_on_read.addr) {
1956 reg = &hw->settings->irq_config.clear_on_read;
1957 err = regmap_update_bits(hw->regmap,
1958 reg->addr, reg->mask,
1959 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1960 if (err < 0)
1961 return err;
1962 }
1963 }
1964
1965 /* enable drdy-mas if available */
1966 if (hw->settings->drdy_mask.addr) {
1967 reg = &hw->settings->drdy_mask;
1968 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
1969 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
1970 if (err < 0)
1971 return err;
1972 }
1973
1974 err = st_lsm6dsx_init_shub(hw);
1975 if (err < 0)
1976 return err;
1977
1978 return st_lsm6dsx_init_hw_timer(hw);
1979 }
1980
st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw * hw,enum st_lsm6dsx_sensor_id id,const char * name)1981 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
1982 enum st_lsm6dsx_sensor_id id,
1983 const char *name)
1984 {
1985 struct st_lsm6dsx_sensor *sensor;
1986 struct iio_dev *iio_dev;
1987
1988 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
1989 if (!iio_dev)
1990 return NULL;
1991
1992 iio_dev->modes = INDIO_DIRECT_MODE;
1993 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
1994 iio_dev->channels = hw->settings->channels[id].chan;
1995 iio_dev->num_channels = hw->settings->channels[id].len;
1996
1997 sensor = iio_priv(iio_dev);
1998 sensor->id = id;
1999 sensor->hw = hw;
2000 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz;
2001 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain;
2002 sensor->watermark = 1;
2003
2004 switch (id) {
2005 case ST_LSM6DSX_ID_ACC:
2006 iio_dev->info = &st_lsm6dsx_acc_info;
2007 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
2008 name);
2009 break;
2010 case ST_LSM6DSX_ID_GYRO:
2011 iio_dev->info = &st_lsm6dsx_gyro_info;
2012 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
2013 name);
2014 break;
2015 default:
2016 return NULL;
2017 }
2018 iio_dev->name = sensor->name;
2019
2020 return iio_dev;
2021 }
2022
2023 static bool
st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw * hw)2024 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw)
2025 {
2026 const struct st_lsm6dsx_event_settings *event_settings;
2027 int err, data;
2028 s64 timestamp;
2029
2030 if (!hw->enable_event)
2031 return false;
2032
2033 event_settings = &hw->settings->event_settings;
2034 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg,
2035 &data, sizeof(data));
2036 if (err < 0)
2037 return false;
2038
2039 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
2040 if ((data & hw->settings->event_settings.wakeup_src_z_mask) &&
2041 (hw->enable_event & BIT(IIO_MOD_Z)))
2042 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2043 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2044 0,
2045 IIO_MOD_Z,
2046 IIO_EV_TYPE_THRESH,
2047 IIO_EV_DIR_EITHER),
2048 timestamp);
2049
2050 if ((data & hw->settings->event_settings.wakeup_src_y_mask) &&
2051 (hw->enable_event & BIT(IIO_MOD_Y)))
2052 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2053 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2054 0,
2055 IIO_MOD_Y,
2056 IIO_EV_TYPE_THRESH,
2057 IIO_EV_DIR_EITHER),
2058 timestamp);
2059
2060 if ((data & hw->settings->event_settings.wakeup_src_x_mask) &&
2061 (hw->enable_event & BIT(IIO_MOD_X)))
2062 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC],
2063 IIO_MOD_EVENT_CODE(IIO_ACCEL,
2064 0,
2065 IIO_MOD_X,
2066 IIO_EV_TYPE_THRESH,
2067 IIO_EV_DIR_EITHER),
2068 timestamp);
2069
2070 return data & event_settings->wakeup_src_status_mask;
2071 }
2072
st_lsm6dsx_handler_thread(int irq,void * private)2073 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private)
2074 {
2075 struct st_lsm6dsx_hw *hw = private;
2076 int fifo_len = 0, len;
2077 bool event;
2078
2079 event = st_lsm6dsx_report_motion_event(hw);
2080
2081 if (!hw->settings->fifo_ops.read_fifo)
2082 return event ? IRQ_HANDLED : IRQ_NONE;
2083
2084 /*
2085 * If we are using edge IRQs, new samples can arrive while
2086 * processing current interrupt since there are no hw
2087 * guarantees the irq line stays "low" long enough to properly
2088 * detect the new interrupt. In this case the new sample will
2089 * be missed.
2090 * Polling FIFO status register allow us to read new
2091 * samples even if the interrupt arrives while processing
2092 * previous data and the timeslot where the line is "low" is
2093 * too short to be properly detected.
2094 */
2095 do {
2096 mutex_lock(&hw->fifo_lock);
2097 len = hw->settings->fifo_ops.read_fifo(hw);
2098 mutex_unlock(&hw->fifo_lock);
2099
2100 if (len > 0)
2101 fifo_len += len;
2102 } while (len > 0);
2103
2104 return fifo_len || event ? IRQ_HANDLED : IRQ_NONE;
2105 }
2106
st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw * hw)2107 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw)
2108 {
2109 struct st_sensors_platform_data *pdata;
2110 const struct st_lsm6dsx_reg *reg;
2111 struct device *dev = hw->dev;
2112 unsigned long irq_type;
2113 bool irq_active_low;
2114 int err;
2115
2116 irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq));
2117
2118 switch (irq_type) {
2119 case IRQF_TRIGGER_HIGH:
2120 case IRQF_TRIGGER_RISING:
2121 irq_active_low = false;
2122 break;
2123 case IRQF_TRIGGER_LOW:
2124 case IRQF_TRIGGER_FALLING:
2125 irq_active_low = true;
2126 break;
2127 default:
2128 dev_info(hw->dev, "mode %lx unsupported\n", irq_type);
2129 return -EINVAL;
2130 }
2131
2132 reg = &hw->settings->irq_config.hla;
2133 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2134 ST_LSM6DSX_SHIFT_VAL(irq_active_low,
2135 reg->mask));
2136 if (err < 0)
2137 return err;
2138
2139 pdata = (struct st_sensors_platform_data *)dev->platform_data;
2140 if ((dev_fwnode(dev) && device_property_read_bool(dev, "drive-open-drain")) ||
2141 (pdata && pdata->open_drain)) {
2142 reg = &hw->settings->irq_config.od;
2143 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
2144 ST_LSM6DSX_SHIFT_VAL(1, reg->mask));
2145 if (err < 0)
2146 return err;
2147
2148 irq_type |= IRQF_SHARED;
2149 }
2150
2151 err = devm_request_threaded_irq(hw->dev, hw->irq,
2152 NULL,
2153 st_lsm6dsx_handler_thread,
2154 irq_type | IRQF_ONESHOT,
2155 "lsm6dsx", hw);
2156 if (err) {
2157 dev_err(hw->dev, "failed to request trigger irq %d\n",
2158 hw->irq);
2159 return err;
2160 }
2161
2162 return 0;
2163 }
2164
st_lsm6dsx_init_regulators(struct device * dev)2165 static int st_lsm6dsx_init_regulators(struct device *dev)
2166 {
2167 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2168 int err;
2169
2170 /* vdd-vddio power regulators */
2171 hw->regulators[0].supply = "vdd";
2172 hw->regulators[1].supply = "vddio";
2173 err = devm_regulator_bulk_get(dev, ARRAY_SIZE(hw->regulators),
2174 hw->regulators);
2175 if (err)
2176 return dev_err_probe(dev, err, "failed to get regulators\n");
2177
2178 err = regulator_bulk_enable(ARRAY_SIZE(hw->regulators),
2179 hw->regulators);
2180 if (err) {
2181 dev_err(dev, "failed to enable regulators: %d\n", err);
2182 return err;
2183 }
2184
2185 msleep(50);
2186
2187 return 0;
2188 }
2189
st_lsm6dsx_chip_uninit(void * data)2190 static void st_lsm6dsx_chip_uninit(void *data)
2191 {
2192 struct st_lsm6dsx_hw *hw = data;
2193
2194 regulator_bulk_disable(ARRAY_SIZE(hw->regulators), hw->regulators);
2195 }
2196
st_lsm6dsx_probe(struct device * dev,int irq,int hw_id,struct regmap * regmap)2197 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id,
2198 struct regmap *regmap)
2199 {
2200 struct st_sensors_platform_data *pdata = dev->platform_data;
2201 const struct st_lsm6dsx_shub_settings *hub_settings;
2202 struct st_lsm6dsx_hw *hw;
2203 const char *name = NULL;
2204 int i, err;
2205
2206 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
2207 if (!hw)
2208 return -ENOMEM;
2209
2210 dev_set_drvdata(dev, (void *)hw);
2211
2212 mutex_init(&hw->fifo_lock);
2213 mutex_init(&hw->conf_lock);
2214 mutex_init(&hw->page_lock);
2215
2216 err = st_lsm6dsx_init_regulators(dev);
2217 if (err)
2218 return err;
2219
2220 err = devm_add_action_or_reset(dev, st_lsm6dsx_chip_uninit, hw);
2221 if (err)
2222 return err;
2223
2224 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL);
2225 if (!hw->buff)
2226 return -ENOMEM;
2227
2228 hw->dev = dev;
2229 hw->irq = irq;
2230 hw->regmap = regmap;
2231
2232 err = st_lsm6dsx_check_whoami(hw, hw_id, &name);
2233 if (err < 0)
2234 return err;
2235
2236 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) {
2237 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
2238 if (!hw->iio_devs[i])
2239 return -ENOMEM;
2240 }
2241
2242 err = st_lsm6dsx_init_device(hw);
2243 if (err < 0)
2244 return err;
2245
2246 hub_settings = &hw->settings->shub_settings;
2247 if (hub_settings->master_en.addr) {
2248 err = st_lsm6dsx_shub_probe(hw, name);
2249 if (err < 0)
2250 return err;
2251 }
2252
2253 if (hw->irq > 0) {
2254 err = st_lsm6dsx_irq_setup(hw);
2255 if (err < 0)
2256 return err;
2257
2258 err = st_lsm6dsx_fifo_setup(hw);
2259 if (err < 0)
2260 return err;
2261 }
2262
2263 err = iio_read_mount_matrix(hw->dev, &hw->orientation);
2264 if (err)
2265 return err;
2266
2267 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2268 if (!hw->iio_devs[i])
2269 continue;
2270
2271 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
2272 if (err)
2273 return err;
2274 }
2275
2276 if ((dev_fwnode(dev) && device_property_read_bool(dev, "wakeup-source")) ||
2277 (pdata && pdata->wakeup_source))
2278 device_init_wakeup(dev, true);
2279
2280 return 0;
2281 }
2282 EXPORT_SYMBOL(st_lsm6dsx_probe);
2283
st_lsm6dsx_suspend(struct device * dev)2284 static int __maybe_unused st_lsm6dsx_suspend(struct device *dev)
2285 {
2286 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2287 struct st_lsm6dsx_sensor *sensor;
2288 int i, err = 0;
2289
2290 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2291 if (!hw->iio_devs[i])
2292 continue;
2293
2294 sensor = iio_priv(hw->iio_devs[i]);
2295 if (!(hw->enable_mask & BIT(sensor->id)))
2296 continue;
2297
2298 if (device_may_wakeup(dev) &&
2299 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) {
2300 /* Enable wake from IRQ */
2301 enable_irq_wake(hw->irq);
2302 continue;
2303 }
2304
2305 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2306 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2307 sensor->id == ST_LSM6DSX_ID_EXT2)
2308 err = st_lsm6dsx_shub_set_enable(sensor, false);
2309 else
2310 err = st_lsm6dsx_sensor_set_enable(sensor, false);
2311 if (err < 0)
2312 return err;
2313
2314 hw->suspend_mask |= BIT(sensor->id);
2315 }
2316
2317 if (hw->fifo_mask)
2318 err = st_lsm6dsx_flush_fifo(hw);
2319
2320 return err;
2321 }
2322
st_lsm6dsx_resume(struct device * dev)2323 static int __maybe_unused st_lsm6dsx_resume(struct device *dev)
2324 {
2325 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
2326 struct st_lsm6dsx_sensor *sensor;
2327 int i, err = 0;
2328
2329 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
2330 if (!hw->iio_devs[i])
2331 continue;
2332
2333 sensor = iio_priv(hw->iio_devs[i]);
2334 if (device_may_wakeup(dev) &&
2335 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event)
2336 disable_irq_wake(hw->irq);
2337
2338 if (!(hw->suspend_mask & BIT(sensor->id)))
2339 continue;
2340
2341 if (sensor->id == ST_LSM6DSX_ID_EXT0 ||
2342 sensor->id == ST_LSM6DSX_ID_EXT1 ||
2343 sensor->id == ST_LSM6DSX_ID_EXT2)
2344 err = st_lsm6dsx_shub_set_enable(sensor, true);
2345 else
2346 err = st_lsm6dsx_sensor_set_enable(sensor, true);
2347 if (err < 0)
2348 return err;
2349
2350 hw->suspend_mask &= ~BIT(sensor->id);
2351 }
2352
2353 if (hw->fifo_mask)
2354 err = st_lsm6dsx_resume_fifo(hw);
2355
2356 return err;
2357 }
2358
2359 const struct dev_pm_ops st_lsm6dsx_pm_ops = {
2360 SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume)
2361 };
2362 EXPORT_SYMBOL(st_lsm6dsx_pm_ops);
2363
2364 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
2365 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
2366 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
2367 MODULE_LICENSE("GPL v2");
2368