1 /* 2 * Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <errno.h> 8 9 #include <platform_def.h> 10 11 #include <common/debug.h> 12 #include <drivers/st/bsec.h> 13 #include <drivers/st/stm32mp1_rcc.h> 14 #include <lib/mmio.h> 15 #include <lib/utils_def.h> 16 17 #include <stm32mp1_dbgmcu.h> 18 19 #define DBGMCU_IDC U(0x00) 20 #define DBGMCU_APB4FZ1 U(0x2C) 21 22 #define DBGMCU_IDC_DEV_ID_MASK GENMASK(11, 0) 23 #define DBGMCU_IDC_REV_ID_MASK GENMASK(31, 16) 24 #define DBGMCU_IDC_REV_ID_SHIFT 16 25 26 #define DBGMCU_APB4FZ1_IWDG2 BIT(2) 27 get_rcc_base(void)28static uintptr_t get_rcc_base(void) 29 { 30 /* This is called before stm32mp_rcc_base() is available */ 31 return RCC_BASE; 32 } 33 stm32mp1_dbgmcu_init(void)34static int stm32mp1_dbgmcu_init(void) 35 { 36 uint32_t dbg_conf; 37 uintptr_t rcc_base = get_rcc_base(); 38 39 dbg_conf = bsec_read_debug_conf(); 40 41 if ((dbg_conf & BSEC_DBGSWGEN) == 0U) { 42 uint32_t result = bsec_write_debug_conf(dbg_conf | 43 BSEC_DBGSWGEN); 44 45 if (result != BSEC_OK) { 46 ERROR("Error enabling DBGSWGEN\n"); 47 return -1; 48 } 49 } 50 51 mmio_setbits_32(rcc_base + RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN); 52 53 return 0; 54 } 55 stm32mp1_dbgmcu_get_chip_version(uint32_t * chip_version)56int stm32mp1_dbgmcu_get_chip_version(uint32_t *chip_version) 57 { 58 if (stm32mp1_dbgmcu_init() != 0) { 59 return -EPERM; 60 } 61 62 *chip_version = (mmio_read_32(DBGMCU_BASE + DBGMCU_IDC) & 63 DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT; 64 65 return 0; 66 } 67 stm32mp1_dbgmcu_get_chip_dev_id(uint32_t * chip_dev_id)68int stm32mp1_dbgmcu_get_chip_dev_id(uint32_t *chip_dev_id) 69 { 70 if (stm32mp1_dbgmcu_init() != 0) { 71 return -EPERM; 72 } 73 74 *chip_dev_id = mmio_read_32(DBGMCU_BASE + DBGMCU_IDC) & 75 DBGMCU_IDC_DEV_ID_MASK; 76 77 return 0; 78 } 79 stm32mp1_dbgmcu_freeze_iwdg2(void)80int stm32mp1_dbgmcu_freeze_iwdg2(void) 81 { 82 uint32_t dbg_conf; 83 84 if (stm32mp1_dbgmcu_init() != 0) { 85 return -EPERM; 86 } 87 88 dbg_conf = bsec_read_debug_conf(); 89 90 if ((dbg_conf & (BSEC_SPIDEN | BSEC_SPINDEN)) != 0U) { 91 mmio_setbits_32(DBGMCU_BASE + DBGMCU_APB4FZ1, 92 DBGMCU_APB4FZ1_IWDG2); 93 } 94 95 return 0; 96 } 97