1 /*
2  * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <platform_def.h>
10 
11 #include <common/debug.h>
12 #include <lib/mmio.h>
13 #include <lib/psci/psci.h>
14 
15 #include <sunxi_cpucfg.h>
16 #include <sunxi_private.h>
17 
sunxi_validate_ns_entrypoint(uintptr_t ns_entrypoint)18 int sunxi_validate_ns_entrypoint(uintptr_t ns_entrypoint)
19 {
20 	/* The non-secure entry point must be in DRAM */
21 	if (ns_entrypoint < SUNXI_DRAM_BASE) {
22 		return PSCI_E_INVALID_ADDRESS;
23 	}
24 
25 	return PSCI_E_SUCCESS;
26 }
27 
plat_setup_psci_ops(uintptr_t sec_entrypoint,const plat_psci_ops_t ** psci_ops)28 int plat_setup_psci_ops(uintptr_t sec_entrypoint,
29 			const plat_psci_ops_t **psci_ops)
30 {
31 	assert(psci_ops);
32 
33 	/* Program all CPU entry points. */
34 	for (unsigned int cpu = 0; cpu < PLATFORM_CORE_COUNT; ++cpu) {
35 		mmio_write_32(SUNXI_CPUCFG_RVBAR_LO_REG(cpu),
36 			      sec_entrypoint & 0xffffffff);
37 		mmio_write_32(SUNXI_CPUCFG_RVBAR_HI_REG(cpu),
38 			      sec_entrypoint >> 32);
39 	}
40 
41 	if (sunxi_set_scpi_psci_ops(psci_ops) == 0) {
42 		INFO("PSCI: Suspend is available via SCPI\n");
43 	} else {
44 		INFO("PSCI: Suspend is unavailable\n");
45 		sunxi_set_native_psci_ops(psci_ops);
46 	}
47 
48 	return 0;
49 }
50