1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2002-2010 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 */ 6 7 #ifndef __ASM_GBL_DATA_H 8 #define __ASM_GBL_DATA_H 9 10 #ifndef __ASSEMBLY__ 11 12 #include <asm/types.h> 13 #include <linux/types.h> 14 15 /* Architecture-specific global data */ 16 struct arch_global_data { 17 #if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_FSL_ESDHC_IMX) 18 u32 sdhc_clk; 19 #endif 20 21 #if defined(CONFIG_FSL_ESDHC) 22 u32 sdhc_per_clk; 23 #endif 24 25 #if defined(CONFIG_U_QE) 26 u32 qe_clk; 27 u32 brg_clk; 28 uint mp_alloc_base; 29 uint mp_alloc_top; 30 #endif /* CONFIG_U_QE */ 31 32 #ifdef CONFIG_AT91FAMILY 33 /* "static data" needed by at91's clock.c */ 34 unsigned long cpu_clk_rate_hz; 35 unsigned long main_clk_rate_hz; 36 unsigned long mck_rate_hz; 37 unsigned long plla_rate_hz; 38 unsigned long pllb_rate_hz; 39 unsigned long at91_pllb_usb_init; 40 #endif 41 /* "static data" needed by most of timer.c on ARM platforms */ 42 unsigned long timer_rate_hz; 43 unsigned int tbu; 44 unsigned int tbl; 45 unsigned long lastinc; 46 unsigned long long timer_reset_value; 47 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) 48 unsigned long tlb_addr; 49 unsigned long tlb_size; 50 #if defined(CONFIG_ARM64) 51 unsigned long tlb_fillptr; 52 unsigned long tlb_emerg; 53 #endif 54 #endif 55 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE 56 #define MEM_RESERVE_SECURE_SECURED 0x1 57 #define MEM_RESERVE_SECURE_MAINTAINED 0x2 58 #define MEM_RESERVE_SECURE_ADDR_MASK (~0x3) 59 /* 60 * Secure memory addr 61 * This variable needs maintenance if the RAM base is not zero, 62 * or if RAM splits into non-consecutive banks. It also has a 63 * flag indicating the secure memory is marked as secure by MMU. 64 * Flags used: 0x1 secured 65 * 0x2 maintained 66 */ 67 phys_addr_t secure_ram; 68 unsigned long tlb_allocated; 69 #endif 70 #ifdef CONFIG_RESV_RAM 71 /* 72 * Reserved RAM for memory resident, eg. Management Complex (MC) 73 * driver which continues to run after U-Boot exits. 74 */ 75 phys_addr_t resv_ram; 76 #endif 77 78 #ifdef CONFIG_ARCH_OMAP2PLUS 79 u32 omap_boot_device; 80 u32 omap_boot_mode; 81 u8 omap_ch_flags; 82 #endif 83 #if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR) 84 unsigned long mem2_clk; 85 #endif 86 87 #ifdef CONFIG_ARCH_IMX8 88 struct udevice *scu_dev; 89 #endif 90 }; 91 92 #include <asm-generic/global_data.h> 93 94 #ifdef __clang__ 95 96 #define DECLARE_GLOBAL_DATA_PTR 97 #define gd get_gd() 98 get_gd(void)99static inline gd_t *get_gd(void) 100 { 101 gd_t *gd_ptr; 102 103 #ifdef CONFIG_ARM64 104 __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr)); 105 #else 106 __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr)); 107 #endif 108 109 return gd_ptr; 110 } 111 112 #else 113 114 #ifdef CONFIG_ARM64 115 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18") 116 #else 117 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9") 118 #endif 119 #endif 120 set_gd(volatile gd_t * gd_ptr)121static inline void set_gd(volatile gd_t *gd_ptr) 122 { 123 #ifdef CONFIG_ARM64 124 __asm__ volatile("ldr x18, %0\n" : : "m"(gd_ptr)); 125 #else 126 __asm__ volatile("ldr r9, %0\n" : : "m"(gd_ptr)); 127 #endif 128 } 129 130 #endif /* __ASSEMBLY__ */ 131 132 #endif /* __ASM_GBL_DATA_H */ 133