Home
last modified time | relevance | path

Searched defs:val (Results 1 – 25 of 1184) sorted by relevance

12345678910>>...48

/u-boot/arch/microblaze/include/asm/
A Dasm.h9 #define NGET(val, fslnum) \ argument
12 #define GET(val, fslnum) \ argument
15 #define NCGET(val, fslnum) \ argument
18 #define CGET(val, fslnum) \ argument
24 #define PUT(val, fslnum) \ argument
35 #define MFS(val, reg) \ argument
38 #define MTS(val, reg) \ argument
42 #define R14(val) \ argument
46 #define R17(val) \ argument
53 #define MSRSET(val) \ argument
[all …]
/u-boot/include/bedbug/
A Dregs.h169 #define SET_REGISTER( str, val ) \ argument
180 #define SET_CR(val) SET_REGISTER( "mtcr %0", val ) argument
182 #define SET_MSR(val) SET_REGISTER( "mtmsr %0", val ) argument
184 #define SET_XER(val) SET_REGISTER( "mtspr 1,%0", val ) argument
186 #define SET_LR(val) SET_REGISTER( "mtspr 8,%0", val ) argument
188 #define SET_CTR(val) SET_REGISTER( "mtspr 9,%0", val ) argument
192 #define SET_DAR(val) SET_REGISTER( "mtspr 19,%0", val ) argument
194 #define SET_DEC(val) SET_REGISTER( "mtspr 22,%0", val ) argument
198 #define SET_SRR1(val) SET_REGISTER( "mtspr 27,%0", val ) argument
200 #define SET_EIE(val) SET_REGISTER( "mtspr 80,%0", val ) argument
[all …]
/u-boot/arch/x86/include/asm/
A Dcontrol_regs.h24 unsigned long val; in read_cr0() local
30 static inline void write_cr0(unsigned long val) in write_cr0()
37 unsigned long val; in read_cr2() local
45 unsigned long val; in read_cr3() local
53 unsigned long val; in read_cr4() local
61 unsigned long val = 0; /* Damn you, gcc! */ in get_debugreg() local
A Dmsr.h63 #define DECLARE_ARGS(val, low, high) unsigned low, high argument
65 #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high) argument
69 #define EAX_EDX_VAL(val, low, high) (val) argument
70 #define EAX_EDX_ARGS(val, low, high) "A" (val) argument
71 #define EAX_EDX_RET(val, low, high) "=A" (val) argument
124 #define rdmsrl(msr, val) \ argument
127 #define wrmsrl(msr, val) \ argument
132 u64 val; in msr_clrsetbits_64() local
142 u64 val; in msr_setbits_64() local
151 u64 val; in msr_clrbits_64() local
[all …]
/u-boot/drivers/bios_emulator/
A Dbesys.c143 u8 val = readb_le(BE_memaddr(addr)); in BE_rdb() local
165 u16 val = readw_le(base); in BE_rdw() local
187 u32 val = readl_le(base); in BE_rdl() local
201 void X86API BE_wrb(u32 addr, u8 val) in BE_wrb()
217 void X86API BE_wrw(u32 addr, u16 val) in BE_wrw()
235 void X86API BE_wrl(u32 addr, u32 val) in BE_wrl()
269 u8 val = 0xff; in VGA_inpb() local
343 static void VGA_outpb (int port, u8 val) in VGA_outpb()
572 u8 val = 0; in BE_inb() local
618 u16 val = 0; in BE_inw() local
[all …]
/u-boot/include/linux/
A Diopoll.h29 #define read_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \ argument
49 #define readl_poll_sleep_timeout(addr, val, cond, sleep_us, timeout_us) \ argument
52 #define readx_poll_timeout(op, addr, val, cond, timeout_us) \ argument
55 #define readb_poll_timeout(addr, val, cond, timeout_us) \ argument
58 #define readw_poll_timeout(addr, val, cond, timeout_us) \ argument
61 #define readl_poll_timeout(addr, val, cond, timeout_us) \ argument
64 #define readq_poll_timeout(addr, val, cond, timeout_us) \ argument
67 #define readb_relaxed_poll_timeout(addr, val, cond, timeout_us) \ argument
70 #define readw_relaxed_poll_timeout(addr, val, cond, timeout_us) \ argument
73 #define readl_relaxed_poll_timeout(addr, val, cond, timeout_us) \ argument
[all …]
/u-boot/arch/mips/include/asm/
A Dmipsregs.h1283 #define write_r10k_perf_cntr(counter,val) \ argument
1302 #define write_r10k_perf_cntl(counter,val) \ argument
1409 #define __write_ulong_c0_register(reg, sel, val) \ argument
1465 #define __write_64bit_c0_split(source, sel, val) \ argument
2021 #define __write_ulong_gc0_register(reg, sel, val) \ argument
2251 #define _write_32bit_cp1_register(dest, val, gas_hardfloat) \ argument
2265 #define write_32bit_cp1_register(dest, val) \ argument
2270 #define write_32bit_cp1_register(dest, val) \ argument
2290 #define wrdsp(val, mask) \ argument
2522 #define wrdsp(val, mask) \ argument
[all …]
/u-boot/include/linux/unaligned/
A Dle_byteshift.h22 static inline void __put_unaligned_le16(u16 val, u8 *p) in __put_unaligned_le16()
28 static inline void __put_unaligned_le32(u32 val, u8 *p) in __put_unaligned_le32()
34 static inline void __put_unaligned_le64(u64 val, u8 *p) in __put_unaligned_le64()
55 static inline void put_unaligned_le16(u16 val, void *p) in put_unaligned_le16()
60 static inline void put_unaligned_le32(u32 val, void *p) in put_unaligned_le32()
65 static inline void put_unaligned_le64(u64 val, void *p) in put_unaligned_le64()
A Daccess_ok.h36 static inline void put_unaligned_le16(u16 val, void *p) in put_unaligned_le16()
41 static inline void put_unaligned_le32(u32 val, void *p) in put_unaligned_le32()
46 static inline void put_unaligned_le64(u64 val, void *p) in put_unaligned_le64()
51 static inline void put_unaligned_be16(u16 val, void *p) in put_unaligned_be16()
56 static inline void put_unaligned_be32(u32 val, void *p) in put_unaligned_be32()
61 static inline void put_unaligned_be64(u64 val, void *p) in put_unaligned_be64()
A Dbe_byteshift.h22 static inline void __put_unaligned_be16(u16 val, u8 *p) in __put_unaligned_be16()
28 static inline void __put_unaligned_be32(u32 val, u8 *p) in __put_unaligned_be32()
34 static inline void __put_unaligned_be64(u64 val, u8 *p) in __put_unaligned_be64()
55 static inline void put_unaligned_be16(u16 val, void *p) in put_unaligned_be16()
60 static inline void put_unaligned_be32(u32 val, void *p) in put_unaligned_be32()
65 static inline void put_unaligned_be64(u64 val, void *p) in put_unaligned_be64()
/u-boot/include/dt-bindings/pinctrl/
A Domap.h61 #define OMAP2420_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0030) (val) argument
62 #define OMAP2430_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) argument
63 #define OMAP3_CORE1_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2030) (val) argument
64 #define OMAP3430_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25d8) (val) argument
65 #define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val) argument
66 #define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val) argument
67 #define DM814X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) argument
68 #define DM816X_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) argument
69 #define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val) argument
77 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val) argument
[all …]
/u-boot/arch/arm/mach-imx/mx7ulp/
A Dpcc.c84 u32 reg, val; in pcc_clock_enable() local
114 u32 reg, val, i, clksrc_type; in pcc_clock_sel() local
163 u32 reg, val; in pcc_clock_div_config() local
199 u32 reg, val; in pcc_clock_is_enable() local
215 u32 reg, val, clksrc_type; in pcc_clock_get_clksrc() local
256 u32 reg, val, rate, frac, div; in pcc_clock_get_rate() local
/u-boot/board/gdsys/common/
A Dihs_mdio.c40 u16 val) in write_reg()
54 u16 val; in read_control() local
63 static inline void write_control(struct ihs_mdio_info *info, u16 val) in write_control()
72 static inline void write_addr_data(struct ihs_mdio_info *info, u16 val) in write_addr_data()
83 u16 val; in read_rx_data() local
95 u16 val; in ihs_mdio_idle() local
119 u16 val; in ihs_mdio_read() local
/u-boot/arch/mips/mach-ath79/ar933x/
A Dlowlevel_init.S14 #define SET_BIT(val, bit) ((val) | (1 << (bit))) argument
15 #define SET_PLL_PD(val) SET_BIT(val, 30) argument
16 #define AHB_DIV_TO_4(val) SET_BIT(SET_BIT(val, 15), 16) argument
17 #define PLL_BYPASS(val) SET_BIT(val, 2) argument
/u-boot/drivers/misc/
A Dmxs_ocotp.c81 static void mxs_ocotp_scale_vddio(bool enter, uint32_t *val) in mxs_ocotp_scale_vddio()
138 static int mxs_ocotp_scale_hclk(bool enter, uint32_t *val) in mxs_ocotp_scale_hclk()
242 static int mxs_ocotp_read_fuse(uint32_t reg, uint32_t *val) in mxs_ocotp_read_fuse()
286 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read()
297 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog()
308 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense()
314 int fuse_override(u32 bank, u32 word, u32 val) in fuse_override()
A Dstm32mp_fuse.c21 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read()
66 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog()
110 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense()
154 int fuse_override(u32 bank, u32 word, u32 val) in fuse_override()
/u-boot/drivers/usb/phy/
A Domap_usb_phy.c70 u32 val; in omap_usb_dpll_relock() local
83 u32 val; in omap_usb_dpll_lock() local
120 u32 val; in usb3_phy_partial_powerup() local
132 u32 val; in usb_phy_power() local
159 u32 val; in omap_enable_usb3_phy() local
194 u32 reg, val; in omap_enable_usb2_phy2() local
234 u32 val; in usb_phy_power() local
/u-boot/drivers/usb/ulpi/
A Dulpi.c35 u32 val, tval = ULPI_TEST_VALUE; in ulpi_integrity_check() local
56 u32 val, id = 0; in ulpi_init() local
78 u32 val; in ulpi_select_transceiver() local
116 u32 flags, val; in ulpi_set_vbus_indicator() local
142 u32 val = ULPI_OTG_DP_PULLDOWN | ULPI_OTG_DM_PULLDOWN; in ulpi_set_pd() local
151 u32 val; in ulpi_opmode_sel() local
209 u32 val; in __ulpi_reset_wait() local
/u-boot/arch/arm/mach-imx/mx7/
A Dclock_slice.c436 u32 val; in clock_get_src() local
491 u32 val; in clock_get_prediv() local
550 u32 val; in clock_get_postdiv() local
575 u32 val; in clock_set_autopostdiv() local
613 u32 val; in clock_get_autopostdiv() local
650 int clock_get_target_val(enum clk_root_index clock_id, u32 *val) in clock_get_target_val()
660 int clock_set_target_val(enum clk_root_index clock_id, u32 val) in clock_set_target_val()
674 u32 val; in clock_root_cfg() local
726 u32 val; in clock_root_enabled() local
/u-boot/arch/arm/mach-mvebu/
A Defuse.c73 struct efuse_val val; in do_prog_efuse() local
150 int mvebu_read_efuse(int nr, struct efuse_val *val) in mvebu_read_efuse()
172 int mvebu_write_efuse(int nr, struct efuse_val *val) in mvebu_write_efuse()
179 struct efuse_val val = { in mvebu_lock_efuse() local
199 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read()
219 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense()
225 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog()
261 int fuse_override(u32 bank, u32 word, u32 val) in fuse_override()
/u-boot/drivers/bios_emulator/x86emu/
A Dsys.c106 void X86API wrb(u32 addr, u8 val) in wrb()
118 void X86API wrw(u32 addr, u16 val) in wrw()
130 void X86API wrl(u32 addr, u32 val) in wrl()
186 static void X86API p_outb(X86EMU_pioAddr addr, u8 val) in p_outb()
200 static void X86API p_outw(X86EMU_pioAddr addr, u16 val) in p_outw()
214 static void X86API p_outl(X86EMU_pioAddr addr, u32 val) in p_outl()
/u-boot/include/dt-bindings/sound/
A Dazalia.h25 #define AZALIA_SET_BYTE(codec, nid, opcode, val, byte) \ argument
32 #define AZALIA_WORD(codec, nid, opcode, val) \ argument
38 #define AZALIA_PIN_CFG(codec, nid, val) \ argument
41 #define AZALIA_SUBVENDOR(codec, val) \ argument
/u-boot/arch/arm/mach-tegra/
A Dpinmux-common.c162 u32 val; in pinmux_set_func() local
193 u32 val; in pinmux_set_pullupdown() local
208 u32 val; in pinmux_set_tristate() local
236 u32 val; in pinmux_set_io() local
258 u32 val; in pinmux_set_lock() local
285 u32 val; in pinmux_set_od() local
310 u32 val; in pinmux_set_ioreset() local
335 u32 val; in pinmux_set_rcv_sel() local
360 u32 val; in pinmux_set_e_io_hv() local
384 u32 val; in pinmux_set_schmt() local
[all …]
/u-boot/drivers/misc/imx8/
A Dfuse.c34 int fuse_read(u32 bank, u32 word, u32 *val) in fuse_read()
39 int fuse_sense(u32 bank, u32 word, u32 *val) in fuse_sense()
55 int fuse_prog(u32 bank, u32 word, u32 val) in fuse_prog()
91 int fuse_override(u32 bank, u32 word, u32 val) in fuse_override()
/u-boot/arch/arm/include/asm/arch-s32v234/
A Dmc_cgm_regs.h21 #define MC_CGM_SC_DCn_PREDIV(val) (MC_CGM_SC_DCn_PREDIV_MASK & ((val) << MC_CGM_SC_DCn_PREDIV_OFFSE… argument
30 #define MC_CGM_ACn_DCm_PREDIV(val) (MC_CGM_ACn_DCm_PREDIV_MASK & ((val) << MC_CGM_ACn_DCm_PREDIV_O… argument
95 #define PLLDIG_PLLFD_MFN_SET(val) (PLLDIG_PLLFD_MFN_MASK & (val)) argument
101 #define PLLDIG_PLLCAL1_NDAC1_SET(val) (PLLDIG_PLLCAL1_NDAC1_MASK & ((val) << PLLDIG_PLLCAL1_NDAC1_O… argument
112 #define DFS_DLLPRG1_V2IGC_SET(val) (DFS_DLLPRG1_V2IGC_MASK & ((val) << DFS_DLLPRG1_V2IGC_OFFSET)) argument
116 #define DFS_DLLPRG1_LCKWT_SET(val) (DFS_DLLPRG1_LCKWT_MASK & ((val) << DFS_DLLPRG1_LCKWT_OFFSET)) argument
120 #define DFS_DLLPRG1_DACIN_SET(val) (DFS_DLLPRG1_DACIN_MASK & ((val) << DFS_DLLPRG1_DACIN_OFFSET)) argument
124 #define DFS_DLLPRG1_CALBYPEN_SET(val) (DFS_DLLPRG1_CALBYPEN_MASK & ((val) << DFS_DLLPRG1_CALBYPEN_O… argument
128 #define DFS_DLLPRG1_VSETTLCTRL_SET(val) (DFS_DLLPRG1_VSETTLCTRL_MASK & ((val) << DFS_DLLPRG1_VSETTL… argument
132 #define DFS_DLLPRG1_CPICTRL_SET(val) (DFS_DLLPRG1_CPICTRL_MASK & ((val) << DFS_DLLPRG1_CPICTRL_OFFS… argument
[all …]

Completed in 90 milliseconds

12345678910>>...48