1 /*
2 * Copyright 2012-14 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #ifndef DC_LINK_H_
27 #define DC_LINK_H_
28
29 #include "dc.h"
30 #include "dc_types.h"
31 #include "grph_object_defs.h"
32
33 enum dc_link_fec_state {
34 dc_link_fec_not_ready,
35 dc_link_fec_ready,
36 dc_link_fec_enabled
37 };
38
39 struct dc_link_status {
40 bool link_active;
41 struct dpcd_caps *dpcd_caps;
42 };
43
44 /* DP MST stream allocation (payload bandwidth number) */
45 struct link_mst_stream_allocation {
46 /* DIG front */
47 const struct stream_encoder *stream_enc;
48 #if defined(CONFIG_DRM_AMD_DC_DCN)
49 /* HPO DP Stream Encoder */
50 const struct hpo_dp_stream_encoder *hpo_dp_stream_enc;
51 #endif
52 /* associate DRM payload table with DC stream encoder */
53 uint8_t vcp_id;
54 /* number of slots required for the DP stream in transport packet */
55 uint8_t slot_count;
56 };
57
58 /* DP MST stream allocation table */
59 struct link_mst_stream_allocation_table {
60 /* number of DP video streams */
61 int stream_count;
62 /* array of stream allocations */
63 struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
64 };
65
66 struct time_stamp {
67 uint64_t edp_poweroff;
68 uint64_t edp_poweron;
69 };
70
71 struct link_trace {
72 struct time_stamp time_stamp;
73 };
74
75 /* PSR feature flags */
76 struct psr_settings {
77 bool psr_feature_enabled; // PSR is supported by sink
78 bool psr_allow_active; // PSR is currently active
79 enum dc_psr_version psr_version; // Internal PSR version, determined based on DPCD
80
81 /* These parameters are calculated in Driver,
82 * based on display timing and Sink capabilities.
83 * If VBLANK region is too small and Sink takes a long time
84 * to set up RFB, it may take an extra frame to enter PSR state.
85 */
86 bool psr_frame_capture_indication_req;
87 unsigned int psr_sdp_transmit_line_num_deadline;
88 unsigned int psr_power_opt;
89 };
90
91 /*
92 * A link contains one or more sinks and their connected status.
93 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
94 */
95 struct dc_link {
96 struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
97 unsigned int sink_count;
98 struct dc_sink *local_sink;
99 unsigned int link_index;
100 enum dc_connection_type type;
101 enum signal_type connector_signal;
102 enum dc_irq_source irq_source_hpd;
103 enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */
104 bool is_hpd_filter_disabled;
105 bool dp_ss_off;
106 bool link_state_valid;
107 bool aux_access_disabled;
108 bool sync_lt_in_progress;
109 enum lttpr_mode lttpr_mode;
110 bool is_internal_display;
111
112 /* TODO: Rename. Flag an endpoint as having a programmable mapping to a
113 * DIG encoder. */
114 bool is_dig_mapping_flexible;
115 bool hpd_status; /* HPD status of link without physical HPD pin. */
116
117 bool edp_sink_present;
118
119 /* caps is the same as reported_link_cap. link_traing use
120 * reported_link_cap. Will clean up. TODO
121 */
122 struct dc_link_settings reported_link_cap;
123 struct dc_link_settings verified_link_cap;
124 struct dc_link_settings cur_link_settings;
125 struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
126 struct dc_link_settings preferred_link_setting;
127 /* preferred_training_settings are override values that
128 * come from DM. DM is responsible for the memory
129 * management of the override pointers.
130 */
131 struct dc_link_training_overrides preferred_training_settings;
132 struct dp_audio_test_data audio_test_data;
133
134 uint8_t ddc_hw_inst;
135
136 uint8_t hpd_src;
137
138 uint8_t link_enc_hw_inst;
139 /* DIG link encoder ID. Used as index in link encoder resource pool.
140 * For links with fixed mapping to DIG, this is not changed after dc_link
141 * object creation.
142 */
143 enum engine_id eng_id;
144
145 bool test_pattern_enabled;
146 union compliance_test_state compliance_test_state;
147
148 void *priv;
149
150 struct ddc_service *ddc;
151
152 bool aux_mode;
153
154 /* Private to DC core */
155
156 const struct dc *dc;
157
158 struct dc_context *ctx;
159
160 struct panel_cntl *panel_cntl;
161 struct link_encoder *link_enc;
162 #if defined(CONFIG_DRM_AMD_DC_DCN)
163 struct hpo_dp_link_encoder *hpo_dp_link_enc;
164 #endif
165 struct graphics_object_id link_id;
166 /* Endpoint type distinguishes display endpoints which do not have entries
167 * in the BIOS connector table from those that do. Helps when tracking link
168 * encoder to display endpoint assignments.
169 */
170 enum display_endpoint_type ep_type;
171 union ddi_channel_mapping ddi_channel_mapping;
172 struct connector_device_tag_info device_tag;
173 struct dpcd_caps dpcd_caps;
174 uint32_t dongle_max_pix_clk;
175 unsigned short chip_caps;
176 unsigned int dpcd_sink_count;
177 #if defined(CONFIG_DRM_AMD_DC_HDCP)
178 struct hdcp_caps hdcp_caps;
179 #endif
180 enum edp_revision edp_revision;
181 union dpcd_sink_ext_caps dpcd_sink_ext_caps;
182
183 struct psr_settings psr_settings;
184
185 /* Drive settings read from integrated info table */
186 struct dc_lane_settings bios_forced_drive_settings;
187
188 /* MST record stream using this link */
189 struct link_flags {
190 bool dp_keep_receiver_powered;
191 bool dp_skip_DID2;
192 bool dp_skip_reset_segment;
193 bool dp_mot_reset_segment;
194 /* Some USB4 docks do not handle turning off MST DSC once it has been enabled. */
195 bool dpia_mst_dsc_always_on;
196 } wa_flags;
197 struct link_mst_stream_allocation_table mst_stream_alloc_table;
198
199 struct dc_link_status link_status;
200
201 struct link_trace link_trace;
202 struct gpio *hpd_gpio;
203 enum dc_link_fec_state fec_state;
204 };
205
206 const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);
207
208 /**
209 * dc_get_link_at_index() - Return an enumerated dc_link.
210 *
211 * dc_link order is constant and determined at
212 * boot time. They cannot be created or destroyed.
213 * Use dc_get_caps() to get number of links.
214 */
dc_get_link_at_index(struct dc * dc,uint32_t link_index)215 static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
216 {
217 return dc->links[link_index];
218 }
219
get_edp_links(const struct dc * dc,struct dc_link ** edp_links,int * edp_num)220 static inline void get_edp_links(const struct dc *dc,
221 struct dc_link **edp_links,
222 int *edp_num)
223 {
224 int i;
225
226 *edp_num = 0;
227 for (i = 0; i < dc->link_count; i++) {
228 // report any eDP links, even unconnected DDI's
229 if (!dc->links[i])
230 continue;
231 if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP) {
232 edp_links[*edp_num] = dc->links[i];
233 if (++(*edp_num) == MAX_NUM_EDP)
234 return;
235 }
236 }
237 }
238
dc_get_edp_link_panel_inst(const struct dc * dc,const struct dc_link * link,unsigned int * inst_out)239 static inline bool dc_get_edp_link_panel_inst(const struct dc *dc,
240 const struct dc_link *link,
241 unsigned int *inst_out)
242 {
243 struct dc_link *edp_links[MAX_NUM_EDP];
244 int edp_num;
245
246 if (link->connector_signal != SIGNAL_TYPE_EDP)
247 return false;
248 get_edp_links(dc, edp_links, &edp_num);
249 if ((edp_num > 1) && (link->link_index > edp_links[0]->link_index))
250 *inst_out = 1;
251 else
252 *inst_out = 0;
253 return true;
254 }
255
256 /* Set backlight level of an embedded panel (eDP, LVDS).
257 * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
258 * and 16 bit fractional, where 1.0 is max backlight value.
259 */
260 bool dc_link_set_backlight_level(const struct dc_link *dc_link,
261 uint32_t backlight_pwm_u16_16,
262 uint32_t frame_ramp);
263
264 /* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
265 bool dc_link_set_backlight_level_nits(struct dc_link *link,
266 bool isHDR,
267 uint32_t backlight_millinits,
268 uint32_t transition_time_in_ms);
269
270 bool dc_link_get_backlight_level_nits(struct dc_link *link,
271 uint32_t *backlight_millinits,
272 uint32_t *backlight_millinits_peak);
273
274 bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
275
276 bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
277 bool dc_link_set_default_brightness_aux(struct dc_link *link);
278
279 int dc_link_get_backlight_level(const struct dc_link *dc_link);
280
281 int dc_link_get_target_backlight_pwm(const struct dc_link *link);
282
283 bool dc_link_set_psr_allow_active(struct dc_link *dc_link, const bool *enable,
284 bool wait, bool force_static, const unsigned int *power_opts);
285
286 bool dc_link_get_psr_state(const struct dc_link *dc_link, enum dc_psr_state *state);
287
288 bool dc_link_setup_psr(struct dc_link *dc_link,
289 const struct dc_stream_state *stream, struct psr_config *psr_config,
290 struct psr_context *psr_context);
291
292 void dc_link_get_psr_residency(const struct dc_link *link, uint32_t *residency);
293
294 /* Request DC to detect if there is a Panel connected.
295 * boot - If this call is during initial boot.
296 * Return false for any type of detection failure or MST detection
297 * true otherwise. True meaning further action is required (status update
298 * and OS notification).
299 */
300 enum dc_detect_reason {
301 DETECT_REASON_BOOT,
302 DETECT_REASON_HPD,
303 DETECT_REASON_HPDRX,
304 DETECT_REASON_FALLBACK,
305 DETECT_REASON_RETRAIN
306 };
307
308 bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
309 bool dc_link_get_hpd_state(struct dc_link *dc_link);
310 enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
311 #if defined(CONFIG_DRM_AMD_DC_DCN)
312 enum dc_status dc_link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
313 enum dc_status dc_link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
314 #endif
315
316 /* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
317 * Return:
318 * true - Downstream port status changed. DM should call DC to do the
319 * detection.
320 * false - no change in Downstream port status. No further action required
321 * from DM. */
322 bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
323 union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss,
324 bool defer_handling, bool *has_left_work);
325
326 /*
327 * On eDP links this function call will stall until T12 has elapsed.
328 * If the panel is not in power off state, this function will return
329 * immediately.
330 */
331 bool dc_link_wait_for_t12(struct dc_link *link);
332
333 void dc_link_dp_handle_automated_test(struct dc_link *link);
334 void dc_link_dp_handle_link_loss(struct dc_link *link);
335 bool dc_link_dp_allow_hpd_rx_irq(const struct dc_link *link);
336
337 struct dc_sink_init_data;
338
339 struct dc_sink *dc_link_add_remote_sink(
340 struct dc_link *dc_link,
341 const uint8_t *edid,
342 int len,
343 struct dc_sink_init_data *init_data);
344
345 void dc_link_remove_remote_sink(
346 struct dc_link *link,
347 struct dc_sink *sink);
348
349 /* Used by diagnostics for virtual link at the moment */
350
351 void dc_link_dp_set_drive_settings(
352 struct dc_link *link,
353 struct link_training_settings *lt_settings);
354
355 bool dc_link_dp_perform_link_training_skip_aux(
356 struct dc_link *link,
357 const struct dc_link_settings *link_setting);
358
359 enum link_training_result dc_link_dp_perform_link_training(
360 struct dc_link *link,
361 const struct dc_link_settings *link_settings,
362 bool skip_video_pattern);
363
364 bool dc_link_dp_sync_lt_begin(struct dc_link *link);
365
366 enum link_training_result dc_link_dp_sync_lt_attempt(
367 struct dc_link *link,
368 struct dc_link_settings *link_setting,
369 struct dc_link_training_overrides *lt_settings);
370
371 bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
372
373 void dc_link_dp_enable_hpd(const struct dc_link *link);
374
375 void dc_link_dp_disable_hpd(const struct dc_link *link);
376
377 bool dc_link_dp_set_test_pattern(
378 struct dc_link *link,
379 enum dp_test_pattern test_pattern,
380 enum dp_test_pattern_color_space test_pattern_color_space,
381 const struct link_training_settings *p_link_settings,
382 const unsigned char *p_custom_pattern,
383 unsigned int cust_pattern_size);
384
385 bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct dc_link_settings *max_link_enc_cap);
386
387 void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
388
389 bool dc_link_is_dp_sink_present(struct dc_link *link);
390
391 bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
392 /*
393 * DPCD access interfaces
394 */
395
396 #ifdef CONFIG_DRM_AMD_DC_HDCP
397 bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
398 bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
399 #endif
400 void dc_link_set_drive_settings(struct dc *dc,
401 struct link_training_settings *lt_settings,
402 const struct dc_link *link);
403 void dc_link_set_preferred_link_settings(struct dc *dc,
404 struct dc_link_settings *link_setting,
405 struct dc_link *link);
406 void dc_link_set_preferred_training_settings(struct dc *dc,
407 struct dc_link_settings *link_setting,
408 struct dc_link_training_overrides *lt_overrides,
409 struct dc_link *link,
410 bool skip_immediate_retrain);
411 void dc_link_enable_hpd(const struct dc_link *link);
412 void dc_link_disable_hpd(const struct dc_link *link);
413 void dc_link_set_test_pattern(struct dc_link *link,
414 enum dp_test_pattern test_pattern,
415 enum dp_test_pattern_color_space test_pattern_color_space,
416 const struct link_training_settings *p_link_settings,
417 const unsigned char *p_custom_pattern,
418 unsigned int cust_pattern_size);
419 uint32_t dc_link_bandwidth_kbps(
420 const struct dc_link *link,
421 const struct dc_link_settings *link_setting);
422
423 const struct dc_link_settings *dc_link_get_link_cap(
424 const struct dc_link *link);
425
426 void dc_link_overwrite_extended_receiver_cap(
427 struct dc_link *link);
428
429 bool dc_submit_i2c(
430 struct dc *dc,
431 uint32_t link_index,
432 struct i2c_command *cmd);
433
434 bool dc_submit_i2c_oem(
435 struct dc *dc,
436 struct i2c_command *cmd);
437
438 uint32_t dc_bandwidth_in_kbps_from_timing(
439 const struct dc_crtc_timing *timing);
440
441 bool dc_link_is_fec_supported(const struct dc_link *link);
442 bool dc_link_should_enable_fec(const struct dc_link *link);
443
444 #if defined(CONFIG_DRM_AMD_DC_DCN)
445 enum dp_link_encoding dc_link_dp_mst_decide_link_encoding_format(const struct dc_link *link);
446 #endif
447 #endif /* DC_LINK_H_ */
448