1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #include <plat_marvell.h>
9 
10 
11 /* MMU entry for internal (register) space access */
12 #define MAP_DEVICE0	MAP_REGION_FLAT(DEVICE0_BASE,			\
13 					DEVICE0_SIZE,			\
14 					MT_DEVICE | MT_RW | MT_SECURE)
15 
16 /*
17  * Table of regions for various BL stages to map using the MMU.
18  */
19 #if IMAGE_BL1
20 const mmap_region_t plat_marvell_mmap[] = {
21 	MARVELL_MAP_SECURE_RAM,
22 	MAP_DEVICE0,
23 	{0}
24 };
25 #endif
26 #if IMAGE_BL2
27 const mmap_region_t plat_marvell_mmap[] = {
28 	MARVELL_MAP_SECURE_RAM,
29 	MAP_DEVICE0,
30 	MARVELL_MAP_DRAM,
31 #ifdef SPD_opteed
32 	MARVELL_MAP_OPTEE_CORE_MEM,
33 	MARVELL_OPTEE_PAGEABLE_LOAD_MEM,
34 #endif
35 	{0}
36 };
37 #endif
38 
39 #if IMAGE_BL2U
40 const mmap_region_t plat_marvell_mmap[] = {
41 	MARVELL_MAP_SECURE_RAM,
42 	MAP_DEVICE0,
43 	{0}
44 };
45 #endif
46 
47 #if IMAGE_BLE
48 const mmap_region_t plat_marvell_mmap[] = {
49 	MAP_DEVICE0,
50 	{0}
51 };
52 #endif
53 
54 #if IMAGE_BL31
55 const mmap_region_t plat_marvell_mmap[] = {
56 	MARVELL_MAP_SECURE_RAM,
57 	MAP_DEVICE0,
58 	MARVELL_MAP_DRAM,
59 	{0}
60 };
61 #endif
62 #if IMAGE_BL32
63 const mmap_region_t plat_marvell_mmap[] = {
64 	MARVELL_MAP_SECURE_RAM,
65 	MAP_DEVICE0,
66 	{0}
67 };
68 #endif
69 
70 MARVELL_CASSERT_MMAP;
71