1 #ifndef _XEN_VPCI_H_
2 #define _XEN_VPCI_H_
3 
4 #ifdef CONFIG_HAS_VPCI
5 
6 #include <xen/pci.h>
7 #include <xen/types.h>
8 #include <xen/list.h>
9 
10 typedef uint32_t vpci_read_t(const struct pci_dev *pdev, unsigned int reg,
11                              void *data);
12 
13 typedef void vpci_write_t(const struct pci_dev *pdev, unsigned int reg,
14                           uint32_t val, void *data);
15 
16 typedef int vpci_register_init_t(struct pci_dev *dev);
17 
18 #define VPCI_PRIORITY_HIGH      "1"
19 #define VPCI_PRIORITY_MIDDLE    "5"
20 #define VPCI_PRIORITY_LOW       "9"
21 
22 #define REGISTER_VPCI_INIT(x, p)                \
23   static vpci_register_init_t *const x##_entry  \
24                __used_section(".data.vpci." p) = x
25 
26 /* Add vPCI handlers to device. */
27 int __must_check vpci_add_handlers(struct pci_dev *dev);
28 
29 /* Remove all handlers and free vpci related structures. */
30 void vpci_remove_device(struct pci_dev *pdev);
31 
32 /* Add/remove a register handler. */
33 int __must_check vpci_add_register(struct vpci *vpci,
34                                    vpci_read_t *read_handler,
35                                    vpci_write_t *write_handler,
36                                    unsigned int offset, unsigned int size,
37                                    void *data);
38 int __must_check vpci_remove_register(struct vpci *vpci, unsigned int offset,
39                                       unsigned int size);
40 
41 /* Generic read/write handlers for the PCI config space. */
42 uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int size);
43 void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
44                 uint32_t data);
45 
46 /* Passthrough handlers. */
47 uint32_t vpci_hw_read16(const struct pci_dev *pdev, unsigned int reg,
48                         void *data);
49 uint32_t vpci_hw_read32(const struct pci_dev *pdev, unsigned int reg,
50                         void *data);
51 
52 /*
53  * Check for pending vPCI operations on this vcpu. Returns true if the vcpu
54  * should not run.
55  */
56 bool __must_check vpci_process_pending(struct vcpu *v);
57 
58 struct vpci {
59     /* List of vPCI handlers for a device. */
60     struct list_head handlers;
61     spinlock_t lock;
62 
63 #ifdef __XEN__
64     /* Hide the rest of the vpci struct from the user-space test harness. */
65     struct vpci_header {
66         /* Information about the PCI BARs of this device. */
67         struct vpci_bar {
68             uint64_t addr;
69             uint64_t size;
70             enum {
71                 VPCI_BAR_EMPTY,
72                 VPCI_BAR_IO,
73                 VPCI_BAR_MEM32,
74                 VPCI_BAR_MEM64_LO,
75                 VPCI_BAR_MEM64_HI,
76                 VPCI_BAR_ROM,
77             } type;
78             bool prefetchable : 1;
79             /* Store whether the BAR is mapped into guest p2m. */
80             bool enabled      : 1;
81 #define PCI_HEADER_NORMAL_NR_BARS        6
82 #define PCI_HEADER_BRIDGE_NR_BARS        2
83         } bars[PCI_HEADER_NORMAL_NR_BARS + 1];
84         /* At most 6 BARS + 1 expansion ROM BAR. */
85 
86         /*
87          * Store whether the ROM enable bit is set (doesn't imply ROM BAR
88          * is mapped into guest p2m) if there's a ROM BAR on the device.
89          */
90         bool rom_enabled      : 1;
91         /* FIXME: currently there's no support for SR-IOV. */
92     } header;
93 
94     /* MSI data. */
95     struct vpci_msi {
96       /* Address. */
97         uint64_t address;
98         /* Mask bitfield. */
99         uint32_t mask;
100         /* Data. */
101         uint16_t data;
102         /* Number of vectors configured. */
103         uint8_t vectors     : 6;
104         /* Supports per-vector masking? */
105         bool masking        : 1;
106         /* 64-bit address capable? */
107         bool address64      : 1;
108         /* Enabled? */
109         bool enabled        : 1;
110         /* Arch-specific data. */
111         struct vpci_arch_msi arch;
112     } *msi;
113 
114     /* MSI-X data. */
115     struct vpci_msix {
116         struct pci_dev *pdev;
117         /* List link. */
118         struct list_head next;
119         /* Table information. */
120 #define VPCI_MSIX_TABLE     0
121 #define VPCI_MSIX_PBA       1
122 #define VPCI_MSIX_MEM_NUM   2
123         uint32_t tables[VPCI_MSIX_MEM_NUM];
124         /* Maximum number of vectors supported by the device. */
125         uint16_t max_entries : 12;
126         /* MSI-X enabled? */
127         bool enabled         : 1;
128         /* Masked? */
129         bool masked          : 1;
130         /* Entries. */
131         struct vpci_msix_entry {
132             uint64_t addr;
133             uint32_t data;
134             bool masked  : 1;
135             bool updated : 1;
136             struct vpci_arch_msix_entry arch;
137         } entries[];
138     } *msix;
139 #endif
140 };
141 
142 struct vpci_vcpu {
143     /* Per-vcpu structure to store state while {un}mapping of PCI BARs. */
144     struct rangeset *mem;
145     struct pci_dev *pdev;
146     uint16_t cmd;
147     bool rom_only : 1;
148 };
149 
150 #ifdef __XEN__
151 void vpci_dump_msi(void);
152 
153 /* Make sure there's a hole in the p2m for the MSIX mmio areas. */
154 int vpci_make_msix_hole(const struct pci_dev *pdev);
155 
156 /* Arch-specific vPCI MSI helpers. */
157 void vpci_msi_arch_mask(struct vpci_msi *msi, const struct pci_dev *pdev,
158                         unsigned int entry, bool mask);
159 int __must_check vpci_msi_arch_enable(struct vpci_msi *msi,
160                                       const struct pci_dev *pdev,
161                                       unsigned int vectors);
162 void vpci_msi_arch_disable(struct vpci_msi *msi, const struct pci_dev *pdev);
163 int __must_check vpci_msi_arch_update(struct vpci_msi *msi,
164                                       const struct pci_dev *pdev);
165 void vpci_msi_arch_init(struct vpci_msi *msi);
166 void vpci_msi_arch_print(const struct vpci_msi *msi);
167 
168 /* Arch-specific vPCI MSI-X helpers. */
169 void vpci_msix_arch_mask_entry(struct vpci_msix_entry *entry,
170                                const struct pci_dev *pdev, bool mask);
171 int __must_check vpci_msix_arch_enable_entry(struct vpci_msix_entry *entry,
172                                              const struct pci_dev *pdev,
173                                              paddr_t table_base);
174 int __must_check vpci_msix_arch_disable_entry(struct vpci_msix_entry *entry,
175                                               const struct pci_dev *pdev);
176 void vpci_msix_arch_init_entry(struct vpci_msix_entry *entry);
177 int vpci_msix_arch_print(const struct vpci_msix *msix);
178 
179 /*
180  * Helper functions to fetch MSIX related data. They are used by both the
181  * emulated MSIX code and the BAR handlers.
182  */
vmsix_table_base(const struct vpci * vpci,unsigned int nr)183 static inline paddr_t vmsix_table_base(const struct vpci *vpci, unsigned int nr)
184 {
185     return vpci->header.bars[vpci->msix->tables[nr] & PCI_MSIX_BIRMASK].addr;
186 }
187 
vmsix_table_addr(const struct vpci * vpci,unsigned int nr)188 static inline paddr_t vmsix_table_addr(const struct vpci *vpci, unsigned int nr)
189 {
190     return vmsix_table_base(vpci, nr) +
191            (vpci->msix->tables[nr] & ~PCI_MSIX_BIRMASK);
192 }
193 
194 /*
195  * Note regarding the size calculation of the PBA: the spec mentions "The last
196  * QWORD will not necessarily be fully populated", so it implies that the PBA
197  * size is 64-bit aligned.
198  */
vmsix_table_size(const struct vpci * vpci,unsigned int nr)199 static inline size_t vmsix_table_size(const struct vpci *vpci, unsigned int nr)
200 {
201     return
202         (nr == VPCI_MSIX_TABLE) ? vpci->msix->max_entries * PCI_MSIX_ENTRY_SIZE
203                                 : ROUNDUP(DIV_ROUND_UP(vpci->msix->max_entries,
204                                                        8), 8);
205 }
206 
vmsix_entry_nr(const struct vpci_msix * msix,const struct vpci_msix_entry * entry)207 static inline unsigned int vmsix_entry_nr(const struct vpci_msix *msix,
208                                           const struct vpci_msix_entry *entry)
209 {
210     return entry - msix->entries;
211 }
212 #endif /* __XEN__ */
213 
214 #else /* !CONFIG_HAS_VPCI */
215 struct vpci_vcpu {};
216 
vpci_add_handlers(struct pci_dev * pdev)217 static inline int vpci_add_handlers(struct pci_dev *pdev)
218 {
219     return 0;
220 }
221 
vpci_dump_msi(void)222 static inline void vpci_dump_msi(void) { }
223 
vpci_read(pci_sbdf_t sbdf,unsigned int reg,unsigned int size)224 static inline uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg,
225                                  unsigned int size)
226 {
227     ASSERT_UNREACHABLE();
228     return ~(uint32_t)0;
229 }
230 
vpci_write(pci_sbdf_t sbdf,unsigned int reg,unsigned int size,uint32_t data)231 static inline void vpci_write(pci_sbdf_t sbdf, unsigned int reg,
232                               unsigned int size, uint32_t data)
233 {
234     ASSERT_UNREACHABLE();
235 }
236 
vpci_process_pending(struct vcpu * v)237 static inline bool vpci_process_pending(struct vcpu *v)
238 {
239     ASSERT_UNREACHABLE();
240     return false;
241 }
242 #endif
243 
244 #endif
245 
246 /*
247  * Local variables:
248  * mode: C
249  * c-file-style: "BSD"
250  * c-basic-offset: 4
251  * tab-width: 4
252  * indent-tabs-mode: nil
253  * End:
254  */
255