1====================
2S3C24XX NAND Support
3====================
4
5Introduction
6------------
7
8Small Page NAND
9---------------
10
11The driver uses a 512 byte (1 page) ECC code for this setup. The
12ECC code is not directly compatible with the default kernel ECC
13code, so the driver enforces its own OOB layout and ECC parameters
14
15Large Page NAND
16---------------
17
18The driver is capable of handling NAND flash with a 2KiB page
19size, with support for hardware ECC generation and correction.
20
21Unlike the 512byte page mode, the driver generates ECC data for
22each 256 byte block in an 2KiB page. This means that more than
23one error in a page can be rectified. It also means that the
24OOB layout remains the default kernel layout for these flashes.
25
26
27Document Author
28---------------
29
30Ben Dooks, Copyright 2007 Simtec Electronics
31