1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 4 * 5 * Common PRUSS data for TI AM57xx platforms 6 */ 7 8&ocp { 9 pruss1_tm: target-module@4b226000 { 10 compatible = "ti,sysc-pruss", "ti,sysc"; 11 reg = <0x4b226000 0x4>, 12 <0x4b226004 0x4>; 13 reg-names = "rev", "sysc"; 14 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | 15 SYSC_PRUSS_SUB_MWAIT)>; 16 ti,sysc-midle = <SYSC_IDLE_FORCE>, 17 <SYSC_IDLE_NO>, 18 <SYSC_IDLE_SMART>; 19 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 20 <SYSC_IDLE_NO>, 21 <SYSC_IDLE_SMART>; 22 /* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */ 23 clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS1_CLKCTRL 0>; 24 clock-names = "fck"; 25 #address-cells = <1>; 26 #size-cells = <1>; 27 ranges = <0x00000000 0x4b200000 0x80000>; 28 29 pruss1: pruss@0 { 30 compatible = "ti,am5728-pruss"; 31 reg = <0x0 0x80000>; 32 #address-cells = <1>; 33 #size-cells = <1>; 34 ranges; 35 36 pruss1_mem: memories@0 { 37 reg = <0x0 0x2000>, 38 <0x2000 0x2000>, 39 <0x10000 0x8000>; 40 reg-names = "dram0", "dram1", 41 "shrdram2"; 42 }; 43 44 pruss1_cfg: cfg@26000 { 45 compatible = "ti,pruss-cfg", "syscon"; 46 reg = <0x26000 0x2000>; 47 #address-cells = <1>; 48 #size-cells = <1>; 49 ranges = <0x0 0x26000 0x2000>; 50 51 clocks { 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 pruss1_iepclk_mux: iepclk-mux@30 { 56 reg = <0x30>; 57 #clock-cells = <0>; 58 clocks = <&dpll_gmac_m3x2_ck>, /* icss_iep_clk */ 59 <&dpll_gmac_h13x2_ck>; /* icss_clk */ 60 }; 61 }; 62 }; 63 64 pruss1_mii_rt: mii-rt@32000 { 65 compatible = "ti,pruss-mii", "syscon"; 66 reg = <0x32000 0x58>; 67 }; 68 69 pruss1_intc: interrupt-controller@20000 { 70 compatible = "ti,pruss-intc"; 71 reg = <0x20000 0x2000>; 72 interrupt-controller; 73 #interrupt-cells = <3>; 74 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 75 <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 76 <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 77 <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 78 <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 79 <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 80 <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 81 <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 82 interrupt-names = "host_intr0", "host_intr1", 83 "host_intr2", "host_intr3", 84 "host_intr4", "host_intr5", 85 "host_intr6", "host_intr7"; 86 }; 87 88 pru1_0: pru@34000 { 89 compatible = "ti,am5728-pru"; 90 reg = <0x34000 0x3000>, 91 <0x22000 0x400>, 92 <0x22400 0x100>; 93 reg-names = "iram", "control", "debug"; 94 firmware-name = "am57xx-pru1_0-fw"; 95 }; 96 97 pru1_1: pru@38000 { 98 compatible = "ti,am5728-pru"; 99 reg = <0x38000 0x3000>, 100 <0x24000 0x400>, 101 <0x24400 0x100>; 102 reg-names = "iram", "control", "debug"; 103 firmware-name = "am57xx-pru1_1-fw"; 104 }; 105 106 pruss1_mdio: mdio@32400 { 107 compatible = "ti,davinci_mdio"; 108 #address-cells = <1>; 109 #size-cells = <0>; 110 clocks = <&dpll_gmac_h13x2_ck>; 111 clock-names = "fck"; 112 bus_freq = <1000000>; 113 reg = <0x32400 0x90>; 114 }; 115 }; 116 }; 117 118 pruss2_tm: target-module@4b2a6000 { 119 compatible = "ti,sysc-pruss", "ti,sysc"; 120 reg = <0x4b2a6000 0x4>, 121 <0x4b2a6004 0x4>; 122 reg-names = "rev", "sysc"; 123 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT | 124 SYSC_PRUSS_SUB_MWAIT)>; 125 ti,sysc-midle = <SYSC_IDLE_FORCE>, 126 <SYSC_IDLE_NO>, 127 <SYSC_IDLE_SMART>; 128 ti,sysc-sidle = <SYSC_IDLE_FORCE>, 129 <SYSC_IDLE_NO>, 130 <SYSC_IDLE_SMART>; 131 /* Domains (P, C): coreaon_pwrdm, l4per2_clkdm */ 132 clocks = <&l4per2_clkctrl DRA7_L4PER2_PRUSS2_CLKCTRL 0>; 133 clock-names = "fck"; 134 #address-cells = <1>; 135 #size-cells = <1>; 136 ranges = <0x00000000 0x4b280000 0x80000>; 137 138 pruss2: pruss@0 { 139 compatible = "ti,am5728-pruss"; 140 reg = <0x0 0x80000>; 141 #address-cells = <1>; 142 #size-cells = <1>; 143 ranges; 144 145 pruss2_mem: memories@0 { 146 reg = <0x0 0x2000>, 147 <0x2000 0x2000>, 148 <0x10000 0x8000>; 149 reg-names = "dram0", "dram1", 150 "shrdram2"; 151 }; 152 153 pruss2_cfg: cfg@26000 { 154 compatible = "ti,pruss-cfg", "syscon"; 155 reg = <0x26000 0x2000>; 156 #address-cells = <1>; 157 #size-cells = <1>; 158 ranges = <0x0 0x26000 0x2000>; 159 160 clocks { 161 #address-cells = <1>; 162 #size-cells = <0>; 163 164 pruss2_iepclk_mux: iepclk-mux@30 { 165 reg = <0x30>; 166 #clock-cells = <0>; 167 clocks = <&dpll_gmac_m3x2_ck>, /* icss_iep_clk */ 168 <&dpll_gmac_h13x2_ck>; /* icss_clk */ 169 }; 170 }; 171 }; 172 173 pruss2_mii_rt: mii-rt@32000 { 174 compatible = "ti,pruss-mii", "syscon"; 175 reg = <0x32000 0x58>; 176 }; 177 178 pruss2_intc: interrupt-controller@20000 { 179 compatible = "ti,pruss-intc"; 180 reg = <0x20000 0x2000>; 181 interrupt-controller; 182 #interrupt-cells = <3>; 183 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 184 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 185 <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 186 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 187 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 188 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 189 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 190 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>; 191 interrupt-names = "host_intr0", "host_intr1", 192 "host_intr2", "host_intr3", 193 "host_intr4", "host_intr5", 194 "host_intr6", "host_intr7"; 195 }; 196 197 pru2_0: pru@34000 { 198 compatible = "ti,am5728-pru"; 199 reg = <0x34000 0x3000>, 200 <0x22000 0x400>, 201 <0x22400 0x100>; 202 reg-names = "iram", "control", "debug"; 203 firmware-name = "am57xx-pru2_0-fw"; 204 }; 205 206 pru2_1: pru@38000 { 207 compatible = "ti,am5728-pru"; 208 reg = <0x38000 0x3000>, 209 <0x24000 0x400>, 210 <0x24400 0x100>; 211 reg-names = "iram", "control", "debug"; 212 firmware-name = "am57xx-pru2_1-fw"; 213 }; 214 215 pruss2_mdio: mdio@32400 { 216 compatible = "ti,davinci_mdio"; 217 #address-cells = <1>; 218 #size-cells = <0>; 219 clocks = <&dpll_gmac_h13x2_ck>; 220 clock-names = "fck"; 221 bus_freq = <1000000>; 222 reg = <0x32400 0x90>; 223 }; 224 }; 225 }; 226}; 227