1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 Synopsys, Inc. All rights reserved.
4 */
5/dts-v1/;
6
7#include "skeleton.dtsi"
8
9/ {
10	model = "snps,emsdp";
11
12	#address-cells = <1>;
13	#size-cells = <1>;
14
15	aliases {
16		console = &uart0;
17	};
18
19	cpu_card {
20		core_clk: core_clk {
21			#clock-cells = <0>;
22			compatible = "fixed-clock";
23			clock-frequency = <40000000>;
24			u-boot,dm-pre-reloc;
25		};
26	};
27
28	uart0: serial0@f0004000 {
29		compatible = "snps,dw-apb-uart";
30		clock-frequency = <100000000>;
31		reg = <0xf0004000 0x1000>;
32		reg-shift = <2>;
33		reg-io-width = <4>;
34	};
35
36	mmcclk_biu: mmcclk-biu {
37		compatible = "fixed-clock";
38		clock-frequency = <50000000>;
39		#clock-cells = <0>;
40	};
41
42	mmcclk_ciu: mmcclk-ciu {
43		compatible = "fixed-clock";
44		clock-frequency = <100000000>;
45		#clock-cells = <0>;
46	};
47
48	mmc: mmc0@f0010000 {
49		compatible = "snps,dw-mshc";
50		reg = <0xf0010000 0x400>;
51		bus-width = <4>;
52		fifo-depth = <256>;
53		clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
54		clock-names = "biu", "ciu";
55		max-frequency = <25000000>;
56	};
57
58};
59