1// SPDX-License-Identifier: GPL-2.0+ or X11
2/*
3 * Device Tree file for CZ.NIC Turris Mox Board
4 * 2018 by Marek Behun <marek.behun@nic.cz>
5 *
6 * Based on armada-3720-espressobin.dts by:
7 *   Gregory CLEMENT <gregory.clement@free-electrons.com>
8 *   Konstantin Porotchkin <kostap@marvell.com>
9 */
10
11/dts-v1/;
12
13#include <dt-bindings/gpio/gpio.h>
14#include "armada-372x.dtsi"
15
16/ {
17	model = "CZ.NIC Turris Mox Board";
18	compatible = "cznic,turris-mox", "marvell,armada3720",
19		     "marvell,armada3710";
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24
25	aliases {
26		ethernet0 = &eth0;
27		ethernet1 = &eth1;
28		i2c0 = &i2c0;
29		spi0 = &spi0;
30	};
31
32	memory {
33		device_type = "memory";
34		reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
35	};
36
37	reg_usb3_vbus: usb3_vbus@0 {
38		compatible = "regulator-fixed";
39		regulator-name = "usb3-vbus";
40		regulator-min-microvolt = <5000000>;
41		regulator-max-microvolt = <5000000>;
42		startup-delay-us = <2000000>;
43		shutdown-delay-us = <1000000>;
44		gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>;
45		enable-active-high;
46		regulator-boot-on;
47	};
48
49	vsdc_reg: vsdc-reg {
50		compatible = "regulator-gpio";
51		regulator-name = "vsdc";
52		regulator-min-microvolt = <1800000>;
53		regulator-max-microvolt = <3300000>;
54		regulator-boot-on;
55
56		gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
57		gpios-states = <0>;
58		states = <1800000 0x1
59			  3300000 0x0>;
60		enable-active-high;
61	};
62
63	mdio {
64		#address-cells = <1>;
65		#size-cells = <0>;
66
67		eth_phy1: ethernet-phy@1 {
68			reg = <1>;
69		};
70	};
71};
72
73&comphy {
74	max-lanes = <3>;
75	phy0 {
76		phy-type = <PHY_TYPE_SGMII1>;
77		phy-speed = <PHY_SPEED_3_125G>;
78	};
79
80	phy1 {
81		phy-type = <PHY_TYPE_PEX0>;
82		phy-speed = <PHY_SPEED_5G>;
83	};
84
85	phy2 {
86		phy-type = <PHY_TYPE_USB3_HOST0>;
87		phy-speed = <PHY_SPEED_5G>;
88	};
89};
90
91&eth0 {
92	status = "okay";
93	pinctrl-names = "default";
94	pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
95	phy-mode = "rgmii";
96	phy = <&eth_phy1>;
97};
98
99&i2c0 {
100	pinctrl-names = "default";
101	pinctrl-0 = <&i2c1_pins>;
102	status = "okay";
103	#address-cells = <1>;
104	#size-cells = <0>;
105
106	rtc@6f {
107		compatible = "microchip,mcp7941x";
108		reg = <0x6f>;
109	};
110};
111
112&sdhci1 {
113	wp-inverted;
114	bus-width = <4>;
115	cd-gpios = <&gpionb 10 GPIO_ACTIVE_HIGH>;
116	vqmmc-supply = <&vsdc_reg>;
117	marvell,pad-type = "sd";
118	status = "okay";
119};
120
121&pinctrl_nb {
122	spi_cs1_pins: spi-cs1-pins {
123		groups = "spi_cs1";
124		function = "spi";
125	};
126};
127
128&spi0 {
129	status = "okay";
130	pinctrl-names = "default";
131	pinctrl-0 = <&spi_cs1_pins>;
132	assigned-clocks = <&nb_periph_clk 7>;
133	assigned-clock-parents = <&tbg 1>;
134	assigned-clock-rates = <20000000>;
135
136	spi-flash@0 {
137		#address-cells = <1>;
138		#size-cells = <1>;
139		compatible = "st,s25fl064l", "jedec,spi-nor";
140		reg = <0>;
141		spi-max-frequency = <20000000>;
142		m25p,fast-read;
143	};
144
145	moxtet@1 {
146		#address-cells = <1>;
147		#size-cells = <0>;
148		compatible = "cznic,moxtet";
149		reg = <1>;
150		reset-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
151		spi-max-frequency = <1000000>;
152		spi-cpol;
153		spi-cpha;
154	};
155};
156
157&uart0 {
158	pinctrl-names = "default";
159	pinctrl-0 = <&uart1_pins>;
160	status = "okay";
161};
162
163&usb2 {
164	status = "okay";
165};
166
167&usb3 {
168	vbus-supply = <&reg_usb3_vbus>;
169	status = "okay";
170};
171
172&pcie0 {
173	pinctrl-names = "default";
174	pinctrl-0 = <&pcie_pins>;
175	reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
176	status = "disabled";
177};
178