1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2 /*
3  * (C) Copyright 2019 Amarula Solutions.
4  * Author: Jagan Teki <jagan@amarulasolutions.com>
5  */
6 
7 #ifndef _ROCKCHIP_CLOCK_H
8 #define _ROCKCHIP_CLOCK_H
9 
10 #ifndef __ASSEMBLY__
11 #include <linux/bitops.h>
12 #endif
13 
14 #if defined(CONFIG_ROCKCHIP_RK3288)
15 # include <asm/arch-rockchip/cru_rk3288.h>
16 #elif defined(CONFIG_ROCKCHIP_RK3399)
17 # include <asm/arch-rockchip/cru_rk3399.h>
18 #endif
19 
20 /* CRU_GLB_RST_ST */
21 enum {
22 	GLB_POR_RST,
23 	FST_GLB_RST_ST		= BIT(0),
24 	SND_GLB_RST_ST		= BIT(1),
25 	FST_GLB_TSADC_RST_ST	= BIT(2),
26 	SND_GLB_TSADC_RST_ST	= BIT(3),
27 	FST_GLB_WDT_RST_ST	= BIT(4),
28 	SND_GLB_WDT_RST_ST	= BIT(5),
29 };
30 
31 #define MHz		1000000
32 
33 char *get_reset_cause(void);
34 
35 #endif /* _ROCKCHIP_CLOCK_H */
36