1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2015 Google, Inc 4 */ 5 6 #ifndef __CONFIG_RK3288_COMMON_H 7 #define __CONFIG_RK3288_COMMON_H 8 9 #include <asm/arch-rockchip/hardware.h> 10 #include "rockchip-common.h" 11 12 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64MB */ 13 14 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 15 #define CONFIG_SYS_CBSIZE 1024 16 17 #define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020 18 #define COUNTER_FREQUENCY 24000000 19 #define CONFIG_SYS_ARCH_TIMER 20 #define CONFIG_SYS_HZ_CLOCK 24000000 21 22 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM 23 /* Bootrom will load u-boot binary to 0x0 once return from SPL */ 24 #endif 25 #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 26 #define CONFIG_SYS_LOAD_ADDR 0x00800800 27 #define CONFIG_SPL_STACK 0xff718000 28 29 #define CONFIG_IRAM_BASE 0xff700000 30 31 /* RAW SD card / eMMC locations. */ 32 33 /* FAT sd card locations. */ 34 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 35 36 #define CONFIG_SYS_SDRAM_BASE 0 37 #define SDRAM_BANK_SIZE (2UL << 30) 38 #define SDRAM_MAX_SIZE 0xfe000000 39 40 #define CONFIG_SYS_MONITOR_LEN (600 * 1024) 41 42 #ifndef CONFIG_SPL_BUILD 43 44 #define ENV_MEM_LAYOUT_SETTINGS \ 45 "scriptaddr=0x00000000\0" \ 46 "pxefile_addr_r=0x00100000\0" \ 47 "fdt_addr_r=0x01f00000\0" \ 48 "kernel_addr_r=0x02000000\0" \ 49 "ramdisk_addr_r=0x04000000\0" 50 51 #include <config_distro_bootcmd.h> 52 53 /* Linux fails to load the fdt if it's loaded above 256M on a Rock 2 board, so 54 * limit the fdt reallocation to that */ 55 #define CONFIG_EXTRA_ENV_SETTINGS \ 56 "fdt_high=0x0fffffff\0" \ 57 "initrd_high=0x0fffffff\0" \ 58 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ 59 "partitions=" PARTS_DEFAULT \ 60 ENV_MEM_LAYOUT_SETTINGS \ 61 ROCKCHIP_DEVICE_SETTINGS \ 62 BOOTENV 63 #endif 64 65 #endif 66