1 /*
2  * Copyright (C) 2021 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #include <plat_marvell.h>
9 
10 #define DEVICE_BASE		0xF0000000
11 #define DDR_PHY_OFFSET		0x1000000
12 #define DDR_PHY_BASE_ADDR	(DEVICE_BASE + DDR_PHY_OFFSET)
13 
14 int mvebu_ddr_phy_write(uintptr_t offset, uint16_t data);
15 int mvebu_ddr_phy_read(uintptr_t offset, uint16_t *read);
16