1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _DPU_HW_LM_H
7 #define _DPU_HW_LM_H
8 
9 #include "dpu_hw_mdss.h"
10 #include "dpu_hw_util.h"
11 #include "dpu_hw_blk.h"
12 
13 struct dpu_hw_mixer;
14 
15 struct dpu_hw_mixer_cfg {
16 	u32 out_width;
17 	u32 out_height;
18 	bool right_mixer;
19 	int flags;
20 };
21 
22 struct dpu_hw_color3_cfg {
23 	u8 keep_fg[DPU_STAGE_MAX];
24 };
25 
26 /**
27  *
28  * struct dpu_hw_lm_ops : Interface to the mixer Hw driver functions
29  *  Assumption is these functions will be called after clocks are enabled
30  */
31 struct dpu_hw_lm_ops {
32 	/*
33 	 * Sets up mixer output width and height
34 	 * and border color if enabled
35 	 */
36 	void (*setup_mixer_out)(struct dpu_hw_mixer *ctx,
37 		struct dpu_hw_mixer_cfg *cfg);
38 
39 	/*
40 	 * Alpha blending configuration
41 	 * for the specified stage
42 	 */
43 	void (*setup_blend_config)(struct dpu_hw_mixer *ctx, uint32_t stage,
44 		uint32_t fg_alpha, uint32_t bg_alpha, uint32_t blend_op);
45 
46 	/*
47 	 * Alpha color component selection from either fg or bg
48 	 */
49 	void (*setup_alpha_out)(struct dpu_hw_mixer *ctx, uint32_t mixer_op);
50 
51 	/**
52 	 * setup_border_color : enable/disable border color
53 	 */
54 	void (*setup_border_color)(struct dpu_hw_mixer *ctx,
55 		struct dpu_mdss_color *color,
56 		u8 border_en);
57 
58 	/**
59 	 * setup_misr: Enable/disable MISR
60 	 */
61 	void (*setup_misr)(struct dpu_hw_mixer *ctx, bool enable, u32 frame_count);
62 
63 	/**
64 	 * collect_misr: Read MISR signature
65 	 */
66 	int (*collect_misr)(struct dpu_hw_mixer *ctx, u32 *misr_value);
67 };
68 
69 struct dpu_hw_mixer {
70 	struct dpu_hw_blk base;
71 	struct dpu_hw_blk_reg_map hw;
72 
73 	/* lm */
74 	enum dpu_lm  idx;
75 	const struct dpu_lm_cfg   *cap;
76 	const struct dpu_mdp_cfg  *mdp;
77 	const struct dpu_ctl_cfg  *ctl;
78 
79 	/* ops */
80 	struct dpu_hw_lm_ops ops;
81 
82 	/* store mixer info specific to display */
83 	struct dpu_hw_mixer_cfg cfg;
84 };
85 
86 /**
87  * to_dpu_hw_mixer - convert base object dpu_hw_base to container
88  * @hw: Pointer to base hardware block
89  * return: Pointer to hardware block container
90  */
to_dpu_hw_mixer(struct dpu_hw_blk * hw)91 static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw)
92 {
93 	return container_of(hw, struct dpu_hw_mixer, base);
94 }
95 
96 /**
97  * dpu_hw_lm_init(): Initializes the mixer hw driver object.
98  * should be called once before accessing every mixer.
99  * @idx:  mixer index for which driver object is required
100  * @addr: mapped register io address of MDP
101  * @m :   pointer to mdss catalog data
102  */
103 struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
104 		void __iomem *addr,
105 		const struct dpu_mdss_cfg *m);
106 
107 /**
108  * dpu_hw_lm_destroy(): Destroys layer mixer driver context
109  * @lm:   Pointer to LM driver context
110  */
111 void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm);
112 
113 #endif /*_DPU_HW_LM_H */
114