1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2016 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Copyright (C) 2014 Endless Mobile
6 *
7 * Written by:
8 * Jasper St. Pierre <jstpierre@mecheye.net>
9 */
10
11 #include <linux/component.h>
12 #include <linux/module.h>
13 #include <linux/of_graph.h>
14 #include <linux/sys_soc.h>
15 #include <linux/platform_device.h>
16 #include <linux/soc/amlogic/meson-canvas.h>
17
18 #include <drm/drm_aperture.h>
19 #include <drm/drm_atomic_helper.h>
20 #include <drm/drm_drv.h>
21 #include <drm/drm_fb_helper.h>
22 #include <drm/drm_gem_cma_helper.h>
23 #include <drm/drm_gem_framebuffer_helper.h>
24 #include <drm/drm_modeset_helper_vtables.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_vblank.h>
27
28 #include "meson_crtc.h"
29 #include "meson_drv.h"
30 #include "meson_overlay.h"
31 #include "meson_plane.h"
32 #include "meson_osd_afbcd.h"
33 #include "meson_registers.h"
34 #include "meson_venc_cvbs.h"
35 #include "meson_viu.h"
36 #include "meson_vpp.h"
37 #include "meson_rdma.h"
38
39 #define DRIVER_NAME "meson"
40 #define DRIVER_DESC "Amlogic Meson DRM driver"
41
42 /**
43 * DOC: Video Processing Unit
44 *
45 * VPU Handles the Global Video Processing, it includes management of the
46 * clocks gates, blocks reset lines and power domains.
47 *
48 * What is missing :
49 *
50 * - Full reset of entire video processing HW blocks
51 * - Scaling and setup of the VPU clock
52 * - Bus clock gates
53 * - Powering up video processing HW blocks
54 * - Powering Up HDMI controller and PHY
55 */
56
57 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
58 .atomic_check = drm_atomic_helper_check,
59 .atomic_commit = drm_atomic_helper_commit,
60 .fb_create = drm_gem_fb_create,
61 };
62
63 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
64 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
65 };
66
meson_irq(int irq,void * arg)67 static irqreturn_t meson_irq(int irq, void *arg)
68 {
69 struct drm_device *dev = arg;
70 struct meson_drm *priv = dev->dev_private;
71
72 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
73
74 meson_crtc_irq(priv);
75
76 return IRQ_HANDLED;
77 }
78
meson_dumb_create(struct drm_file * file,struct drm_device * dev,struct drm_mode_create_dumb * args)79 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
80 struct drm_mode_create_dumb *args)
81 {
82 /*
83 * We need 64bytes aligned stride, and PAGE aligned size
84 */
85 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
86 args->size = PAGE_ALIGN(args->pitch * args->height);
87
88 return drm_gem_cma_dumb_create_internal(file, dev, args);
89 }
90
91 DEFINE_DRM_GEM_CMA_FOPS(fops);
92
93 static const struct drm_driver meson_driver = {
94 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
95
96 /* CMA Ops */
97 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
98
99 /* Misc */
100 .fops = &fops,
101 .name = DRIVER_NAME,
102 .desc = DRIVER_DESC,
103 .date = "20161109",
104 .major = 1,
105 .minor = 0,
106 };
107
meson_vpu_has_available_connectors(struct device * dev)108 static bool meson_vpu_has_available_connectors(struct device *dev)
109 {
110 struct device_node *ep, *remote;
111
112 /* Parses each endpoint and check if remote exists */
113 for_each_endpoint_of_node(dev->of_node, ep) {
114 /* If the endpoint node exists, consider it enabled */
115 remote = of_graph_get_remote_port(ep);
116 if (remote)
117 return true;
118 }
119
120 return false;
121 }
122
123 static struct regmap_config meson_regmap_config = {
124 .reg_bits = 32,
125 .val_bits = 32,
126 .reg_stride = 4,
127 .max_register = 0x1000,
128 };
129
meson_vpu_init(struct meson_drm * priv)130 static void meson_vpu_init(struct meson_drm *priv)
131 {
132 u32 value;
133
134 /*
135 * Slave dc0 and dc5 connected to master port 1.
136 * By default other slaves are connected to master port 0.
137 */
138 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
139 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
140 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
141
142 /* Slave dc0 connected to master port 1 */
143 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
144 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
145
146 /* Slave dc4 and dc7 connected to master port 1 */
147 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
148 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
149 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
150
151 /* Slave dc1 connected to master port 1 */
152 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
153 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
154 }
155
156 struct meson_drm_soc_attr {
157 struct meson_drm_soc_limits limits;
158 const struct soc_device_attribute *attrs;
159 };
160
161 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
162 /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
163 {
164 .limits = {
165 .max_hdmi_phy_freq = 1650000,
166 },
167 .attrs = (const struct soc_device_attribute []) {
168 { .soc_id = "GXL (S805*)", },
169 { /* sentinel */ },
170 }
171 },
172 };
173
meson_drv_bind_master(struct device * dev,bool has_components)174 static int meson_drv_bind_master(struct device *dev, bool has_components)
175 {
176 struct platform_device *pdev = to_platform_device(dev);
177 const struct meson_drm_match_data *match;
178 struct meson_drm *priv;
179 struct drm_device *drm;
180 struct resource *res;
181 void __iomem *regs;
182 int ret, i;
183
184 /* Checks if an output connector is available */
185 if (!meson_vpu_has_available_connectors(dev)) {
186 dev_err(dev, "No output connector available\n");
187 return -ENODEV;
188 }
189
190 match = of_device_get_match_data(dev);
191 if (!match)
192 return -ENODEV;
193
194 drm = drm_dev_alloc(&meson_driver, dev);
195 if (IS_ERR(drm))
196 return PTR_ERR(drm);
197
198 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
199 if (!priv) {
200 ret = -ENOMEM;
201 goto free_drm;
202 }
203 drm->dev_private = priv;
204 priv->drm = drm;
205 priv->dev = dev;
206 priv->compat = match->compat;
207 priv->afbcd.ops = match->afbcd_ops;
208
209 regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
210 if (IS_ERR(regs)) {
211 ret = PTR_ERR(regs);
212 goto free_drm;
213 }
214
215 priv->io_base = regs;
216
217 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
218 if (!res) {
219 ret = -EINVAL;
220 goto free_drm;
221 }
222 /* Simply ioremap since it may be a shared register zone */
223 regs = devm_ioremap(dev, res->start, resource_size(res));
224 if (!regs) {
225 ret = -EADDRNOTAVAIL;
226 goto free_drm;
227 }
228
229 priv->hhi = devm_regmap_init_mmio(dev, regs,
230 &meson_regmap_config);
231 if (IS_ERR(priv->hhi)) {
232 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
233 ret = PTR_ERR(priv->hhi);
234 goto free_drm;
235 }
236
237 priv->canvas = meson_canvas_get(dev);
238 if (IS_ERR(priv->canvas)) {
239 ret = PTR_ERR(priv->canvas);
240 goto free_drm;
241 }
242
243 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
244 if (ret)
245 goto free_drm;
246 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
247 if (ret) {
248 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
249 goto free_drm;
250 }
251 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
252 if (ret) {
253 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
254 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
255 goto free_drm;
256 }
257 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
258 if (ret) {
259 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
260 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
261 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
262 goto free_drm;
263 }
264
265 priv->vsync_irq = platform_get_irq(pdev, 0);
266
267 ret = drm_vblank_init(drm, 1);
268 if (ret)
269 goto free_drm;
270
271 /* Assign limits per soc revision/package */
272 for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
273 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
274 priv->limits = &meson_drm_soc_attrs[i].limits;
275 break;
276 }
277 }
278
279 /*
280 * Remove early framebuffers (ie. simplefb). The framebuffer can be
281 * located anywhere in RAM
282 */
283 ret = drm_aperture_remove_framebuffers(false, &meson_driver);
284 if (ret)
285 goto free_drm;
286
287 ret = drmm_mode_config_init(drm);
288 if (ret)
289 goto free_drm;
290 drm->mode_config.max_width = 3840;
291 drm->mode_config.max_height = 2160;
292 drm->mode_config.funcs = &meson_mode_config_funcs;
293 drm->mode_config.helper_private = &meson_mode_config_helpers;
294
295 /* Hardware Initialization */
296
297 meson_vpu_init(priv);
298 meson_venc_init(priv);
299 meson_vpp_init(priv);
300 meson_viu_init(priv);
301 if (priv->afbcd.ops) {
302 ret = priv->afbcd.ops->init(priv);
303 if (ret)
304 return ret;
305 }
306
307 /* Encoder Initialization */
308
309 ret = meson_venc_cvbs_create(priv);
310 if (ret)
311 goto free_drm;
312
313 if (has_components) {
314 ret = component_bind_all(drm->dev, drm);
315 if (ret) {
316 dev_err(drm->dev, "Couldn't bind all components\n");
317 goto free_drm;
318 }
319 }
320
321 ret = meson_plane_create(priv);
322 if (ret)
323 goto free_drm;
324
325 ret = meson_overlay_create(priv);
326 if (ret)
327 goto free_drm;
328
329 ret = meson_crtc_create(priv);
330 if (ret)
331 goto free_drm;
332
333 ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
334 if (ret)
335 goto free_drm;
336
337 drm_mode_config_reset(drm);
338
339 drm_kms_helper_poll_init(drm);
340
341 platform_set_drvdata(pdev, priv);
342
343 ret = drm_dev_register(drm, 0);
344 if (ret)
345 goto uninstall_irq;
346
347 drm_fbdev_generic_setup(drm, 32);
348
349 return 0;
350
351 uninstall_irq:
352 free_irq(priv->vsync_irq, drm);
353 free_drm:
354 drm_dev_put(drm);
355
356 return ret;
357 }
358
meson_drv_bind(struct device * dev)359 static int meson_drv_bind(struct device *dev)
360 {
361 return meson_drv_bind_master(dev, true);
362 }
363
meson_drv_unbind(struct device * dev)364 static void meson_drv_unbind(struct device *dev)
365 {
366 struct meson_drm *priv = dev_get_drvdata(dev);
367 struct drm_device *drm = priv->drm;
368
369 if (priv->canvas) {
370 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
371 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
372 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
373 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
374 }
375
376 drm_dev_unregister(drm);
377 drm_kms_helper_poll_fini(drm);
378 drm_atomic_helper_shutdown(drm);
379 component_unbind_all(dev, drm);
380 free_irq(priv->vsync_irq, drm);
381 drm_dev_put(drm);
382
383 if (priv->afbcd.ops) {
384 priv->afbcd.ops->reset(priv);
385 meson_rdma_free(priv);
386 }
387 }
388
389 static const struct component_master_ops meson_drv_master_ops = {
390 .bind = meson_drv_bind,
391 .unbind = meson_drv_unbind,
392 };
393
meson_drv_pm_suspend(struct device * dev)394 static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
395 {
396 struct meson_drm *priv = dev_get_drvdata(dev);
397
398 if (!priv)
399 return 0;
400
401 return drm_mode_config_helper_suspend(priv->drm);
402 }
403
meson_drv_pm_resume(struct device * dev)404 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
405 {
406 struct meson_drm *priv = dev_get_drvdata(dev);
407
408 if (!priv)
409 return 0;
410
411 meson_vpu_init(priv);
412 meson_venc_init(priv);
413 meson_vpp_init(priv);
414 meson_viu_init(priv);
415 if (priv->afbcd.ops)
416 priv->afbcd.ops->init(priv);
417
418 return drm_mode_config_helper_resume(priv->drm);
419 }
420
compare_of(struct device * dev,void * data)421 static int compare_of(struct device *dev, void *data)
422 {
423 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
424 dev->of_node, data);
425
426 return dev->of_node == data;
427 }
428
429 /* Possible connectors nodes to ignore */
430 static const struct of_device_id connectors_match[] = {
431 { .compatible = "composite-video-connector" },
432 { .compatible = "svideo-connector" },
433 { .compatible = "hdmi-connector" },
434 { .compatible = "dvi-connector" },
435 {}
436 };
437
meson_probe_remote(struct platform_device * pdev,struct component_match ** match,struct device_node * parent,struct device_node * remote)438 static int meson_probe_remote(struct platform_device *pdev,
439 struct component_match **match,
440 struct device_node *parent,
441 struct device_node *remote)
442 {
443 struct device_node *ep, *remote_node;
444 int count = 1;
445
446 /* If node is a connector, return and do not add to match table */
447 if (of_match_node(connectors_match, remote))
448 return 1;
449
450 component_match_add(&pdev->dev, match, compare_of, remote);
451
452 for_each_endpoint_of_node(remote, ep) {
453 remote_node = of_graph_get_remote_port_parent(ep);
454 if (!remote_node ||
455 remote_node == parent || /* Ignore parent endpoint */
456 !of_device_is_available(remote_node)) {
457 of_node_put(remote_node);
458 continue;
459 }
460
461 count += meson_probe_remote(pdev, match, remote, remote_node);
462
463 of_node_put(remote_node);
464 }
465
466 return count;
467 }
468
meson_drv_shutdown(struct platform_device * pdev)469 static void meson_drv_shutdown(struct platform_device *pdev)
470 {
471 struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
472
473 if (!priv)
474 return;
475
476 drm_kms_helper_poll_fini(priv->drm);
477 drm_atomic_helper_shutdown(priv->drm);
478 }
479
meson_drv_probe(struct platform_device * pdev)480 static int meson_drv_probe(struct platform_device *pdev)
481 {
482 struct component_match *match = NULL;
483 struct device_node *np = pdev->dev.of_node;
484 struct device_node *ep, *remote;
485 int count = 0;
486
487 for_each_endpoint_of_node(np, ep) {
488 remote = of_graph_get_remote_port_parent(ep);
489 if (!remote || !of_device_is_available(remote)) {
490 of_node_put(remote);
491 continue;
492 }
493
494 count += meson_probe_remote(pdev, &match, np, remote);
495 of_node_put(remote);
496 }
497
498 if (count && !match)
499 return meson_drv_bind_master(&pdev->dev, false);
500
501 /* If some endpoints were found, initialize the nodes */
502 if (count) {
503 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
504
505 return component_master_add_with_match(&pdev->dev,
506 &meson_drv_master_ops,
507 match);
508 }
509
510 /* If no output endpoints were available, simply bail out */
511 return 0;
512 };
513
514 static struct meson_drm_match_data meson_drm_gxbb_data = {
515 .compat = VPU_COMPATIBLE_GXBB,
516 };
517
518 static struct meson_drm_match_data meson_drm_gxl_data = {
519 .compat = VPU_COMPATIBLE_GXL,
520 };
521
522 static struct meson_drm_match_data meson_drm_gxm_data = {
523 .compat = VPU_COMPATIBLE_GXM,
524 .afbcd_ops = &meson_afbcd_gxm_ops,
525 };
526
527 static struct meson_drm_match_data meson_drm_g12a_data = {
528 .compat = VPU_COMPATIBLE_G12A,
529 .afbcd_ops = &meson_afbcd_g12a_ops,
530 };
531
532 static const struct of_device_id dt_match[] = {
533 { .compatible = "amlogic,meson-gxbb-vpu",
534 .data = (void *)&meson_drm_gxbb_data },
535 { .compatible = "amlogic,meson-gxl-vpu",
536 .data = (void *)&meson_drm_gxl_data },
537 { .compatible = "amlogic,meson-gxm-vpu",
538 .data = (void *)&meson_drm_gxm_data },
539 { .compatible = "amlogic,meson-g12a-vpu",
540 .data = (void *)&meson_drm_g12a_data },
541 {}
542 };
543 MODULE_DEVICE_TABLE(of, dt_match);
544
545 static const struct dev_pm_ops meson_drv_pm_ops = {
546 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
547 };
548
549 static struct platform_driver meson_drm_platform_driver = {
550 .probe = meson_drv_probe,
551 .shutdown = meson_drv_shutdown,
552 .driver = {
553 .name = "meson-drm",
554 .of_match_table = dt_match,
555 .pm = &meson_drv_pm_ops,
556 },
557 };
558
559 module_platform_driver(meson_drm_platform_driver);
560
561 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
562 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
563 MODULE_DESCRIPTION(DRIVER_DESC);
564 MODULE_LICENSE("GPL");
565