1
2config BITBANGMII
3	bool "Bit-banged ethernet MII management channel support"
4
5config MV88E6352_SWITCH
6	bool "Marvell 88E6352 switch support"
7
8menuconfig PHYLIB
9	bool "Ethernet PHY (physical media interface) support"
10	depends on NET
11	help
12	  Enable Ethernet PHY (physical media interface) support.
13
14if PHYLIB
15
16config PHY_ADDR_ENABLE
17	bool "Limit phy address"
18	default y if ARCH_SUNXI
19	help
20	  Select this if you want to control which phy address is used
21
22if PHY_ADDR_ENABLE
23config PHY_ADDR
24	int "PHY address"
25	default 1 if ARCH_SUNXI
26	default 0
27	help
28	  The address of PHY on MII bus. Usually in range of 0 to 31.
29endif
30
31config B53_SWITCH
32	bool "Broadcom BCM53xx (RoboSwitch) Ethernet switch PHY support."
33	help
34	  Enable support for Broadcom BCM53xx (RoboSwitch) Ethernet switches.
35	  This currently supports BCM53125 and similar models.
36
37if B53_SWITCH
38
39config B53_CPU_PORT
40	int "CPU port"
41	default 8
42
43config B53_PHY_PORTS
44	hex "Bitmask of PHY ports"
45
46endif # B53_SWITCH
47
48config MV88E61XX_SWITCH
49	bool "Marvell MV88E61xx Ethernet switch PHY support."
50
51if MV88E61XX_SWITCH
52
53config MV88E61XX_CPU_PORT
54	int "CPU Port"
55
56config MV88E61XX_PHY_PORTS
57	hex "Bitmask of PHY Ports"
58
59config MV88E61XX_FIXED_PORTS
60	hex "Bitmask of PHYless serdes Ports"
61
62endif # MV88E61XX_SWITCH
63
64config PHYLIB_10G
65	bool "Generic 10G PHY support"
66
67menuconfig PHY_AQUANTIA
68	bool "Aquantia Ethernet PHYs support"
69	select PHY_GIGE
70	select PHYLIB_10G
71
72config PHY_AQUANTIA_UPLOAD_FW
73	bool "Aquantia firmware loading support"
74	default n
75	depends on PHY_AQUANTIA
76	help
77		Aquantia PHYs use firmware which can be either loaded automatically
78		from storage directly attached to the phy or loaded by the boot loader
79		via MDIO commands.  The firmware is loaded from a file, specified by
80		the PHY_AQUANTIA_FW_PART and PHY_AQUANTIA_FW_NAME options.
81
82config PHY_AQUANTIA_FW_PART
83	string "Aquantia firmware partition"
84	depends on PHY_AQUANTIA_UPLOAD_FW
85	help
86		Partition containing the firmware file.
87
88config PHY_AQUANTIA_FW_NAME
89	string "Aquantia firmware filename"
90	depends on PHY_AQUANTIA_UPLOAD_FW
91	help
92		Firmware filename.
93
94config PHY_ATHEROS
95	bool "Atheros Ethernet PHYs support"
96
97config PHY_BROADCOM
98	bool "Broadcom Ethernet PHYs support"
99
100config PHY_CORTINA
101	bool "Cortina Ethernet PHYs support"
102
103config SYS_CORTINA_NO_FW_UPLOAD
104	bool "Cortina firmware loading support"
105	default n
106	depends on PHY_CORTINA
107	help
108		Cortina phy has provision to store phy firmware in attached dedicated
109		EEPROM. And boards designed with such EEPROM does not require firmware
110		upload.
111
112choice
113	prompt "Location of the Cortina firmware"
114	default SYS_CORTINA_FW_IN_NOR
115	depends on PHY_CORTINA
116
117config SYS_CORTINA_FW_IN_MMC
118	bool "Cortina firmware in MMC"
119
120config SYS_CORTINA_FW_IN_NAND
121	bool "Cortina firmware in NAND flash"
122
123config SYS_CORTINA_FW_IN_NOR
124	bool "Cortina firmware in NOR flash"
125
126config SYS_CORTINA_FW_IN_REMOTE
127	bool "Cortina firmware in remote device"
128
129config SYS_CORTINA_FW_IN_SPIFLASH
130	bool "Cortina firmware in SPI flash"
131
132endchoice
133
134config PHY_CORTINA_ACCESS
135	bool "Cortina Access Ethernet PHYs support"
136	default y
137	depends on CORTINA_NI_ENET
138	help
139		Cortina Access Ethernet PHYs init process
140
141config PHY_DAVICOM
142	bool "Davicom Ethernet PHYs support"
143
144config PHY_ET1011C
145	bool "LSI TruePHY ET1011C support"
146
147config PHY_LXT
148	bool "LXT971 Ethernet PHY support"
149
150config PHY_MARVELL
151	bool "Marvell Ethernet PHYs support"
152
153config PHY_MESON_GXL
154	bool "Amlogic Meson GXL Internal PHY support"
155
156config PHY_MICREL
157	bool "Micrel Ethernet PHYs support"
158	help
159	  Enable support for the GbE PHYs manufactured by Micrel (now
160	  a part of Microchip). This includes drivers for the KSZ804, KSZ8031,
161	  KSZ8051, KSZ8081, KSZ8895, KSZ886x and KSZ8721 (if "Micrel KSZ8xxx
162	  family support" is selected) and the KSZ9021 and KSZ9031 (if "Micrel
163	  KSZ90x1 family support" is selected).
164
165if PHY_MICREL
166
167config PHY_MICREL_KSZ9021
168	bool
169	select PHY_MICREL_KSZ90X1
170
171config PHY_MICREL_KSZ9031
172	bool
173	select PHY_MICREL_KSZ90X1
174
175config PHY_MICREL_KSZ90X1
176	bool "Micrel KSZ90x1 family support"
177	select PHY_GIGE
178	help
179	  Enable support for the Micrel KSZ9021 and KSZ9031 GbE PHYs. If
180	  enabled, the extended register read/write for KSZ90x1 PHYs
181	  is supported through the 'mdio' command and any RGMII signal
182	  delays configured in the device tree will be applied to the
183	  PHY during initialization.
184
185config PHY_MICREL_KSZ8XXX
186	bool "Micrel KSZ8xxx family support"
187	help
188	  Enable support for the 8000 series 10/100 PHYs manufactured by Micrel
189	  (now a part of Microchip). This includes drivers for the KSZ804,
190	  KSZ8031, KSZ8051, KSZ8081, KSZ8895, KSZ886x, and KSZ8721.
191
192endif # PHY_MICREL
193
194config PHY_MSCC
195	bool "Microsemi Corp Ethernet PHYs support"
196
197config PHY_NATSEMI
198	bool "National Semiconductor Ethernet PHYs support"
199
200config PHY_REALTEK
201	bool "Realtek Ethernet PHYs support"
202
203config RTL8211E_PINE64_GIGABIT_FIX
204	bool "Fix gigabit throughput on some Pine64+ models"
205	depends on PHY_REALTEK
206	help
207	  Configure the Realtek RTL8211E found on some Pine64+ models differently to
208	  fix throughput on Gigabit links, turning off all internal delays in the
209	  process. The settings that this touches are not documented in the CONFREG
210	  section of the RTL8211E datasheet, but come from Realtek by way of the
211	  Pine64 engineering team.
212
213config RTL8211X_PHY_FORCE_MASTER
214	bool "Ethernet PHY RTL8211x: force 1000BASE-T master mode"
215	depends on PHY_REALTEK
216	help
217	  Force master mode for 1000BASE-T on RTl8211x PHYs (except for RTL8211F).
218	  This can work around link stability and data corruption issues on gigabit
219	  links which can occur in slave mode on certain PHYs, e.g. on the
220	  RTL8211C(L).
221
222	  Please note that two directly connected devices (i.e. via crossover cable)
223	  will not be able to establish a link between each other if they both force
224	  master mode. Multiple devices forcing master mode when connected by a
225	  network switch do not pose a problem as the switch configures its affected
226	  ports into slave mode.
227
228	  This option only affects gigabit links. If you must establish a direct
229	  connection between two devices which both force master mode, try forcing
230	  the link speed to 100MBit/s.
231
232	  If unsure, say N.
233
234config RTL8211F_PHY_FORCE_EEE_RXC_ON
235	bool "Ethernet PHY RTL8211F: do not stop receiving the xMII clock during LPI"
236	depends on PHY_REALTEK
237	default n
238	help
239	  The IEEE 802.3az-2010 (EEE) standard provides a protocol to coordinate
240	  transitions to/from a lower power consumption level (Low Power Idle
241	  mode) based on link utilization. When no packets are being
242	  transmitted, the system goes to Low Power Idle mode to save power.
243
244	  Under particular circumstances this setting can cause issues where
245	  the PHY is unable to transmit or receive any packet when in LPI mode.
246	  The problem is caused when the PHY is configured to stop receiving
247	  the xMII clock while it is signaling LPI. For some PHYs the bit
248	  configuring this behavior is set by the Linux kernel, causing the
249	  issue in U-Boot on reboot if the PHY retains the register value.
250
251	  Default n, which means that the PHY state is not changed. To work
252	  around the issues, change this setting to y.
253
254config RTL8201F_PHY_S700_RMII_TIMINGS
255	bool "Ethernet PHY RTL8201F: adjust RMII Tx Interface timings"
256	depends on PHY_REALTEK
257	help
258	  This provides an option to configure specific timing requirements (needed
259	  for proper PHY operations) for the PHY module present on ACTION SEMI S700
260	  based cubieboard7. Exact timing requiremnets seems to be SoC specific
261	  (and it's undocumented) that comes from vendor code itself.
262
263config PHY_SMSC
264	bool  "Microchip(SMSC) Ethernet PHYs support"
265
266config PHY_TERANETICS
267	bool "Teranetics Ethernet PHYs support"
268
269config PHY_TI
270	bool "Texas Instruments Ethernet PHYs support"
271	---help---
272	  Adds PHY registration support for TI PHYs.
273
274config PHY_TI_DP83867
275	select PHY_TI
276	bool "Texas Instruments Ethernet DP83867 PHY support"
277	---help---
278	  Adds support for the TI DP83867 1Gbit PHY.
279
280config PHY_TI_GENERIC
281	select PHY_TI
282	bool "Texas Instruments Generic Ethernet PHYs support"
283	---help---
284	  Adds support for Generic TI PHYs that don't need special handling but
285	  the PHY name is associated with a PHY ID.
286
287config PHY_VITESSE
288	bool "Vitesse Ethernet PHYs support"
289
290config PHY_XILINX
291	bool "Xilinx Ethernet PHYs support"
292
293config PHY_XILINX_GMII2RGMII
294	bool "Xilinx GMII to RGMII Ethernet PHYs support"
295	help
296	  This adds support for Xilinx GMII to RGMII IP core. This IP acts
297	  as bridge between MAC connected over GMII and external phy that
298	  is connected over RGMII interface.
299
300config PHY_FIXED
301	bool "Fixed-Link PHY"
302	depends on DM_ETH
303	help
304	  Fixed PHY is used for having a 'fixed-link' to another MAC with a direct
305	  connection (MII, RGMII, ...).
306	  There is nothing like autoneogation and so
307	  on, the link is always up with fixed speed and fixed duplex-setting.
308	  More information: doc/device-tree-bindings/net/fixed-link.txt
309
310config PHY_NCSI
311	bool "NC-SI based PHY"
312	depends on DM_ETH
313
314endif #PHYLIB
315