1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright 2020 Compass Electronics Group, LLC 4 */ 5 6/ { 7 leds { 8 compatible = "gpio-leds"; 9 10 led-0 { 11 label = "gen_led0"; 12 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>; 13 default-state = "off"; 14 }; 15 16 led-1 { 17 label = "gen_led1"; 18 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>; 19 default-state = "off"; 20 }; 21 22 led-2 { 23 label = "gen_led2"; 24 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>; 25 default-state = "off"; 26 }; 27 28 led-3 { 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pinctrl_led3>; 31 label = "heartbeat"; 32 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; 33 linux,default-trigger = "heartbeat"; 34 }; 35 }; 36 37 reg_usdhc2_vmmc: regulator-usdhc2 { 38 compatible = "regulator-fixed"; 39 regulator-name = "vsd_3v3"; 40 regulator-min-microvolt = <3300000>; 41 regulator-max-microvolt = <3300000>; 42 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 43 enable-active-high; 44 }; 45 46 reg_usb_otg_vbus: regulator-usb { 47 compatible = "regulator-fixed"; 48 pinctrl-names = "default"; 49 pinctrl-0 = <&pinctrl_reg_usb_otg>; 50 regulator-name = "usb_otg_vbus"; 51 regulator-min-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>; 53 gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>; 54 enable-active-high; 55 }; 56}; 57 58&ecspi2 { 59 pinctrl-names = "default"; 60 pinctrl-0 = <&pinctrl_espi2>; 61 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 62 status = "okay"; 63 64 eeprom@0 { 65 compatible = "microchip,at25160bn", "atmel,at25"; 66 reg = <0>; 67 spi-max-frequency = <5000000>; 68 spi-cpha; 69 spi-cpol; 70 pagesize = <32>; 71 size = <2048>; 72 address-width = <16>; 73 }; 74}; 75 76&i2c4 { 77 clock-frequency = <400000>; 78 pinctrl-names = "default"; 79 pinctrl-0 = <&pinctrl_i2c4>; 80 status = "okay"; 81 82 pca6416_0: gpio@20 { 83 compatible = "nxp,pcal6416"; 84 reg = <0x20>; 85 pinctrl-names = "default"; 86 pinctrl-0 = <&pinctrl_pcal6414>; 87 gpio-controller; 88 #gpio-cells = <2>; 89 interrupt-parent = <&gpio4>; 90 interrupts = <27 IRQ_TYPE_LEVEL_LOW>; 91 }; 92 93 pca6416_1: gpio@21 { 94 compatible = "nxp,pcal6416"; 95 reg = <0x21>; 96 gpio-controller; 97 #gpio-cells = <2>; 98 interrupt-parent = <&gpio4>; 99 interrupts = <27 IRQ_TYPE_LEVEL_LOW>; 100 }; 101}; 102 103&snvs_pwrkey { 104 status = "okay"; 105}; 106 107&uart2 { /* console */ 108 pinctrl-names = "default"; 109 pinctrl-0 = <&pinctrl_uart2>; 110 status = "okay"; 111}; 112 113&uart3 { 114 pinctrl-names = "default"; 115 pinctrl-0 = <&pinctrl_uart3>; 116 assigned-clocks = <&clk IMX8MN_CLK_UART3>; 117 assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; 118 status = "okay"; 119}; 120 121&usbotg1 { 122 vbus-supply = <®_usb_otg_vbus>; 123 disable-over-current; 124 dr_mode="otg"; 125 status = "okay"; 126}; 127 128&usdhc2 { 129 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 130 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 131 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 132 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 133 bus-width = <4>; 134 vmmc-supply = <®_usdhc2_vmmc>; 135 status = "okay"; 136}; 137 138&iomuxc { 139 pinctrl_espi2: espi2grp { 140 fsl,pins = < 141 MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 142 MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 143 MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 144 MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41 145 >; 146 }; 147 148 pinctrl_i2c2: i2c2grp { 149 fsl,pins = < 150 MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 151 MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 152 >; 153 }; 154 155 pinctrl_i2c4: i2c4grp { 156 fsl,pins = < 157 MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 158 MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 159 >; 160 }; 161 162 pinctrl_led3: led3grp { 163 fsl,pins = < 164 MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41 165 >; 166 }; 167 168 pinctrl_pcal6414: pcal6414-gpiogrp { 169 fsl,pins = < 170 MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19 171 >; 172 }; 173 174 pinctrl_reg_usb_otg: reg-otggrp { 175 fsl,pins = < 176 MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19 177 >; 178 }; 179 180 pinctrl_uart2: uart2grp { 181 fsl,pins = < 182 MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 183 MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 184 >; 185 }; 186 187 pinctrl_uart3: uart3grp { 188 fsl,pins = < 189 MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40 190 MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40 191 >; 192 }; 193 194 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 195 fsl,pins = < 196 MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41 197 MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 198 >; 199 }; 200 201 pinctrl_usdhc2: usdhc2grp { 202 fsl,pins = < 203 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 204 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 205 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 206 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 207 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 208 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 209 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 210 >; 211 }; 212 213 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 214 fsl,pins = < 215 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 216 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 217 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 218 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 219 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 220 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 221 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 222 >; 223 }; 224 225 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 226 fsl,pins = < 227 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 228 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 229 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 230 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 231 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 232 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 233 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 234 >; 235 }; 236}; 237