1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2013 Atmel Corporation. 4 * Josh Wu <josh.wu@atmel.com> 5 * 6 * Configuation settings for the AT91SAM9N12-EK boards. 7 */ 8 9 #ifndef __AT91SAM9N12_CONFIG_H_ 10 #define __AT91SAM9N12_CONFIG_H_ 11 12 /* ARM asynchronous clock */ 13 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 14 #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000 /* main clock xtal */ 15 16 /* Misc CPU related */ 17 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 18 #define CONFIG_SETUP_MEMORY_TAGS 19 #define CONFIG_INITRD_TAG 20 #define CONFIG_SKIP_LOWLEVEL_INIT 21 22 /* LCD */ 23 #define LCD_BPP LCD_COLOR16 24 #define LCD_OUTPUT_BPP 24 25 #define CONFIG_LCD_LOGO 26 #define CONFIG_LCD_INFO 27 #define CONFIG_LCD_INFO_BELOW_LOGO 28 #define CONFIG_ATMEL_LCD_RGB565 29 30 /* 31 * BOOTP options 32 */ 33 #define CONFIG_BOOTP_BOOTFILESIZE 34 35 #define CONFIG_SYS_SDRAM_BASE 0x20000000 36 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 37 38 /* 39 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 40 * leaving the correct space for initial global data structure above 41 * that address while providing maximum stack area below. 42 */ 43 # define CONFIG_SYS_INIT_SP_ADDR \ 44 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE) 45 46 /* DataFlash */ 47 48 /* NAND flash */ 49 #ifdef CONFIG_CMD_NAND 50 #define CONFIG_SYS_MAX_NAND_DEVICE 1 51 #define CONFIG_SYS_NAND_BASE 0x40000000 52 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 53 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 54 #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(4) 55 #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PD(5) 56 #endif 57 58 #define CONFIG_EXTRA_ENV_SETTINGS \ 59 "console=console=ttyS0,115200\0" \ 60 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ 61 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ 62 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" 63 64 /* Ethernet */ 65 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 66 67 /* USB host */ 68 #ifdef CONFIG_CMD_USB 69 #define CONFIG_USB_ATMEL 70 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 71 #define CONFIG_USB_OHCI_NEW 72 #define CONFIG_SYS_USB_OHCI_CPU_INIT 73 #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI 74 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12" 75 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 76 #endif 77 78 #ifdef CONFIG_SPI_BOOT 79 80 /* bootstrap + u-boot + env + linux in dataflash on CS0 */ 81 #define CONFIG_BOOTCOMMAND \ 82 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 83 "sf probe 0; sf read 0x22000000 0x100000 0x300000; " \ 84 "bootm 0x22000000" 85 86 #elif defined(CONFIG_NAND_BOOT) 87 88 /* bootstrap + u-boot + env + linux in nandflash */ 89 #define CONFIG_BOOTCOMMAND \ 90 "setenv bootargs ${console} ${mtdparts} ${bootargs_nand};" \ 91 "nand read 0x21000000 0x180000 0x080000;" \ 92 "nand read 0x22000000 0x200000 0x400000;" \ 93 "bootm 0x22000000 - 0x21000000" 94 95 #else /* CONFIG_SD_BOOT */ 96 97 #define CONFIG_BOOTCOMMAND \ 98 "setenv bootargs ${console} ${mtdparts} ${bootargs_mmc};" \ 99 "fatload mmc 0:1 0x21000000 dtb;" \ 100 "fatload mmc 0:1 0x22000000 uImage;" \ 101 "bootm 0x22000000 - 0x21000000" 102 103 #endif 104 105 /* 106 * Size of malloc() pool 107 */ 108 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 109 110 /* SPL */ 111 #define CONFIG_SPL_MAX_SIZE 0x6000 112 #define CONFIG_SPL_STACK 0x308000 113 114 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 115 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 116 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 117 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 118 119 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 120 121 #define CONFIG_SYS_MASTER_CLOCK 132096000 122 #define CONFIG_SYS_AT91_PLLA 0x20953f03 123 #define CONFIG_SYS_MCKR 0x1301 124 #define CONFIG_SYS_MCKR_CSS 0x1302 125 126 #ifdef CONFIG_SD_BOOT 127 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 128 #endif 129 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 130 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 131 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 132 #define CONFIG_SYS_NAND_PAGE_COUNT 64 133 #define CONFIG_SYS_NAND_OOBSIZE 64 134 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 135 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 136 137 #endif 138