1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2017-2019 A. Karas, SomLabs 4 * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the SoMlabs VisionSOM 6ULL board. 7 */ 8 #ifndef __SOMLABS_VISIONSOM_6ULL_H 9 #define __SOMLABS_VISIONSOM_6ULL_H 10 11 #include <asm/arch/imx-regs.h> 12 #include <linux/sizes.h> 13 #include "mx6_common.h" 14 #include <asm/mach-imx/gpio.h> 15 16 /* SPL options */ 17 #include "imx6_spl.h" 18 19 /* Size of malloc() pool */ 20 #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) 21 22 #define CONFIG_MXC_UART_BASE UART1_BASE 23 24 /* MMC Configs */ 25 #ifdef CONFIG_FSL_USDHC 26 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR 27 28 #define CONFIG_SYS_FSL_USDHC_NUM 1 29 #endif /* CONFIG_FSL_USDHC */ 30 31 #define CONFIG_EXTRA_ENV_SETTINGS \ 32 "bootm_size=0x10000000\0" \ 33 "console=ttymxc0\0" \ 34 "initrd_addr=0x86800000\0" \ 35 "fdt_addr=0x83000000\0" \ 36 "script=boot.scr\0" \ 37 "image=zImage\0" \ 38 "splashimage=0x80000000\0" \ 39 "splashfile=/boot/splash.bmp\0" \ 40 "mmcdev=1\0" \ 41 "mmcpart=1\0" \ 42 "mmcroot=/dev/mmcblk1p1 rootwait rw\0" \ 43 "setrootmmc=setenv rootspec root=${mmcroot}\0" \ 44 "setbootscriptmmc=setenv loadbootscript " \ 45 "load mmc ${mmcdev}:${mmcpart} " \ 46 "${loadaddr} /boot/${script};\0" \ 47 "setloadmmc=setenv loadimage load mmc ${mmcdev}:${mmcpart} " \ 48 "${loadaddr} /boot/${image}; " \ 49 "setenv loadfdt load mmc ${mmcdev}:${mmcpart} " \ 50 "${fdt_addr} /boot/${fdt_file};\0" \ 51 "setbootargs=setenv bootargs console=${console},${baudrate} " \ 52 "${rootspec}\0" \ 53 "execbootscript=echo Running bootscript...; source\0" \ 54 "setfdtfile=setenv fdt_file somlabs-visionsom-6ull.dtb\0" \ 55 "checkbootdev=run setbootscriptmmc; " \ 56 "run setrootmmc; " \ 57 "run setloadmmc; " \ 58 59 #define CONFIG_BOOTCOMMAND \ 60 "run setfdtfile; " \ 61 "run checkbootdev; " \ 62 "run loadfdt;" \ 63 "if run loadbootscript; then " \ 64 "run bootscript; " \ 65 "else " \ 66 "if run loadimage; then " \ 67 "run setbootargs; " \ 68 "bootz ${loadaddr} - ${fdt_addr}; " \ 69 "fi; " \ 70 "fi" 71 72 /* Miscellaneous configurable options */ 73 74 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 75 #define CONFIG_SYS_HZ 1000 76 77 /* Physical Memory Map */ 78 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 79 80 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 81 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 82 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 83 84 #define CONFIG_SYS_INIT_SP_OFFSET \ 85 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 86 #define CONFIG_SYS_INIT_SP_ADDR \ 87 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 88 89 /* environment organization */ 90 91 /* USB Configs */ 92 #ifdef CONFIG_CMD_USB 93 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 94 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 95 #define CONFIG_MXC_USB_FLAGS 0 96 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 97 #endif 98 99 #ifdef CONFIG_CMD_NET 100 #define CONFIG_FEC_MXC 101 #define IMX_FEC_BASE ENET_BASE_ADDR 102 #define CONFIG_FEC_MXC_PHYADDR 0x1 103 #define CONFIG_FEC_XCV_TYPE RMII 104 #define CONFIG_ETHPRIME "eth0" 105 #endif 106 107 #endif 108
