1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 4 */ 5 6#include <dt-bindings/clock/k210-sysctl.h> 7#include <dt-bindings/mfd/k210-sysctl.h> 8#include <dt-bindings/pinctrl/k210-pinctrl.h> 9#include <dt-bindings/reset/k210-sysctl.h> 10 11/ { 12 /* 13 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits 14 * wide, and the upper half of all addresses is ignored. 15 */ 16 #address-cells = <1>; 17 #size-cells = <1>; 18 compatible = "kendryte,k210"; 19 20 aliases { 21 cpu0 = &cpu0; 22 cpu1 = &cpu1; 23 dma0 = &dmac0; 24 gpio0 = &gpio0; 25 gpio1 = &gpio1_0; 26 i2c0 = &i2c0; 27 i2c1 = &i2c1; 28 i2c2 = &i2c2; 29 pinctrl0 = &fpioa; 30 serial0 = &uarths0; 31 serial1 = &uart1; 32 serial2 = &uart2; 33 serial3 = &uart3; 34 spi0 = &spi0; 35 spi1 = &spi1; 36 spi2 = &spi2; 37 spi3 = &spi3; 38 timer0 = &timer0; 39 timer1 = &timer1; 40 timer2 = &timer2; 41 }; 42 43 cpus { 44 #address-cells = <1>; 45 #size-cells = <0>; 46 timebase-frequency = <7800000>; 47 cpu0: cpu@0 { 48 device_type = "cpu"; 49 compatible = "kendryte,k210", "sifive,rocket0", "riscv"; 50 reg = <0>; 51 riscv,isa = "rv64imafdgc"; 52 mmu-type = "sv39"; 53 i-cache-block-size = <64>; 54 i-cache-size = <0x8000>; 55 d-cache-block-size = <64>; 56 d-cache-size = <0x8000>; 57 clocks = <&sysclk K210_CLK_CPU>; 58 cpu0_intc: interrupt-controller { 59 #interrupt-cells = <1>; 60 interrupt-controller; 61 compatible = "riscv,cpu-intc"; 62 }; 63 }; 64 cpu1: cpu@1 { 65 device_type = "cpu"; 66 compatible = "kendryte,k210", "sifive,rocket0", "riscv"; 67 reg = <1>; 68 riscv,isa = "rv64imafdgc"; 69 mmu-type = "sv39"; 70 i-cache-block-size = <64>; 71 i-cache-size = <0x8000>; 72 d-cache-block-size = <64>; 73 d-cache-size = <0x8000>; 74 clocks = <&sysclk K210_CLK_CPU>; 75 cpu1_intc: interrupt-controller { 76 #interrupt-cells = <1>; 77 interrupt-controller; 78 compatible = "riscv,cpu-intc"; 79 }; 80 }; 81 }; 82 83 sram: memory@80000000 { 84 device_type = "memory"; 85 compatible = "kendryte,k210-sram"; 86 reg = <0x80000000 0x400000>, 87 <0x80400000 0x200000>, 88 <0x80600000 0x200000>; 89 reg-names = "sram0", "sram1", "airam"; 90 clocks = <&sysclk K210_CLK_SRAM0>, 91 <&sysclk K210_CLK_SRAM1>, 92 <&sysclk K210_CLK_PLL1>; 93 clock-names = "sram0", "sram1", "airam"; 94 }; 95 96 reserved-memory { 97 #address-cells = <1>; 98 #size-cells = <1>; 99 ranges; 100 101 ai_reserved: ai@80600000 { 102 reg = <0x80600000 0x200000>; 103 reusable; 104 }; 105 }; 106 107 clocks { 108 in0: osc { 109 compatible = "fixed-clock"; 110 #clock-cells = <0>; 111 clock-frequency = <26000000>; 112 }; 113 }; 114 115 soc { 116 #address-cells = <1>; 117 #size-cells = <1>; 118 compatible = "kendryte,k210-soc", "simple-bus"; 119 ranges; 120 interrupt-parent = <&plic0>; 121 122 debug0: debug@0 { 123 compatible = "kendryte,k210-debug", "riscv,debug"; 124 reg = <0x0 0x1000>; 125 }; 126 127 rom0: nvmem@1000 { 128 reg = <0x1000 0x1000>; 129 read-only; 130 }; 131 132 clint0: clint@2000000 { 133 #interrupt-cells = <1>; 134 compatible = "kendryte,k210-clint", "riscv,clint0"; 135 reg = <0x2000000 0xC000>; 136 interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>, 137 <&cpu1_intc 3>, <&cpu1_intc 7>; 138 clocks = <&sysclk K210_CLK_CLINT>; 139 }; 140 141 plic0: interrupt-controller@C000000 { 142 #interrupt-cells = <1>; 143 compatible = "kendryte,k210-plic", "riscv,plic0"; 144 reg = <0xC000000 0x4000000>; 145 interrupt-controller; 146 interrupts-extended = <&cpu0_intc 9>, <&cpu0_intc 11>, 147 <&cpu1_intc 9>, <&cpu1_intc 11>; 148 riscv,ndev = <65>; 149 riscv,max-priority = <7>; 150 }; 151 152 uarths0: serial@38000000 { 153 compatible = "kendryte,k210-uarths", "sifive,uart0"; 154 reg = <0x38000000 0x1000>; 155 interrupts = <33>; 156 clocks = <&sysclk K210_CLK_CPU>; 157 status = "disabled"; 158 }; 159 160 gpio0: gpio-controller@38001000 { 161 #interrupt-cells = <2>; 162 #gpio-cells = <2>; 163 compatible = "kendryte,k210-gpiohs", "sifive,gpio0"; 164 reg = <0x38001000 0x1000>; 165 interrupt-controller; 166 interrupts = <34 35 36 37 38 39 40 41 167 42 43 44 45 46 47 48 49 168 50 51 52 53 54 55 56 57 169 58 59 60 61 62 63 64 65>; 170 gpio-controller; 171 ngpios = <32>; 172 status = "disabled"; 173 }; 174 175 kpu0: kpu@40800000 { 176 compatible = "kendryte,k210-kpu"; 177 reg = <0x40800000 0xc00000>; 178 interrupts = <25>; 179 clocks = <&sysclk K210_CLK_AI>; 180 memory-region = <&ai_reserved>; 181 status = "disabled"; 182 }; 183 184 fft0: fft@42000000 { 185 compatible = "kendryte,k210-fft"; 186 reg = <0x42000000 0x400000>; 187 interrupts = <26>; 188 clocks = <&sysclk K210_CLK_FFT>; 189 resets = <&sysrst K210_RST_FFT>; 190 status = "disabled"; 191 }; 192 193 dmac0: dma-controller@50000000 { 194 compatible = "kendryte,k210-dmac", "snps,axi-dma-1.01a"; 195 reg = <0x50000000 0x1000>; 196 interrupts = <27 28 29 30 31 32>; 197 clocks = <&sysclk K210_CLK_DMA>, <&sysclk K210_CLK_DMA>; 198 clock-names = "core-clk", "cfgr-clk"; 199 resets = <&sysrst K210_RST_DMA>; 200 dma-channels = <6>; 201 snps,dma-masters = <2>; 202 snps,data-width = <5>; 203 snps,block-size = <0x200000 0x200000 0x200000 204 0x200000 0x200000 0x200000>; 205 snps,axi-max-burst-len = <256>; 206 status = "disabled"; 207 }; 208 209 apb0: bus@50200000 { 210 #address-cells = <1>; 211 #size-cells = <1>; 212 compatible = "kendryte,k210-apb", "simple-pm-bus"; 213 ranges; 214 clocks = <&sysclk K210_CLK_APB0>; 215 216 gpio1: gpio-controller@50200000 { 217 #address-cells = <1>; 218 #size-cells = <0>; 219 compatible = "kendryte,k210-gpio", 220 "snps,dw-apb-gpio"; 221 reg = <0x50200000 0x80>; 222 clocks = <&sysclk K210_CLK_GPIO>; 223 resets = <&sysrst K210_RST_GPIO>; 224 status = "disabled"; 225 226 gpio1_0: gpio1@0 { 227 #gpio-cells = <2>; 228 #interrupt-cells = <2>; 229 compatible = "snps,dw-apb-gpio-port"; 230 reg = <0>; 231 interrupt-controller; 232 interrupts = <23>; 233 gpio-controller; 234 snps,nr-gpios = <8>; 235 }; 236 }; 237 238 uart1: serial@50210000 { 239 compatible = "kendryte,k210-uart", 240 "snps,dw-apb-uart"; 241 reg = <0x50210000 0x100>; 242 interrupts = <11>; 243 clocks = <&sysclk K210_CLK_UART1>; 244 resets = <&sysrst K210_RST_UART1>; 245 reg-io-width = <4>; 246 reg-shift = <2>; 247 dcd-override; 248 dsr-override; 249 cts-override; 250 ri-override; 251 status = "disabled"; 252 }; 253 254 uart2: serial@50220000 { 255 compatible = "kendryte,k210-uart", 256 "snps,dw-apb-uart"; 257 reg = <0x50220000 0x100>; 258 interrupts = <12>; 259 clocks = <&sysclk K210_CLK_UART2>; 260 resets = <&sysrst K210_RST_UART2>; 261 reg-io-width = <4>; 262 reg-shift = <2>; 263 dcd-override; 264 dsr-override; 265 cts-override; 266 ri-override; 267 status = "disabled"; 268 }; 269 270 uart3: serial@50230000 { 271 compatible = "kendryte,k210-uart", 272 "snps,dw-apb-uart"; 273 reg = <0x50230000 0x100>; 274 interrupts = <13>; 275 clocks = <&sysclk K210_CLK_UART3>; 276 resets = <&sysrst K210_RST_UART3>; 277 reg-io-width = <4>; 278 reg-shift = <2>; 279 dcd-override; 280 dsr-override; 281 cts-override; 282 ri-override; 283 status = "disabled"; 284 }; 285 286 spi2: spi@50240000 { 287 compatible = "canaan,kendryte-k210-spi", 288 "snps,dw-apb-ssi-4.01", 289 "snps,dw-apb-ssi"; 290 spi-slave; 291 reg = <0x50240000 0x100>; 292 interrupts = <2>; 293 clocks = <&sysclk K210_CLK_SPI2>; 294 resets = <&sysrst K210_RST_SPI2>; 295 spi-max-frequency = <25000000>; 296 status = "disabled"; 297 }; 298 299 i2s0: i2s@50250000 { 300 compatible = "kendryte,k210-i2s", 301 "snps,designware-i2s"; 302 reg = <0x50250000 0x200>; 303 interrupts = <5>; 304 clocks = <&sysclk K210_CLK_I2S0>; 305 clock-names = "i2sclk"; 306 resets = <&sysrst K210_RST_I2S0>; 307 status = "disabled"; 308 }; 309 310 apu0: sound@520250200 { 311 compatible = "kendryte,k210-apu"; 312 reg = <0x50250200 0x200>; 313 status = "disabled"; 314 }; 315 316 i2s1: i2s@50260000 { 317 compatible = "kendryte,k210-i2s", 318 "snps,designware-i2s"; 319 reg = <0x50260000 0x200>; 320 interrupts = <6>; 321 clocks = <&sysclk K210_CLK_I2S1>; 322 clock-names = "i2sclk"; 323 resets = <&sysrst K210_RST_I2S1>; 324 status = "disabled"; 325 }; 326 327 i2s2: i2s@50270000 { 328 compatible = "kendryte,k210-i2s", 329 "snps,designware-i2s"; 330 reg = <0x50270000 0x200>; 331 interrupts = <7>; 332 clocks = <&sysclk K210_CLK_I2S2>; 333 clock-names = "i2sclk"; 334 resets = <&sysrst K210_RST_I2S2>; 335 status = "disabled"; 336 }; 337 338 i2c0: i2c@50280000 { 339 compatible = "kendryte,k210-i2c", 340 "snps,designware-i2c"; 341 reg = <0x50280000 0x100>; 342 interrupts = <8>; 343 clocks = <&sysclk K210_CLK_I2C0>; 344 resets = <&sysrst K210_RST_I2C0>; 345 status = "disabled"; 346 }; 347 348 i2c1: i2c@50290000 { 349 compatible = "kendryte,k210-i2c", 350 "snps,designware-i2c"; 351 reg = <0x50290000 0x100>; 352 interrupts = <9>; 353 clocks = <&sysclk K210_CLK_I2C1>; 354 resets = <&sysrst K210_RST_I2C1>; 355 status = "disabled"; 356 }; 357 358 i2c2: i2c@502A0000 { 359 compatible = "kendryte,k210-i2c", 360 "snps,designware-i2c"; 361 reg = <0x502A0000 0x100>; 362 interrupts = <10>; 363 clocks = <&sysclk K210_CLK_I2C2>; 364 resets = <&sysrst K210_RST_I2C2>; 365 status = "disabled"; 366 }; 367 368 fpioa: pinmux@502B0000 { 369 compatible = "kendryte,k210-fpioa"; 370 reg = <0x502B0000 0x100>; 371 clocks = <&sysclk K210_CLK_FPIOA>; 372 resets = <&sysrst K210_RST_FPIOA>; 373 kendryte,sysctl = <&sysctl>; 374 kendryte,power-offset = <K210_SYSCTL_POWER_SEL>; 375 pinctrl-0 = <&fpioa_jtag>; 376 pinctrl-names = "default"; 377 status = "disabled"; 378 379 fpioa_jtag: jtag { 380 pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>, 381 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>, 382 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>, 383 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>; 384 }; 385 }; 386 387 sha256: sha256@502C0000 { 388 compatible = "kendryte,k210-sha256"; 389 reg = <0x502C0000 0x100>; 390 clocks = <&sysclk K210_CLK_SHA>; 391 resets = <&sysrst K210_RST_SHA>; 392 status = "disabled"; 393 }; 394 395 timer0: timer@502D0000 { 396 compatible = "kendryte,k210-timer", 397 "snps,dw-apb-timer"; 398 reg = <0x502D0000 0x100>; 399 interrupts = <14 15>; 400 clocks = <&sysclk K210_CLK_TIMER0>; 401 clock-names = "timer"; 402 resets = <&sysrst K210_RST_TIMER0>; 403 status = "disabled"; 404 }; 405 406 timer1: timer@502E0000 { 407 compatible = "kendryte,k210-timer", 408 "snps,dw-apb-timer"; 409 reg = <0x502E0000 0x100>; 410 interrupts = <16 17>; 411 clocks = <&sysclk K210_CLK_TIMER1>; 412 clock-names = "timer"; 413 resets = <&sysrst K210_RST_TIMER1>; 414 status = "disabled"; 415 }; 416 417 timer2: timer@502F0000 { 418 compatible = "kendryte,k210-timer", 419 "snps,dw-apb-timer"; 420 reg = <0x502F0000 0x100>; 421 interrupts = <18 19>; 422 clocks = <&sysclk K210_CLK_TIMER2>; 423 clock-names = "timer"; 424 resets = <&sysrst K210_RST_TIMER2>; 425 status = "disabled"; 426 }; 427 }; 428 429 apb1: bus@50400000 { 430 #address-cells = <1>; 431 #size-cells = <1>; 432 compatible = "kendryte,k210-apb", "simple-pm-bus"; 433 ranges; 434 clocks = <&sysclk K210_CLK_APB1>; 435 436 wdt0: watchdog@50400000 { 437 compatible = "kendryte,k210-wdt", "snps,dw-wdt"; 438 reg = <0x50400000 0x100>; 439 interrupts = <21>; 440 clocks = <&sysclk K210_CLK_WDT0>; 441 resets = <&sysrst K210_RST_WDT0>; 442 status = "disabled"; 443 }; 444 445 wdt1: watchdog@50410000 { 446 compatible = "kendryte,k210-wdt", "snps,dw-wdt"; 447 reg = <0x50410000 0x100>; 448 interrupts = <22>; 449 clocks = <&sysclk K210_CLK_WDT1>; 450 resets = <&sysrst K210_RST_WDT1>; 451 status = "disabled"; 452 }; 453 454 otp0: nvmem@50420000 { 455 #address-cells = <1>; 456 #size-cells = <1>; 457 compatible = "kendryte,k210-otp"; 458 reg = <0x50420000 0x100>, 459 <0x88000000 0x20000>; 460 reg-names = "reg", "mem"; 461 clocks = <&sysclk K210_CLK_ROM>; 462 resets = <&sysrst K210_RST_ROM>; 463 read-only; 464 status = "disabled"; 465 466 /* Bootloader */ 467 firmware@00000 { 468 reg = <0x00000 0xC200>; 469 }; 470 471 /* 472 * config string as described in RISC-V 473 * privileged spec 1.9 474 */ 475 config-1-9@1c000 { 476 reg = <0x1C000 0x1000>; 477 }; 478 479 /* 480 * Device tree containing only registers, 481 * interrupts, and cpus 482 */ 483 fdt@1d000 { 484 reg = <0x1D000 0x2000>; 485 }; 486 487 /* CPU/ROM credits */ 488 credits@1f000 { 489 reg = <0x1F000 0x1000>; 490 }; 491 }; 492 493 dvp0: camera@50430000 { 494 compatible = "kendryte,k210-dvp"; 495 reg = <0x50430000 0x100>; 496 interrupts = <24>; 497 clocks = <&sysclk K210_CLK_DVP>; 498 resets = <&sysrst K210_RST_DVP>; 499 kendryte,sysctl = <&sysctl>; 500 kendryte,misc-offset = <K210_SYSCTL_MISC>; 501 status = "disabled"; 502 }; 503 504 sysctl: syscon@50440000 { 505 compatible = "kendryte,k210-sysctl", 506 "syscon", "simple-mfd"; 507 reg = <0x50440000 0x100>; 508 reg-io-width = <4>; 509 510 sysclk: clock-controller { 511 #clock-cells = <1>; 512 compatible = "kendryte,k210-clk"; 513 clocks = <&in0>; 514 }; 515 516 sysrst: reset-controller { 517 compatible = "kendryte,k210-rst", 518 "syscon-reset"; 519 #reset-cells = <1>; 520 regmap = <&sysctl>; 521 offset = <K210_SYSCTL_PERI_RESET>; 522 mask = <0x27FFFFFF>; 523 assert-high = <1>; 524 }; 525 526 reboot { 527 compatible = "syscon-reboot"; 528 regmap = <&sysctl>; 529 offset = <K210_SYSCTL_SOFT_RESET>; 530 mask = <1>; 531 value = <1>; 532 }; 533 }; 534 535 aes0: aes@50450000 { 536 compatible = "kendryte,k210-aes"; 537 reg = <0x50450000 0x100>; 538 clocks = <&sysclk K210_CLK_AES>; 539 resets = <&sysrst K210_RST_AES>; 540 status = "disabled"; 541 }; 542 543 rtc: rtc@50460000 { 544 compatible = "kendryte,k210-rtc"; 545 reg = <0x50460000 0x100>; 546 clocks = <&in0>; 547 resets = <&sysrst K210_RST_RTC>; 548 interrupts = <20>; 549 status = "disabled"; 550 }; 551 }; 552 553 apb2: bus@52000000 { 554 #address-cells = <1>; 555 #size-cells = <1>; 556 compatible = "kendryte,k210-apb", "simple-pm-bus"; 557 ranges; 558 clocks = <&sysclk K210_CLK_APB2>; 559 560 spi0: spi@52000000 { 561 #address-cells = <1>; 562 #size-cells = <0>; 563 compatible = "canaan,kendryte-k210-spi", 564 "snps,dw-apb-ssi-4.01", 565 "snps,dw-apb-ssi"; 566 reg = <0x52000000 0x100>; 567 interrupts = <1>; 568 clocks = <&sysclk K210_CLK_SPI0>; 569 clock-names = "ssi_clk"; 570 resets = <&sysrst K210_RST_SPI0>; 571 spi-max-frequency = <25000000>; 572 num-cs = <4>; 573 reg-io-width = <4>; 574 status = "disabled"; 575 }; 576 577 spi1: spi@53000000 { 578 #address-cells = <1>; 579 #size-cells = <0>; 580 compatible = "canaan,kendryte-k210-spi", 581 "snps,dw-apb-ssi-4.01", 582 "snps,dw-apb-ssi"; 583 reg = <0x53000000 0x100>; 584 interrupts = <2>; 585 clocks = <&sysclk K210_CLK_SPI1>; 586 clock-names = "ssi_clk"; 587 resets = <&sysrst K210_RST_SPI1>; 588 spi-max-frequency = <25000000>; 589 num-cs = <4>; 590 reg-io-width = <4>; 591 status = "disabled"; 592 }; 593 594 spi3: spi@54000000 { 595 #address-cells = <1>; 596 #size-cells = <0>; 597 compatible = "canaan,kendryte-k210-ssi", 598 "snps,dwc-ssi-1.01a"; 599 reg = <0x54000000 0x200>; 600 interrupts = <4>; 601 clocks = <&sysclk K210_CLK_SPI3>; 602 clock-names = "ssi_clk"; 603 resets = <&sysrst K210_RST_SPI3>; 604 /* Could possibly go up to 200 MHz */ 605 spi-max-frequency = <100000000>; 606 num-cs = <4>; 607 reg-io-width = <4>; 608 status = "disabled"; 609 }; 610 }; 611 }; 612}; 613