1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 2 /* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */ 3 4 #ifndef MLX5_TIMEOUTS_H 5 #define MLX5_TIMEOUTS_H 6 7 enum mlx5_timeouts_types { 8 /* pre init timeouts (not read from FW) */ 9 MLX5_TO_FW_PRE_INIT_TIMEOUT_MS, 10 MLX5_TO_FW_PRE_INIT_WARN_MESSAGE_INTERVAL_MS, 11 MLX5_TO_FW_PRE_INIT_WAIT_MS, 12 13 /* init segment timeouts */ 14 MLX5_TO_FW_INIT_MS, 15 MLX5_TO_CMD_MS, 16 17 /* DTOR timeouts */ 18 MLX5_TO_PCI_TOGGLE_MS, 19 MLX5_TO_HEALTH_POLL_INTERVAL_MS, 20 MLX5_TO_FULL_CRDUMP_MS, 21 MLX5_TO_FW_RESET_MS, 22 MLX5_TO_FLUSH_ON_ERROR_MS, 23 MLX5_TO_PCI_SYNC_UPDATE_MS, 24 MLX5_TO_TEARDOWN_MS, 25 MLX5_TO_FSM_REACTIVATE_MS, 26 MLX5_TO_RECLAIM_PAGES_MS, 27 MLX5_TO_RECLAIM_VFS_PAGES_MS, 28 29 MAX_TIMEOUT_TYPES 30 }; 31 32 struct mlx5_core_dev; 33 int mlx5_tout_init(struct mlx5_core_dev *dev); 34 void mlx5_tout_cleanup(struct mlx5_core_dev *dev); 35 void mlx5_tout_query_iseg(struct mlx5_core_dev *dev); 36 int mlx5_tout_query_dtor(struct mlx5_core_dev *dev); 37 void mlx5_tout_set_def_val(struct mlx5_core_dev *dev); 38 u64 _mlx5_tout_ms(struct mlx5_core_dev *dev, enum mlx5_timeouts_types type); 39 40 #define mlx5_tout_ms(dev, type) _mlx5_tout_ms(dev, MLX5_TO_##type##_MS) 41 42 # endif /* MLX5_TIMEOUTS_H */ 43