1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Texas Instruments System Control Interface Protocol
4 * Based on include/linux/soc/ti/ti_sci_protocol.h from Linux.
5 *
6 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
7 * Nishanth Menon
8 * Lokesh Vutla <lokeshvutla@ti.com>
9 */
10
11 #ifndef __TISCI_PROTOCOL_H
12 #define __TISCI_PROTOCOL_H
13
14 /**
15 * struct ti_sci_version_info - version information structure
16 * @abi_major: Major ABI version. Change here implies risk of backward
17 * compatibility break.
18 * @abi_minor: Minor ABI version. Change here implies new feature addition,
19 * or compatible change in ABI.
20 * @firmware_revision: Firmware revision (not usually used).
21 * @firmware_description: Firmware description (not usually used).
22 */
23 #include <linux/bitops.h>
24 struct ti_sci_version_info {
25 u8 abi_major;
26 u8 abi_minor;
27 u16 firmware_revision;
28 char firmware_description[32];
29 };
30
31 struct ti_sci_handle;
32
33 /**
34 * struct ti_sci_board_ops - Board config operations
35 * @board_config: Command to set the board configuration
36 * Returns 0 for successful exclusive request, else returns
37 * corresponding error message.
38 * @board_config_rm: Command to set the board resource management
39 * configuration
40 * Returns 0 for successful exclusive request, else returns
41 * corresponding error message.
42 * @board_config_security: Command to set the board security configuration
43 * Returns 0 for successful exclusive request, else returns
44 * corresponding error message.
45 * @board_config_pm: Command to trigger and set the board power and clock
46 * management related configuration
47 * Returns 0 for successful exclusive request, else returns
48 * corresponding error message.
49 */
50 struct ti_sci_board_ops {
51 int (*board_config)(const struct ti_sci_handle *handle,
52 u64 addr, u32 size);
53 int (*board_config_rm)(const struct ti_sci_handle *handle,
54 u64 addr, u32 size);
55 int (*board_config_security)(const struct ti_sci_handle *handle,
56 u64 addr, u32 size);
57 int (*board_config_pm)(const struct ti_sci_handle *handle,
58 u64 addr, u32 size);
59 };
60
61 /**
62 * struct ti_sci_dev_ops - Device control operations
63 * @get_device: Command to request for device managed by TISCI
64 * Returns 0 for successful exclusive request, else returns
65 * corresponding error message.
66 * @idle_device: Command to idle a device managed by TISCI
67 * Returns 0 for successful exclusive request, else returns
68 * corresponding error message.
69 * @put_device: Command to release a device managed by TISCI
70 * Returns 0 for successful release, else returns corresponding
71 * error message.
72 * @is_valid: Check if the device ID is a valid ID.
73 * Returns 0 if the ID is valid, else returns corresponding error.
74 * @get_context_loss_count: Command to retrieve context loss counter - this
75 * increments every time the device looses context. Overflow
76 * is possible.
77 * - count: pointer to u32 which will retrieve counter
78 * Returns 0 for successful information request and count has
79 * proper data, else returns corresponding error message.
80 * @is_idle: Reports back about device idle state
81 * - req_state: Returns requested idle state
82 * Returns 0 for successful information request and req_state and
83 * current_state has proper data, else returns corresponding error
84 * message.
85 * @is_stop: Reports back about device stop state
86 * - req_state: Returns requested stop state
87 * - current_state: Returns current stop state
88 * Returns 0 for successful information request and req_state and
89 * current_state has proper data, else returns corresponding error
90 * message.
91 * @is_on: Reports back about device ON(or active) state
92 * - req_state: Returns requested ON state
93 * - current_state: Returns current ON state
94 * Returns 0 for successful information request and req_state and
95 * current_state has proper data, else returns corresponding error
96 * message.
97 * @is_transitioning: Reports back if the device is in the middle of transition
98 * of state.
99 * -current_state: Returns 'true' if currently transitioning.
100 * @set_device_resets: Command to configure resets for device managed by TISCI.
101 * -reset_state: Device specific reset bit field
102 * Returns 0 for successful request, else returns
103 * corresponding error message.
104 * @get_device_resets: Command to read state of resets for device managed
105 * by TISCI.
106 * -reset_state: pointer to u32 which will retrieve resets
107 * Returns 0 for successful request, else returns
108 * corresponding error message.
109 * @release_exclusive_devices: Command to release all the exclusive devices
110 * attached to this host. This should be used very carefully
111 * and only at the end of execution of your software.
112 *
113 * NOTE: for all these functions, the following parameters are generic in
114 * nature:
115 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
116 * -id: Device Identifier
117 *
118 * Request for the device - NOTE: the client MUST maintain integrity of
119 * usage count by balancing get_device with put_device. No refcounting is
120 * managed by driver for that purpose.
121 */
122 struct ti_sci_dev_ops {
123 int (*get_device)(const struct ti_sci_handle *handle, u32 id);
124 int (*get_device_exclusive)(const struct ti_sci_handle *handle, u32 id);
125 int (*idle_device)(const struct ti_sci_handle *handle, u32 id);
126 int (*idle_device_exclusive)(const struct ti_sci_handle *handle,
127 u32 id);
128 int (*put_device)(const struct ti_sci_handle *handle, u32 id);
129 int (*is_valid)(const struct ti_sci_handle *handle, u32 id);
130 int (*get_context_loss_count)(const struct ti_sci_handle *handle,
131 u32 id, u32 *count);
132 int (*is_idle)(const struct ti_sci_handle *handle, u32 id,
133 bool *requested_state);
134 int (*is_stop)(const struct ti_sci_handle *handle, u32 id,
135 bool *req_state, bool *current_state);
136 int (*is_on)(const struct ti_sci_handle *handle, u32 id,
137 bool *req_state, bool *current_state);
138 int (*is_transitioning)(const struct ti_sci_handle *handle, u32 id,
139 bool *current_state);
140 int (*set_device_resets)(const struct ti_sci_handle *handle, u32 id,
141 u32 reset_state);
142 int (*get_device_resets)(const struct ti_sci_handle *handle, u32 id,
143 u32 *reset_state);
144 int (*release_exclusive_devices)(const struct ti_sci_handle *handle);
145 };
146
147 /**
148 * struct ti_sci_clk_ops - Clock control operations
149 * @get_clock: Request for activation of clock and manage by processor
150 * - needs_ssc: 'true' if Spread Spectrum clock is desired.
151 * - can_change_freq: 'true' if frequency change is desired.
152 * - enable_input_term: 'true' if input termination is desired.
153 * @idle_clock: Request for Idling a clock managed by processor
154 * @put_clock: Release the clock to be auto managed by TISCI
155 * @is_auto: Is the clock being auto managed
156 * - req_state: state indicating if the clock is auto managed
157 * @is_on: Is the clock ON
158 * - req_state: if the clock is requested to be forced ON
159 * - current_state: if the clock is currently ON
160 * @is_off: Is the clock OFF
161 * - req_state: if the clock is requested to be forced OFF
162 * - current_state: if the clock is currently Gated
163 * @set_parent: Set the clock source of a specific device clock
164 * - parent_id: Parent clock identifier to set.
165 * @get_parent: Get the current clock source of a specific device clock
166 * - parent_id: Parent clock identifier which is the parent.
167 * @get_num_parents: Get the number of parents of the current clock source
168 * - num_parents: returns the number of parent clocks.
169 * @get_best_match_freq: Find a best matching frequency for a frequency
170 * range.
171 * - match_freq: Best matching frequency in Hz.
172 * @set_freq: Set the Clock frequency
173 * @get_freq: Get the Clock frequency
174 * - current_freq: Frequency in Hz that the clock is at.
175 *
176 * NOTE: for all these functions, the following parameters are generic in
177 * nature:
178 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
179 * -did: Device identifier this request is for
180 * -cid: Clock identifier for the device for this request.
181 * Each device has it's own set of clock inputs. This indexes
182 * which clock input to modify.
183 * -min_freq: The minimum allowable frequency in Hz. This is the minimum
184 * allowable programmed frequency and does not account for clock
185 * tolerances and jitter.
186 * -target_freq: The target clock frequency in Hz. A frequency will be
187 * processed as close to this target frequency as possible.
188 * -max_freq: The maximum allowable frequency in Hz. This is the maximum
189 * allowable programmed frequency and does not account for clock
190 * tolerances and jitter.
191 *
192 * Request for the clock - NOTE: the client MUST maintain integrity of
193 * usage count by balancing get_clock with put_clock. No refcounting is
194 * managed by driver for that purpose.
195 */
196 struct ti_sci_clk_ops {
197 int (*get_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid,
198 bool needs_ssc, bool can_change_freq,
199 bool enable_input_term);
200 int (*idle_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
201 int (*put_clock)(const struct ti_sci_handle *handle, u32 did, u8 cid);
202 int (*is_auto)(const struct ti_sci_handle *handle, u32 did, u8 cid,
203 bool *req_state);
204 int (*is_on)(const struct ti_sci_handle *handle, u32 did, u8 cid,
205 bool *req_state, bool *current_state);
206 int (*is_off)(const struct ti_sci_handle *handle, u32 did, u8 cid,
207 bool *req_state, bool *current_state);
208 int (*set_parent)(const struct ti_sci_handle *handle, u32 did, u8 cid,
209 u8 parent_id);
210 int (*get_parent)(const struct ti_sci_handle *handle, u32 did, u8 cid,
211 u8 *parent_id);
212 int (*get_num_parents)(const struct ti_sci_handle *handle, u32 did,
213 u8 cid, u8 *num_parents);
214 int (*get_best_match_freq)(const struct ti_sci_handle *handle, u32 did,
215 u8 cid, u64 min_freq, u64 target_freq,
216 u64 max_freq, u64 *match_freq);
217 int (*set_freq)(const struct ti_sci_handle *handle, u32 did, u8 cid,
218 u64 min_freq, u64 target_freq, u64 max_freq);
219 int (*get_freq)(const struct ti_sci_handle *handle, u32 did, u8 cid,
220 u64 *current_freq);
221 };
222
223 /**
224 * struct ti_sci_rm_core_ops - Resource management core operations
225 * @get_range: Get a range of resources belonging to ti sci host.
226 * @get_rage_from_shost: Get a range of resources belonging to
227 * specified host id.
228 * - s_host: Host processing entity to which the
229 * resources are allocated
230 *
231 * NOTE: for these functions, all the parameters are consolidated and defined
232 * as below:
233 * - handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
234 * - dev_id: TISCI device ID.
235 * - subtype: Resource assignment subtype that is being requested
236 * from the given device.
237 * - range_start: Start index of the resource range
238 * - range_end: Number of resources in the range
239 */
240 struct ti_sci_rm_core_ops {
241 int (*get_range)(const struct ti_sci_handle *handle, u32 dev_id,
242 u8 subtype, u16 *range_start, u16 *range_num);
243 int (*get_range_from_shost)(const struct ti_sci_handle *handle,
244 u32 dev_id, u8 subtype, u8 s_host,
245 u16 *range_start, u16 *range_num);
246 };
247
248 /**
249 * struct ti_sci_core_ops - SoC Core Operations
250 * @reboot_device: Reboot the SoC
251 * Returns 0 for successful request(ideally should never return),
252 * else returns corresponding error value.
253 * @query_msmc: Query the size of available msmc
254 * Return 0 for successful query else appropriate error value.
255 */
256 struct ti_sci_core_ops {
257 int (*reboot_device)(const struct ti_sci_handle *handle);
258 int (*query_msmc)(const struct ti_sci_handle *handle,
259 u64 *msmc_start, u64 *msmc_end);
260 };
261
262 /**
263 * struct ti_sci_proc_ops - Processor specific operations.
264 *
265 * @proc_request: Request for controlling a physical processor.
266 * The requesting host should be in the processor access list.
267 * @proc_release: Relinquish a physical processor control
268 * @proc_handover: Handover a physical processor control to another host
269 * in the permitted list.
270 * @set_proc_boot_cfg: Base configuration of the processor
271 * @set_proc_boot_ctrl: Setup limited control flags in specific cases.
272 * @proc_auth_boot_image:
273 * @get_proc_boot_status: Get the state of physical processor
274 * @proc_shutdown_no_wait: Shutdown a core without requesting or waiting for a
275 * response.
276 *
277 * NOTE: for all these functions, the following parameters are generic in
278 * nature:
279 * -handle: Pointer to TISCI handle as retrieved by *ti_sci_get_handle
280 * -pid: Processor ID
281 *
282 */
283 struct ti_sci_proc_ops {
284 int (*proc_request)(const struct ti_sci_handle *handle, u8 pid);
285 int (*proc_release)(const struct ti_sci_handle *handle, u8 pid);
286 int (*proc_handover)(const struct ti_sci_handle *handle, u8 pid,
287 u8 hid);
288 int (*set_proc_boot_cfg)(const struct ti_sci_handle *handle, u8 pid,
289 u64 bv, u32 cfg_set, u32 cfg_clr);
290 int (*set_proc_boot_ctrl)(const struct ti_sci_handle *handle, u8 pid,
291 u32 ctrl_set, u32 ctrl_clr);
292 int (*proc_auth_boot_image)(const struct ti_sci_handle *handle,
293 u64 *image_addr, u32 *image_size);
294 int (*get_proc_boot_status)(const struct ti_sci_handle *handle, u8 pid,
295 u64 *bv, u32 *cfg_flags, u32 *ctrl_flags,
296 u32 *sts_flags);
297 int (*proc_shutdown_no_wait)(const struct ti_sci_handle *handle,
298 u8 pid);
299 };
300
301 #define TI_SCI_RING_MODE_RING (0)
302 #define TI_SCI_RING_MODE_MESSAGE (1)
303 #define TI_SCI_RING_MODE_CREDENTIALS (2)
304 #define TI_SCI_RING_MODE_QM (3)
305
306 #define TI_SCI_MSG_UNUSED_SECONDARY_HOST TI_SCI_RM_NULL_U8
307
308 /* RA config.addr_lo parameter is valid for RM ring configure TI_SCI message */
309 #define TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID BIT(0)
310 /* RA config.addr_hi parameter is valid for RM ring configure TI_SCI message */
311 #define TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID BIT(1)
312 /* RA config.count parameter is valid for RM ring configure TI_SCI message */
313 #define TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID BIT(2)
314 /* RA config.mode parameter is valid for RM ring configure TI_SCI message */
315 #define TI_SCI_MSG_VALUE_RM_RING_MODE_VALID BIT(3)
316 /* RA config.size parameter is valid for RM ring configure TI_SCI message */
317 #define TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID BIT(4)
318 /* RA config.order_id parameter is valid for RM ring configure TISCI message */
319 #define TI_SCI_MSG_VALUE_RM_RING_ORDER_ID_VALID BIT(5)
320
321 #define TI_SCI_MSG_VALUE_RM_ALL_NO_ORDER \
322 (TI_SCI_MSG_VALUE_RM_RING_ADDR_LO_VALID | \
323 TI_SCI_MSG_VALUE_RM_RING_ADDR_HI_VALID | \
324 TI_SCI_MSG_VALUE_RM_RING_COUNT_VALID | \
325 TI_SCI_MSG_VALUE_RM_RING_MODE_VALID | \
326 TI_SCI_MSG_VALUE_RM_RING_SIZE_VALID)
327
328 /**
329 * struct ti_sci_rm_ringacc_ops - Ring Accelerator Management operations
330 * @config: configure the SoC Navigator Subsystem Ring Accelerator ring
331 */
332 struct ti_sci_rm_ringacc_ops {
333 int (*config)(const struct ti_sci_handle *handle,
334 u32 valid_params, u16 nav_id, u16 index,
335 u32 addr_lo, u32 addr_hi, u32 count, u8 mode,
336 u8 size, u8 order_id
337 );
338 };
339
340 /**
341 * struct ti_sci_rm_psil_ops - PSI-L thread operations
342 * @pair: pair PSI-L source thread to a destination thread.
343 * If the src_thread is mapped to UDMA tchan, the corresponding channel's
344 * TCHAN_THRD_ID register is updated.
345 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
346 * RCHAN_THRD_ID register is updated.
347 * @unpair: unpair PSI-L source thread from a destination thread.
348 * If the src_thread is mapped to UDMA tchan, the corresponding channel's
349 * TCHAN_THRD_ID register is cleared.
350 * If the dst_thread is mapped to UDMA rchan, the corresponding channel's
351 * RCHAN_THRD_ID register is cleared.
352 */
353 struct ti_sci_rm_psil_ops {
354 int (*pair)(const struct ti_sci_handle *handle, u32 nav_id,
355 u32 src_thread, u32 dst_thread);
356 int (*unpair)(const struct ti_sci_handle *handle, u32 nav_id,
357 u32 src_thread, u32 dst_thread);
358 };
359
360 /* UDMAP channel types */
361 #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR 2
362 #define TI_SCI_RM_UDMAP_CHAN_TYPE_PKT_PBRR_SB 3 /* RX only */
363 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBRR 10
364 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_PBVR 11
365 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBRR 12
366 #define TI_SCI_RM_UDMAP_CHAN_TYPE_3RDP_BCOPY_PBVR 13
367
368 /* UDMAP channel atypes */
369 #define TI_SCI_RM_UDMAP_ATYPE_PHYS 0
370 #define TI_SCI_RM_UDMAP_ATYPE_INTERMEDIATE 1
371 #define TI_SCI_RM_UDMAP_ATYPE_VIRTUAL 2
372
373 /* UDMAP channel scheduling priorities */
374 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_HIGH 0
375 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_MEDHIGH 1
376 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_MEDLOW 2
377 #define TI_SCI_RM_UDMAP_SCHED_PRIOR_LOW 3
378
379 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_HOST 0
380 #define TI_SCI_RM_UDMAP_RX_FLOW_DESC_MONO 2
381
382 /* UDMAP TX/RX channel valid_params common declarations */
383 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID BIT(0)
384 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID BIT(1)
385 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID BIT(2)
386 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID BIT(3)
387 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID BIT(4)
388 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID BIT(5)
389 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID BIT(6)
390 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID BIT(7)
391 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID BIT(8)
392
393 /**
394 * Configures a Navigator Subsystem UDMAP transmit channel
395 *
396 * Configures a Navigator Subsystem UDMAP transmit channel registers.
397 * See @ti_sci_msg_rm_udmap_tx_ch_cfg_req
398 */
399 struct ti_sci_msg_rm_udmap_tx_ch_cfg {
400 u32 valid_params;
401 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID BIT(9)
402 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID BIT(10)
403 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID BIT(11)
404 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID BIT(12)
405 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID BIT(13)
406 u16 nav_id;
407 u16 index;
408 u8 tx_pause_on_err;
409 u8 tx_filt_einfo;
410 u8 tx_filt_pswords;
411 u8 tx_atype;
412 u8 tx_chan_type;
413 u8 tx_supr_tdpkt;
414 u16 tx_fetch_size;
415 u8 tx_credit_count;
416 u16 txcq_qnum;
417 u8 tx_priority;
418 u8 tx_qos;
419 u8 tx_orderid;
420 u16 fdepth;
421 u8 tx_sched_priority;
422 };
423
424 /**
425 * Configures a Navigator Subsystem UDMAP receive channel
426 *
427 * Configures a Navigator Subsystem UDMAP receive channel registers.
428 * See @ti_sci_msg_rm_udmap_rx_ch_cfg_req
429 */
430 struct ti_sci_msg_rm_udmap_rx_ch_cfg {
431 u32 valid_params;
432 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID BIT(9)
433 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID BIT(10)
434 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID BIT(11)
435 #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID BIT(12)
436 u16 nav_id;
437 u16 index;
438 u16 rx_fetch_size;
439 u16 rxcq_qnum;
440 u8 rx_priority;
441 u8 rx_qos;
442 u8 rx_orderid;
443 u8 rx_sched_priority;
444 u16 flowid_start;
445 u16 flowid_cnt;
446 u8 rx_pause_on_err;
447 u8 rx_atype;
448 u8 rx_chan_type;
449 u8 rx_ignore_short;
450 u8 rx_ignore_long;
451 };
452
453 /**
454 * Configures a Navigator Subsystem UDMAP receive flow
455 *
456 * Configures a Navigator Subsystem UDMAP receive flow's registers.
457 * See @tis_ci_msg_rm_udmap_flow_cfg_req
458 */
459 struct ti_sci_msg_rm_udmap_flow_cfg {
460 u32 valid_params;
461 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID BIT(0)
462 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID BIT(1)
463 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID BIT(2)
464 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID BIT(3)
465 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SOP_OFFSET_VALID BIT(4)
466 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID BIT(5)
467 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_VALID BIT(6)
468 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_VALID BIT(7)
469 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_VALID BIT(8)
470 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_VALID BIT(9)
471 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID BIT(10)
472 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID BIT(11)
473 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID BIT(12)
474 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID BIT(13)
475 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID BIT(14)
476 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID BIT(15)
477 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID BIT(16)
478 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID BIT(17)
479 #define TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID BIT(18)
480 u16 nav_id;
481 u16 flow_index;
482 u8 rx_einfo_present;
483 u8 rx_psinfo_present;
484 u8 rx_error_handling;
485 u8 rx_desc_type;
486 u16 rx_sop_offset;
487 u16 rx_dest_qnum;
488 u8 rx_src_tag_hi;
489 u8 rx_src_tag_lo;
490 u8 rx_dest_tag_hi;
491 u8 rx_dest_tag_lo;
492 u8 rx_src_tag_hi_sel;
493 u8 rx_src_tag_lo_sel;
494 u8 rx_dest_tag_hi_sel;
495 u8 rx_dest_tag_lo_sel;
496 u16 rx_fdq0_sz0_qnum;
497 u16 rx_fdq1_qnum;
498 u16 rx_fdq2_qnum;
499 u16 rx_fdq3_qnum;
500 u8 rx_ps_location;
501 };
502
503 /**
504 * struct ti_sci_rm_udmap_ops - UDMA Management operations
505 * @tx_ch_cfg: configure SoC Navigator Subsystem UDMA transmit channel.
506 * @rx_ch_cfg: configure SoC Navigator Subsystem UDMA receive channel.
507 * @rx_flow_cfg: configure SoC Navigator Subsystem UDMA receive flow.
508 */
509 struct ti_sci_rm_udmap_ops {
510 int (*tx_ch_cfg)(const struct ti_sci_handle *handle,
511 const struct ti_sci_msg_rm_udmap_tx_ch_cfg *params);
512 int (*rx_ch_cfg)(const struct ti_sci_handle *handle,
513 const struct ti_sci_msg_rm_udmap_rx_ch_cfg *params);
514 int (*rx_flow_cfg)(
515 const struct ti_sci_handle *handle,
516 const struct ti_sci_msg_rm_udmap_flow_cfg *params);
517 };
518
519 /**
520 * struct ti_sci_msg_fwl_region_cfg - Request and Response for firewalls settings
521 *
522 * @fwl_id: Firewall ID in question
523 * @region: Region or channel number to set config info
524 * This field is unused in case of a simple firewall and must be initialized
525 * to zero. In case of a region based firewall, this field indicates the
526 * region in question. (index starting from 0) In case of a channel based
527 * firewall, this field indicates the channel in question (index starting
528 * from 0)
529 * @n_permission_regs: Number of permission registers to set
530 * @control: Contents of the firewall CONTROL register to set
531 * @permissions: Contents of the firewall PERMISSION register to set
532 * @start_address: Contents of the firewall START_ADDRESS register to set
533 * @end_address: Contents of the firewall END_ADDRESS register to set
534 */
535 struct ti_sci_msg_fwl_region {
536 u16 fwl_id;
537 u16 region;
538 u32 n_permission_regs;
539 u32 control;
540 u32 permissions[3];
541 u64 start_address;
542 u64 end_address;
543 } __packed;
544
545 /**
546 * \brief Request and Response for firewall owner change
547 *
548 * @fwl_id: Firewall ID in question
549 * @region: Region or channel number to set config info
550 * This field is unused in case of a simple firewall and must be initialized
551 * to zero. In case of a region based firewall, this field indicates the
552 * region in question. (index starting from 0) In case of a channel based
553 * firewall, this field indicates the channel in question (index starting
554 * from 0)
555 * @n_permission_regs: Number of permission registers <= 3
556 * @control: Control register value for this region
557 * @owner_index: New owner index to change to. Owner indexes are setup in DMSC firmware boot configuration data
558 * @owner_privid: New owner priv-id, used to lookup owner_index is not known, must be set to zero otherwise
559 * @owner_permission_bits: New owner permission bits
560 */
561 struct ti_sci_msg_fwl_owner {
562 u16 fwl_id;
563 u16 region;
564 u8 owner_index;
565 u8 owner_privid;
566 u16 owner_permission_bits;
567 } __packed;
568
569 /**
570 * struct ti_sci_fwl_ops - Firewall specific operations
571 * @set_fwl_region: Request for configuring the firewall permissions.
572 * @get_fwl_region: Request for retrieving the firewall permissions.
573 * @change_fwl_owner: Request for a change of firewall owner.
574 */
575 struct ti_sci_fwl_ops {
576 int (*set_fwl_region)(const struct ti_sci_handle *handle, const struct ti_sci_msg_fwl_region *region);
577 int (*get_fwl_region)(const struct ti_sci_handle *handle, struct ti_sci_msg_fwl_region *region);
578 int (*change_fwl_owner)(const struct ti_sci_handle *handle, struct ti_sci_msg_fwl_owner *owner);
579 };
580
581 /**
582 * struct ti_sci_ops - Function support for TI SCI
583 * @board_ops: Miscellaneous operations
584 * @dev_ops: Device specific operations
585 * @clk_ops: Clock specific operations
586 * @core_ops: Core specific operations
587 * @proc_ops: Processor specific operations
588 * @ring_ops: Ring Accelerator Management operations
589 * @fw_ops: Firewall specific operations
590 */
591 struct ti_sci_ops {
592 struct ti_sci_board_ops board_ops;
593 struct ti_sci_dev_ops dev_ops;
594 struct ti_sci_clk_ops clk_ops;
595 struct ti_sci_core_ops core_ops;
596 struct ti_sci_proc_ops proc_ops;
597 struct ti_sci_rm_core_ops rm_core_ops;
598 struct ti_sci_rm_ringacc_ops rm_ring_ops;
599 struct ti_sci_rm_psil_ops rm_psil_ops;
600 struct ti_sci_rm_udmap_ops rm_udmap_ops;
601 struct ti_sci_fwl_ops fwl_ops;
602 };
603
604 /**
605 * struct ti_sci_handle - Handle returned to TI SCI clients for usage.
606 * @ops: operations that are made available to TI SCI clients
607 * @version: structure containing version information
608 */
609 struct ti_sci_handle {
610 struct ti_sci_ops ops;
611 struct ti_sci_version_info version;
612 };
613
614 #define TI_SCI_RESOURCE_NULL 0xffff
615
616 /**
617 * struct ti_sci_resource_desc - Description of TI SCI resource instance range.
618 * @start: Start index of the resource.
619 * @num: Number of resources.
620 * @res_map: Bitmap to manage the allocation of these resources.
621 */
622 struct ti_sci_resource_desc {
623 u16 start;
624 u16 num;
625 unsigned long *res_map;
626 };
627
628 /**
629 * struct ti_sci_resource - Structure representing a resource assigned
630 * to a device.
631 * @sets: Number of sets available from this resource type
632 * @desc: Array of resource descriptors.
633 */
634 struct ti_sci_resource {
635 u16 sets;
636 struct ti_sci_resource_desc *desc;
637 };
638
639 #if IS_ENABLED(CONFIG_TI_SCI_PROTOCOL)
640
641 const struct ti_sci_handle *ti_sci_get_handle_from_sysfw(struct udevice *dev);
642 const struct ti_sci_handle *ti_sci_get_handle(struct udevice *dev);
643 const struct ti_sci_handle *ti_sci_get_by_phandle(struct udevice *dev,
644 const char *property);
645 u16 ti_sci_get_free_resource(struct ti_sci_resource *res);
646 void ti_sci_release_resource(struct ti_sci_resource *res, u16 id);
647 struct ti_sci_resource *
648 devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
649 struct udevice *dev, u32 dev_id, char *of_prop);
650
651 #else /* CONFIG_TI_SCI_PROTOCOL */
652
653 static inline
ti_sci_get_handle_from_sysfw(struct udevice * dev)654 const struct ti_sci_handle *ti_sci_get_handle_from_sysfw(struct udevice *dev)
655 {
656 return ERR_PTR(-EINVAL);
657 }
658
ti_sci_get_handle(struct udevice * dev)659 static inline const struct ti_sci_handle *ti_sci_get_handle(struct udevice *dev)
660 {
661 return ERR_PTR(-EINVAL);
662 }
663
664 static inline
ti_sci_get_by_phandle(struct udevice * dev,const char * property)665 const struct ti_sci_handle *ti_sci_get_by_phandle(struct udevice *dev,
666 const char *property)
667 {
668 return ERR_PTR(-EINVAL);
669 }
670
ti_sci_get_free_resource(struct ti_sci_resource * res)671 static inline u16 ti_sci_get_free_resource(struct ti_sci_resource *res)
672 {
673 return TI_SCI_RESOURCE_NULL;
674 }
675
ti_sci_release_resource(struct ti_sci_resource * res,u16 id)676 static inline void ti_sci_release_resource(struct ti_sci_resource *res, u16 id)
677 {
678 }
679
680 static inline struct ti_sci_resource *
devm_ti_sci_get_of_resource(const struct ti_sci_handle * handle,struct udevice * dev,u32 dev_id,char * of_prop)681 devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
682 struct udevice *dev, u32 dev_id, char *of_prop)
683 {
684 return ERR_PTR(-EINVAL);
685 }
686 #endif /* CONFIG_TI_SCI_PROTOCOL */
687
688 #endif /* __TISCI_PROTOCOL_H */
689