1# Default configuration values for OP-TEE core (all platforms).
2#
3# Platform-specific overrides are in core/arch/arm32/plat-*/conf.mk.
4# Some subsystem-specific defaults are not here but rather in */sub.mk.
5#
6# Configuration values may be assigned from multiple sources.
7# From higher to lower priority:
8#
9#   1. Make arguments ('make CFG_FOO=bar...')
10#   2. The file specified by $(CFG_OPTEE_CONFIG) (if defined)
11#   3. The environment ('CFG_FOO=bar make...')
12#   4. The platform-specific configuration file: core/arch/arm32/plat-*/conf.mk
13#   5. This file
14#   6. Subsystem-specific makefiles (*/sub.mk)
15#
16# Actual values used during the build are output to $(out-dir)/conf.mk
17# (CFG_* variables only).
18
19# Cross-compiler prefix and suffix
20CROSS_COMPILE ?= arm-linux-gnueabihf-
21CROSS_COMPILE32 ?= $(CROSS_COMPILE)
22CROSS_COMPILE64 ?= aarch64-linux-gnu-
23COMPILER ?= gcc
24
25# For convenience
26ifdef CFLAGS
27CFLAGS32 ?= $(CFLAGS)
28CFLAGS64 ?= $(CFLAGS)
29endif
30
31# Compiler warning level.
32# Supported values: undefined, 1, 2 and 3. 3 gives more warnings.
33WARNS ?= 3
34
35# Path to the Python interpreter used by the build system.
36# This variable is set to the default python3 interpreter in the user's
37# path. But build environments that require more explicit control can
38# set the path to a specific interpreter through this variable.
39PYTHON3 ?= python3
40
41# Define DEBUG=1 to compile without optimization (forces -O0)
42# DEBUG=1
43ifeq ($(DEBUG),1)
44# For backwards compatibility
45$(call force,CFG_CC_OPT_LEVEL,0)
46$(call force,CFG_DEBUG_INFO,y)
47endif
48
49# CFG_CC_OPT_LEVEL sets compiler optimization level passed with -O directive.
50# Optimize for size by default, usually gives good performance too.
51CFG_CC_OPT_LEVEL ?= s
52
53# Enabling CFG_DEBUG_INFO makes debug information embedded in core.
54CFG_DEBUG_INFO ?= y
55
56# If y, enable debug features of the TEE core (assertions and lock checks
57# are enabled, panic and assert messages are more verbose, data and prefetch
58# aborts show a stack dump). When disabled, the NDEBUG directive is defined
59# so assertions are disabled.
60CFG_TEE_CORE_DEBUG ?= y
61
62# Log levels for the TEE core. Defines which core messages are displayed
63# on the secure console. Disabling core log (level set to 0) also disables
64# logs from the TAs.
65# 0: none
66# 1: error
67# 2: error + warning
68# 3: error + warning + debug
69# 4: error + warning + debug + flow
70CFG_TEE_CORE_LOG_LEVEL ?= 1
71
72# TA log level
73# If user-mode library libutils.a is built with CFG_TEE_TA_LOG_LEVEL=0,
74# TA tracing is disabled regardless of the value of CFG_TEE_TA_LOG_LEVEL
75# when the TA is built.
76CFG_TEE_TA_LOG_LEVEL ?= 1
77
78# TA enablement
79# When defined to "y", TA traces are output according to
80# CFG_TEE_TA_LOG_LEVEL. Otherwise, they are not output at all
81CFG_TEE_CORE_TA_TRACE ?= y
82
83# If y, enable the memory leak detection feature in the bget memory allocator.
84# When this feature is enabled, calling mdbg_check(1) will print a list of all
85# the currently allocated buffers and the location of the allocation (file and
86# line number).
87# Note: make sure the log level is high enough for the messages to show up on
88# the secure console! For instance:
89# - To debug user-mode (TA) allocations: build OP-TEE *and* the TA with:
90#   $ make CFG_TEE_TA_MALLOC_DEBUG=y CFG_TEE_TA_LOG_LEVEL=3
91# - To debug TEE core allocations: build OP-TEE with:
92#   $ make CFG_TEE_CORE_MALLOC_DEBUG=y CFG_TEE_CORE_LOG_LEVEL=3
93CFG_TEE_CORE_MALLOC_DEBUG ?= n
94CFG_TEE_TA_MALLOC_DEBUG ?= n
95# Prints an error message and dumps the stack on failed memory allocations
96# using malloc() and friends.
97CFG_CORE_DUMP_OOM ?= $(CFG_TEE_CORE_MALLOC_DEBUG)
98
99# Mask to select which messages are prefixed with long debugging information
100# (severity, core ID, thread ID, component name, function name, line number)
101# based on the message level. If BIT(level) is set, the long prefix is shown.
102# Otherwise a short prefix is used (severity and component name only).
103# Levels: 0=none 1=error 2=info 3=debug 4=flow
104CFG_MSG_LONG_PREFIX_MASK ?= 0x1a
105
106# PRNG configuration
107# If CFG_WITH_SOFTWARE_PRNG is enabled, crypto provider provided
108# software PRNG implementation is used.
109# Otherwise, you need to implement hw_get_random_byte() for your platform
110CFG_WITH_SOFTWARE_PRNG ?= y
111
112# Number of threads
113CFG_NUM_THREADS ?= 2
114
115# API implementation version
116CFG_TEE_API_VERSION ?= GPD-1.1-dev
117
118# Implementation description (implementation-dependent)
119CFG_TEE_IMPL_DESCR ?= OPTEE
120
121# Should OPTEE_SMC_CALL_GET_OS_REVISION return a build identifier to Normal
122# World?
123CFG_OS_REV_REPORTS_GIT_SHA1 ?= y
124
125# The following values are not extracted from the "git describe" output because
126# we might be outside of a Git environment, or the tree may have been cloned
127# with limited depth not including any tag, so there is really no guarantee
128# that TEE_IMPL_VERSION contains the major and minor revision numbers.
129CFG_OPTEE_REVISION_MAJOR ?= 3
130CFG_OPTEE_REVISION_MINOR ?= 16
131
132# Trusted OS implementation version
133TEE_IMPL_VERSION ?= $(shell git describe --always --dirty=-dev 2>/dev/null || \
134		      echo Unknown_$(CFG_OPTEE_REVISION_MAJOR).$(CFG_OPTEE_REVISION_MINOR))
135ifeq ($(CFG_OS_REV_REPORTS_GIT_SHA1),y)
136TEE_IMPL_GIT_SHA1 := 0x$(shell git rev-parse --short=8 HEAD 2>/dev/null || echo 0)
137else
138TEE_IMPL_GIT_SHA1 := 0x0
139endif
140
141# Trusted OS implementation manufacturer name
142CFG_TEE_MANUFACTURER ?= LINARO
143
144# Trusted firmware version
145CFG_TEE_FW_IMPL_VERSION ?= FW_IMPL_UNDEF
146
147# Trusted OS implementation manufacturer name
148CFG_TEE_FW_MANUFACTURER ?= FW_MAN_UNDEF
149
150# Rich Execution Environment (REE) file system support: normal world OS
151# provides the actual storage.
152# This is the default FS when enabled (i.e., the one used when
153# TEE_STORAGE_PRIVATE is passed to the trusted storage API)
154CFG_REE_FS ?= y
155
156# RPMB file system support
157CFG_RPMB_FS ?= n
158
159# Device identifier used when CFG_RPMB_FS = y.
160# The exact meaning of this value is platform-dependent. On Linux, the
161# tee-supplicant process will open /dev/mmcblk<id>rpmb
162CFG_RPMB_FS_DEV_ID ?= 0
163
164# This config variable determines the number of entries read in from RPMB at
165# once whenever a function traverses the RPMB FS. Increasing the default value
166# has the following consequences:
167# - More memory required on heap. A single FAT entry currently has a size of
168#   256 bytes.
169# - Potentially significant speed-ups for RPMB I/O. Depending on how many
170#   entries a function needs to traverse, the number of time-consuming RPMB
171#   read-in operations can be reduced.
172# Chosing a proper value is both platform- (available memory) and use-case-
173# dependent (potential number of FAT fs entries), so overwrite in platform
174# config files
175CFG_RPMB_FS_RD_ENTRIES ?= 8
176
177# Enables caching of FAT FS entries when set to a value greater than zero.
178# When enabled, the cache stores the first 'CFG_RPMB_FS_CACHE_ENTRIES' FAT FS
179# entries. The cache is populated when FAT FS entries are initially read in.
180# When traversing the FAT FS entries, we read from the cache instead of reading
181# in the entries from RPMB storage. Consequently, when a FAT FS entry is
182# written, the cache is updated. In scenarios where an estimate of the number
183# of FAT FS entries can be made, the cache may be specifically tailored to
184# store all entries. The caching can improve RPMB I/O at the cost
185# of additional memory.
186# Without caching, we temporarily require
187# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
188# while traversing the FAT FS (e.g. in read_fat).
189# For example 8*256 bytes = 2kB while in read_fat.
190# With caching, we constantly require up to
191# CFG_RPMB_FS_CACHE_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
192# depending on how many elements are in the cache, and additional temporary
193# CFG_RPMB_FS_RD_ENTRIES*sizeof(struct rpmb_fat_entry) bytes of heap memory
194# in case the cache is too small to hold all elements when traversing.
195CFG_RPMB_FS_CACHE_ENTRIES ?= 0
196
197# Print RPMB data frames sent to and received from the RPMB device
198CFG_RPMB_FS_DEBUG_DATA ?= n
199
200# Clear RPMB content at cold boot
201CFG_RPMB_RESET_FAT ?= n
202
203# Use a hard coded RPMB key instead of deriving it from the platform HUK
204CFG_RPMB_TESTKEY ?= n
205
206# Enables RPMB key programming by the TEE, in case the RPMB partition has not
207# been configured yet.
208# !!! Security warning !!!
209# Do *NOT* enable this in product builds, as doing so would allow the TEE to
210# leak the RPMB key.
211# This option is useful in the following situations:
212# - Testing
213# - RPMB key provisioning in a controlled environment (factory setup)
214CFG_RPMB_WRITE_KEY ?= n
215
216_CFG_WITH_SECURE_STORAGE := $(call cfg-one-enabled,CFG_REE_FS CFG_RPMB_FS)
217
218# Signing key for OP-TEE TA's
219# When performing external HSM signing for TA's TA_SIGN_KEY can be set to dummy
220# key and then set TA_PUBLIC_KEY to match public key from the HSM.
221# TA_PUBLIC_KEY's public key will be embedded into OP-TEE OS.
222TA_SIGN_KEY ?= keys/default_ta.pem
223TA_PUBLIC_KEY ?= $(TA_SIGN_KEY)
224
225# Include lib/libutils/isoc in the build? Most platforms need this, but some
226# may not because they obtain the isoc functions from elsewhere
227CFG_LIBUTILS_WITH_ISOC ?= y
228
229# Enables floating point support for user TAs
230# ARM32: EABI defines both a soft-float ABI and a hard-float ABI,
231#	 hard-float is basically a super set of soft-float. Hard-float
232#	 requires all the support routines provided for soft-float, but the
233#	 compiler may choose to optimize to not use some of them and use
234#	 the floating-point registers instead.
235# ARM64: EABI doesn't define a soft-float ABI, everything is hard-float (or
236#	 nothing with ` -mgeneral-regs-only`)
237# With CFG_TA_FLOAT_SUPPORT enabled TA code is free use floating point types
238CFG_TA_FLOAT_SUPPORT ?= y
239
240# Stack unwinding: print a stack dump to the console on core or TA abort, or
241# when a TA panics.
242# If CFG_UNWIND is enabled, both the kernel and user mode call stacks can be
243# unwound (not paged TAs, however).
244# Note that 32-bit ARM code needs unwind tables for this to work, so enabling
245# this option will increase the size of the 32-bit TEE binary by a few KB.
246# Similarly, TAs have to be compiled with -funwind-tables (default when the
247# option is set) otherwise they can't be unwound.
248# Warning: since the unwind sequence for user-mode (TA) code is implemented in
249# the privileged layer of OP-TEE, enabling this feature will weaken the
250# user/kernel isolation. Therefore it should be disabled in release builds.
251ifeq ($(CFG_TEE_CORE_DEBUG),y)
252CFG_UNWIND ?= y
253endif
254
255# Enable support for dynamically loaded user TAs
256CFG_WITH_USER_TA ?= y
257
258# Choosing the architecture(s) of user-mode libraries (used by TAs)
259#
260# Platforms may define a list of supported architectures for user-mode code
261# by setting $(supported-ta-targets). Valid values are "ta_arm32", "ta_arm64",
262# "ta_arm32 ta_arm64" and "ta_arm64 ta_arm32".
263# $(supported-ta-targets) defaults to "ta_arm32" when the TEE core is 32-bits,
264# and "ta_arm32 ta_arm64" when it is 64-bits (that is, when CFG_ARM64_core=y).
265# The first entry in $(supported-ta-targets) has a special role, see
266# CFG_USER_TA_TARGET_<ta-name> below.
267#
268# CFG_USER_TA_TARGETS may be defined to restrict $(supported-ta-targets) or
269# change the order of the values.
270#
271# The list of TA architectures is ultimately stored in $(ta-targets).
272
273# CFG_USER_TA_TARGET_<ta-name> (for example, CFG_USER_TA_TARGET_avb), if
274# defined, selects the unique TA architecture mode for building the in-tree TA
275# <ta-name>. Can be either ta_arm32 or ta_arm64.
276# By default, in-tree TAs are built using the first architecture specified in
277# $(ta-targets).
278
279# Address Space Layout Randomization for user-mode Trusted Applications
280#
281# When this flag is enabled, the ELF loader will introduce a random offset
282# when mapping the application in user space. ASLR makes the exploitation of
283# memory corruption vulnerabilities more difficult.
284CFG_TA_ASLR ?= y
285
286# How much ASLR may shift the base address (in pages). The base address is
287# randomly shifted by an integer number of pages comprised between these two
288# values. Bigger ranges are more secure because they make the addresses harder
289# to guess at the expense of using more memory for the page tables.
290CFG_TA_ASLR_MIN_OFFSET_PAGES ?= 0
291CFG_TA_ASLR_MAX_OFFSET_PAGES ?= 128
292
293# Address Space Layout Randomization for TEE Core
294#
295# When this flag is enabled, the early init code will introduce a random
296# offset when mapping TEE Core. ASLR makes the exploitation of memory
297# corruption vulnerabilities more difficult.
298CFG_CORE_ASLR ?= y
299
300# Load user TAs from the REE filesystem via tee-supplicant
301CFG_REE_FS_TA ?= y
302
303# Pre-authentication of TA binaries loaded from the REE filesystem
304#
305# - If CFG_REE_FS_TA_BUFFERED=y: load TA binary into a temporary buffer in the
306#   "Secure DDR" pool, check the signature, then process the file only if it is
307#   valid.
308# - If disabled: hash the binaries as they are being processed and verify the
309#   signature as a last step.
310CFG_REE_FS_TA_BUFFERED ?= n
311$(eval $(call cfg-depends-all,CFG_REE_FS_TA_BUFFERED,CFG_REE_FS_TA))
312
313# When CFG_REE_FS=y and CFG_RPMB_FS=y:
314# Allow secure storage in the REE FS to be entirely deleted without causing
315# anti-rollback errors. That is, rm /data/tee/dirf.db or rm -rf /data/tee (or
316# whatever path is configured in tee-supplicant as CFG_TEE_FS_PARENT_PATH)
317# can be used to reset the secure storage to a clean, empty state.
318# Typically used for testing only since it weakens storage security.
319CFG_REE_FS_ALLOW_RESET ?= n
320
321# Support for loading user TAs from a special section in the TEE binary.
322# Such TAs are available even before tee-supplicant is available (hence their
323# name), but note that many services exported to TAs may need tee-supplicant,
324# so early use is limited to a subset of the TEE Internal Core API (crypto...)
325# To use this feature, set EARLY_TA_PATHS to the paths to one or more TA ELF
326# file(s). For example:
327#   $ make ... \
328#     EARLY_TA_PATHS="path/to/8aaaf200-2450-11e4-abe2-0002a5d5c51b.stripped.elf \
329#                     path/to/cb3e5ba0-adf1-11e0-998b-0002a5d5c51b.stripped.elf"
330# Typical build steps:
331#   $ make ta_dev_kit CFG_EARLY_TA=y # Create the dev kit (user mode libraries,
332#                                    # headers, makefiles), ready to build TAs.
333#                                    # CFG_EARLY_TA=y is optional, it prevents
334#                                    # later library recompilations.
335#   <build some TAs>
336#   $ make EARLY_TA_PATHS=<paths>    # Build OP-TEE and embbed the TA(s)
337#
338# Another option is CFG_IN_TREE_EARLY_TAS which is used to point at
339# in-tree TAs. CFG_IN_TREE_EARLY_TAS is formatted as:
340# <name-of-ta>/<uuid>
341# for instance avb/023f8f1a-292a-432b-8fc4-de8471358067
342ifneq ($(EARLY_TA_PATHS)$(CFG_IN_TREE_EARLY_TAS),)
343$(call force,CFG_EARLY_TA,y)
344else
345CFG_EARLY_TA ?= n
346endif
347
348ifeq ($(CFG_EARLY_TA),y)
349$(call force,CFG_EMBEDDED_TS,y)
350endif
351
352ifneq ($(SP_PATHS),)
353$(call force,CFG_EMBEDDED_TS,y)
354else
355CFG_SECURE_PARTITION ?= n
356endif
357
358ifeq ($(CFG_SECURE_PARTITION),y)
359$(call force,CFG_EMBEDDED_TS,y)
360endif
361
362ifeq ($(CFG_EMBEDDED_TS),y)
363$(call force,CFG_ZLIB,y)
364endif
365
366# By default the early TAs are compressed in the TEE binary, it is possible to
367# not compress them with CFG_EARLY_TA_COMPRESS=n
368CFG_EARLY_TA_COMPRESS ?= y
369
370# Enable paging, requires SRAM, can't be enabled by default
371CFG_WITH_PAGER ?= n
372
373# Use the pager for user TAs
374CFG_PAGED_USER_TA ?= $(CFG_WITH_PAGER)
375
376# If paging of user TAs, that is, R/W paging default to enable paging of
377# TAG and IV in order to reduce heap usage.
378CFG_CORE_PAGE_TAG_AND_IV ?= $(CFG_PAGED_USER_TA)
379
380# Runtime lock dependency checker: ensures that a proper locking hierarchy is
381# used in the TEE core when acquiring and releasing mutexes. Any violation will
382# cause a panic as soon as the invalid locking condition is detected. If
383# CFG_UNWIND and CFG_LOCKDEP_RECORD_STACK are both enabled, the algorithm
384# records the call stacks when locks are taken, and prints them when a
385# potential deadlock is found.
386# Expect a significant performance impact when enabling this.
387CFG_LOCKDEP ?= n
388CFG_LOCKDEP_RECORD_STACK ?= y
389
390# BestFit algorithm in bget reduces the fragmentation of the heap when running
391# with the pager enabled or lockdep
392CFG_CORE_BGET_BESTFIT ?= $(call cfg-one-enabled, CFG_WITH_PAGER CFG_LOCKDEP)
393
394# Enable support for detected undefined behavior in C
395# Uses a lot of memory, can't be enabled by default
396CFG_CORE_SANITIZE_UNDEFINED ?= n
397
398# Enable Kernel Address sanitizer, has a huge performance impact, uses a
399# lot of memory and need platform specific adaptations, can't be enabled by
400# default
401CFG_CORE_SANITIZE_KADDRESS ?= n
402
403# Add stack guards before/after stacks and periodically check them
404CFG_WITH_STACK_CANARIES ?= y
405
406# Use compiler instrumentation to troubleshoot stack overflows.
407# When enabled, most C functions check the stack pointer against the current
408# stack limits on entry and panic immediately if it is out of range.
409CFG_CORE_DEBUG_CHECK_STACKS ?= n
410
411# Use when the default stack allocations are not sufficient.
412CFG_STACK_THREAD_EXTRA ?= 0
413CFG_STACK_TMP_EXTRA ?= 0
414
415# Device Tree support
416#
417# When CFG_DT is enabled core embeds the FDT library (libfdt) allowing
418# device tree blob (DTB) parsing from the core.
419#
420# When CFG_DT is enabled, the TEE _start function expects to find
421# the address of a DTB in register X2/R2 provided by the early boot stage
422# or value 0 if boot stage provides no DTB.
423#
424# When CFG_EMBED_DTB is enabled, CFG_EMBED_DTB_SOURCE_FILE shall define the
425# relative path of a DTS file located in core/arch/$(ARCH)/dts.
426# The DTS file is compiled into a DTB file which content is embedded in a
427# read-only section of the core.
428ifneq ($(strip $(CFG_EMBED_DTB_SOURCE_FILE)),)
429CFG_EMBED_DTB ?= y
430endif
431ifeq ($(CFG_EMBED_DTB),y)
432$(call force,CFG_DT,y)
433endif
434CFG_EMBED_DTB ?= n
435CFG_DT ?= n
436
437# Maximum size of the Device Tree Blob, has to be large enough to allow
438# editing of the supplied DTB.
439CFG_DTB_MAX_SIZE ?= 0x10000
440
441# Device Tree Overlay support.
442# CFG_EXTERNAL_DTB_OVERLAY allows to append a DTB overlay into an existing
443# external DTB. The overlay is created when no valid DTB overlay is found.
444# CFG_GENERATE_DTB_OVERLAY allows to create a DTB overlay at external
445# DTB location.
446# External DTB location (physical address) is provided either by boot
447# argument arg2 or from CFG_DT_ADDR if defined.
448# A subsequent boot stage can then merge the generated overlay DTB into a main
449# DTB using the standard fdt_overlay_apply() method.
450CFG_EXTERNAL_DTB_OVERLAY ?= n
451CFG_GENERATE_DTB_OVERLAY ?= n
452
453ifeq (y-y,$(CFG_EXTERNAL_DTB_OVERLAY)-$(CFG_GENERATE_DTB_OVERLAY))
454$(error CFG_EXTERNAL_DTB_OVERLAY and CFG_GENERATE_DTB_OVERLAY are exclusive)
455endif
456_CFG_USE_DTB_OVERLAY := $(call cfg-one-enabled,CFG_EXTERNAL_DTB_OVERLAY \
457			  CFG_GENERATE_DTB_OVERLAY)
458
459# All embedded tests are supposed to be disabled by default, this flag
460# is used to control the default value of all other embedded tests
461CFG_ENABLE_EMBEDDED_TESTS ?= n
462
463# Enable core self tests and related pseudo TAs
464CFG_TEE_CORE_EMBED_INTERNAL_TESTS ?= $(CFG_ENABLE_EMBEDDED_TESTS)
465
466# Compiles bget_main_test() to be called from a test TA
467CFG_TA_BGET_TEST ?= $(CFG_ENABLE_EMBEDDED_TESTS)
468
469# This option enables OP-TEE to respond to SMP boot request: the Rich OS
470# issues this to request OP-TEE to release secondaries cores out of reset,
471# with specific core number and non-secure entry address.
472CFG_BOOT_SECONDARY_REQUEST ?= n
473
474# Default heap size for Core, 64 kB
475CFG_CORE_HEAP_SIZE ?= 65536
476
477# Default size of nexus heap. 16 kB. Used only if CFG_VIRTUALIZATION
478# is enabled
479CFG_CORE_NEX_HEAP_SIZE ?= 16384
480
481# TA profiling.
482# When this option is enabled, OP-TEE can execute Trusted Applications
483# instrumented with GCC's -pg flag and will output profiling information
484# in gmon.out format to /tmp/gmon-<ta_uuid>.out (path is defined in
485# tee-supplicant)
486# Note: this does not work well with shared libraries at the moment for a
487# couple of reasons:
488# 1. The profiling code assumes a unique executable section in the TA VA space.
489# 2. The code used to detect at run time if the TA is intrumented assumes that
490# the TA is linked statically.
491CFG_TA_GPROF_SUPPORT ?= n
492
493# TA function tracing.
494# When this option is enabled, OP-TEE can execute Trusted Applications
495# instrumented with GCC's -pg flag and will output function tracing
496# information in ftrace.out format to /tmp/ftrace-<ta_uuid>.out (path is
497# defined in tee-supplicant)
498CFG_FTRACE_SUPPORT ?= n
499
500# How to make room when the function tracing buffer is full?
501# 'shift': shift the previously stored data by the amount needed in order
502#    to always keep the latest logs (slower, especially with big buffer sizes)
503# 'wrap': discard the previous data and start at the beginning of the buffer
504#    again (fast, but can result in a mostly empty buffer)
505# 'stop': stop logging new data
506CFG_FTRACE_BUF_WHEN_FULL ?= shift
507$(call cfg-check-value,FTRACE_BUF_WHEN_FULL,shift stop wrap)
508$(call force,_CFG_FTRACE_BUF_WHEN_FULL_$(CFG_FTRACE_BUF_WHEN_FULL),y)
509
510# Function tracing: unit to be used when displaying durations
511#  0: always display durations in microseconds
512# >0: if duration is greater or equal to the specified value (in microseconds),
513#     display it in milliseconds
514CFG_FTRACE_US_MS ?= 10000
515
516# Core syscall function tracing.
517# When this option is enabled, OP-TEE core is instrumented with GCC's
518# -pg flag and will output syscall function graph in user TA ftrace
519# buffer
520CFG_SYSCALL_FTRACE ?= n
521$(call cfg-depends-all,CFG_SYSCALL_FTRACE,CFG_FTRACE_SUPPORT)
522
523# Enable to compile user TA libraries with profiling (-pg).
524# Depends on CFG_TA_GPROF_SUPPORT or CFG_FTRACE_SUPPORT.
525CFG_ULIBS_MCOUNT ?= n
526# Profiling/tracing of syscall wrapper (utee_*)
527CFG_SYSCALL_WRAPPERS_MCOUNT ?= $(CFG_ULIBS_MCOUNT)
528
529ifeq (y,$(filter y,$(CFG_ULIBS_MCOUNT) $(CFG_SYSCALL_WRAPPERS_MCOUNT)))
530ifeq (,$(filter y,$(CFG_TA_GPROF_SUPPORT) $(CFG_FTRACE_SUPPORT)))
531$(error Cannot instrument user libraries if user mode profiling is disabled)
532endif
533endif
534
535# Build libutee, libutils, libmbedtls as shared libraries.
536# - Static libraries are still generated when this is enabled, but TAs will use
537# the shared libraries unless explicitly linked with the -static flag.
538# - Shared libraries are made of two files: for example, libutee is
539#   libutee.so and 527f1a47-b92c-4a74-95bd-72f19f4a6f74.ta. The '.so' file
540#   is a totally standard shared object, and should be used to link against.
541#   The '.ta' file is a signed version of the '.so' and should be installed
542#   in the same way as TAs so that they can be found at runtime.
543CFG_ULIBS_SHARED ?= n
544
545ifeq (y-y,$(CFG_TA_GPROF_SUPPORT)-$(CFG_ULIBS_SHARED))
546$(error CFG_TA_GPROF_SUPPORT and CFG_ULIBS_SHARED are currently incompatible)
547endif
548
549# CFG_GP_SOCKETS
550# Enable Global Platform Sockets support
551CFG_GP_SOCKETS ?= y
552
553# Enable Secure Data Path support in OP-TEE core (TA may be invoked with
554# invocation parameters referring to specific secure memories).
555CFG_SECURE_DATA_PATH ?= n
556
557# Enable storage for TAs in secure storage, depends on CFG_REE_FS=y
558# TA binaries are stored encrypted in the REE FS and are protected by
559# metadata in secure storage.
560CFG_SECSTOR_TA ?= $(call cfg-all-enabled,CFG_REE_FS CFG_WITH_USER_TA)
561$(eval $(call cfg-depends-all,CFG_SECSTOR_TA,CFG_REE_FS CFG_WITH_USER_TA))
562
563# Enable the pseudo TA that managages TA storage in secure storage
564CFG_SECSTOR_TA_MGMT_PTA ?= $(call cfg-all-enabled,CFG_SECSTOR_TA)
565$(eval $(call cfg-depends-all,CFG_SECSTOR_TA_MGMT_PTA,CFG_SECSTOR_TA))
566
567# Enable the pseudo TA for misc. auxilary services, extending existing
568# GlobalPlatform TEE Internal Core API (for example, re-seeding RNG entropy
569# pool etc...)
570CFG_SYSTEM_PTA ?= $(CFG_WITH_USER_TA)
571$(eval $(call cfg-depends-all,CFG_SYSTEM_PTA,CFG_WITH_USER_TA))
572
573# Enable the pseudo TA for enumeration of TEE based devices for the normal
574# world OS.
575CFG_DEVICE_ENUM_PTA ?= y
576
577# Define the number of cores per cluster used in calculating core position.
578# The cluster number is shifted by this value and added to the core ID,
579# so its value represents log2(cores/cluster).
580# Default is 2**(2) = 4 cores per cluster.
581CFG_CORE_CLUSTER_SHIFT ?= 2
582
583# Define the number of threads per core used in calculating processing
584# element's position. The core number is shifted by this value and added to
585# the thread ID, so its value represents log2(threads/core).
586# Default is 2**(0) = 1 threads per core.
587CFG_CORE_THREAD_SHIFT ?= 0
588
589# Enable support for dynamic shared memory (shared memory anywhere in
590# non-secure memory).
591CFG_CORE_DYN_SHM ?= y
592
593# Enable support for reserved shared memory (shared memory in a carved out
594# memory area).
595CFG_CORE_RESERVED_SHM ?= y
596
597# Enables support for larger physical addresses, that is, it will define
598# paddr_t as a 64-bit type.
599CFG_CORE_LARGE_PHYS_ADDR ?= n
600
601# Define the maximum size, in bits, for big numbers in the Internal Core API
602# Arithmetical functions. This does *not* influence the key size that may be
603# manipulated through the Cryptographic API.
604# Set this to a lower value to reduce the TA memory footprint.
605CFG_TA_BIGNUM_MAX_BITS ?= 2048
606
607# Define the maximum size, in bits, for big numbers in the TEE core (privileged
608# layer).
609# This value is an upper limit for the key size in any cryptographic algorithm
610# implemented by the TEE core.
611# Set this to a lower value to reduce the memory footprint.
612CFG_CORE_BIGNUM_MAX_BITS ?= 4096
613
614# Not used since libmpa was removed. Force the values to catch build scripts
615# that would set = n.
616$(call force,CFG_TA_MBEDTLS_MPI,y)
617$(call force,CFG_TA_MBEDTLS,y)
618
619# Compile the TA library mbedTLS with self test functions, the functions
620# need to be called to test anything
621CFG_TA_MBEDTLS_SELF_TEST ?= y
622
623# By default use tomcrypt as the main crypto lib providing an implementation
624# for the API in <crypto/crypto.h>
625# CFG_CRYPTOLIB_NAME is used as libname and
626# CFG_CRYPTOLIB_DIR is used as libdir when compiling the library
627#
628# It's also possible to configure to use mbedtls instead of tomcrypt.
629# Then the variables should be assigned as "CFG_CRYPTOLIB_NAME=mbedtls" and
630# "CFG_CRYPTOLIB_DIR=lib/libmbedtls" respectively.
631CFG_CRYPTOLIB_NAME ?= tomcrypt
632CFG_CRYPTOLIB_DIR ?= core/lib/libtomcrypt
633
634# Not used since libmpa was removed. Force the value to catch build scripts
635# that would set = n.
636$(call force,CFG_CORE_MBEDTLS_MPI,y)
637
638# Enable virtualization support. OP-TEE will not work without compatible
639# hypervisor if this option is enabled.
640CFG_VIRTUALIZATION ?= n
641
642ifeq ($(CFG_VIRTUALIZATION),y)
643$(call force,CFG_CORE_RODATA_NOEXEC,y)
644$(call force,CFG_CORE_RWDATA_NOEXEC,y)
645
646# Default number of virtual guests
647CFG_VIRT_GUEST_COUNT ?= 2
648endif
649
650# Enables backwards compatible derivation of RPMB and SSK keys
651CFG_CORE_HUK_SUBKEY_COMPAT ?= y
652
653# Use SoC specific tee_otp_get_die_id() implementation for SSK key generation.
654# This option depends on CFG_CORE_HUK_SUBKEY_COMPAT=y.
655CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID ?= n
656
657# Compress and encode conf.mk into the TEE core, and show the encoded string on
658# boot (with severity TRACE_INFO).
659CFG_SHOW_CONF_ON_BOOT ?= n
660
661# Enables support for passing a TPM Event Log stored in secure memory
662# to a TA, so a TPM Service could use it to extend any measurement
663# taken before the service was up and running.
664CFG_CORE_TPM_EVENT_LOG ?= n
665
666# When enabled, CFG_SCMI_MSG_DRIVERS embeds SCMI message drivers in the core.
667# Refer to the supported SCMI features embedded upon CFG_SCMI_MSG_*
668# CFG_SCMI_MSG_CLOCK embeds SCMI clock protocol support.
669# CFG_SCMI_MSG_RESET_DOMAIN embeds SCMI reset domain protocol support.
670# CFG_SCMI_MSG_SMT embeds SMT based message buffer of communication channel
671# CFG_SCMI_MSG_VOLTAGE_DOMAIN embeds SCMI voltage domain protocol support.
672CFG_SCMI_MSG_DRIVERS ?= n
673CFG_SCMI_MSG_CLOCK ?= n
674CFG_SCMI_MSG_RESET_DOMAIN ?= n
675CFG_SCMI_MSG_SMT ?= n
676CFG_SCMI_MSG_VOLTAGE_DOMAIN ?= n
677
678# Enable SCMI PTA interface for REE SCMI agents
679CFG_SCMI_PTA ?= n
680
681ifneq ($(CFG_STMM_PATH),)
682$(call force,CFG_WITH_STMM_SP,y)
683else
684CFG_WITH_STMM_SP ?= n
685endif
686ifeq ($(CFG_WITH_STMM_SP),y)
687$(call force,CFG_ZLIB,y)
688endif
689
690# When enabled checks that buffers passed to the GP Internal Core API
691# comply with the rules added as annotations as part of the definition of
692# the API. For example preventing buffers in non-secure shared memory when
693# not allowed.
694CFG_TA_STRICT_ANNOTATION_CHECKS ?= y
695
696# When enabled accepts the DES key sizes excluding parity bits as in
697# the GP Internal API Specification v1.0
698CFG_COMPAT_GP10_DES ?= y
699
700# Defines a limit for many levels TAs may call each others.
701CFG_CORE_MAX_SYSCALL_RECURSION ?= 4
702
703# Pseudo-TA to export hardware RNG output to Normal World
704# RNG characteristics are platform specific
705CFG_HWRNG_PTA ?= n
706ifeq ($(CFG_HWRNG_PTA),y)
707# Output rate of hw_get_random_bytes() in bytes per second, 0: not rate-limited
708CFG_HWRNG_RATE ?= 0
709# Quality/entropy of hw_get_random_bytes() per 1024 bits of output data, in bits
710ifeq (,$(CFG_HWRNG_QUALITY))
711$(error CFG_HWRNG_QUALITY not defined)
712endif
713endif
714
715# CFG_PREALLOC_RPC_CACHE, when enabled, makes core to preallocate
716# shared memory for each secure thread. When disabled, RPC shared
717# memory is released once the secure thread has completed is execution.
718ifeq ($(CFG_WITH_PAGER),y)
719CFG_PREALLOC_RPC_CACHE ?= n
720endif
721CFG_PREALLOC_RPC_CACHE ?= y
722
723# When enabled, CFG_DRIVERS_CLK embeds a clock framework in OP-TEE core.
724# This clock framework allows to describe clock tree and provides functions to
725# get and configure the clocks.
726# CFG_DRIVERS_CLK_DT embeds devicetree clock parsing support
727# CFG_DRIVERS_CLK_FIXED add support for "fixed-clock" compatible clocks
728CFG_DRIVERS_CLK ?= n
729CFG_DRIVERS_CLK_DT ?= $(call cfg-all-enabled,CFG_DRIVERS_CLK CFG_DT)
730CFG_DRIVERS_CLK_FIXED ?= $(CFG_DRIVERS_CLK_DT)
731
732$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_DT,CFG_DRIVERS_CLK CFG_DT))
733$(eval $(call cfg-depends-all,CFG_DRIVERS_CLK_FIXED,CFG_DRIVERS_CLK_DT))
734
735# When enabled, CFG_DRIVERS_RSTCTRL embeds a reset controller framework in
736# OP-TEE core to provide reset controls on subsystems of the devices.
737CFG_DRIVERS_RSTCTRL ?= n
738
739# The purpose of this flag is to show a print when booting up the device that
740# indicates whether the board runs a standard developer configuration or not.
741# A developer configuration doesn't necessarily has to be secure. The intention
742# is that the one making products based on OP-TEE should override this flag in
743# plat-xxx/conf.mk for the platform they're basing their products on after
744# they've finalized implementing stubbed functionality (see OP-TEE
745# documentation/Porting guidelines) as well as vendor specific security
746# configuration.
747CFG_WARN_INSECURE ?= y
748
749# Enables warnings for declarations mixed with statements
750CFG_WARN_DECL_AFTER_STATEMENT ?= y
751
752# Branch Target Identification (part of the ARMv8.5 Extensions) provides a
753# mechanism to limit the set of locations to which computed branch instructions
754# such as BR or BLR can jump. To make use of BTI in TEE core and ldelf on CPU's
755# that support it, enable this option. A GCC toolchain built with
756# --enable-standard-branch-protection is needed to use this option.
757CFG_CORE_BTI ?= n
758
759$(eval $(call cfg-depends-all,CFG_CORE_BTI,CFG_ARM64_core))
760
761# To make use of BTI in user space libraries and TA's on CPU's that support it,
762# enable this option.
763CFG_TA_BTI ?= $(CFG_CORE_BTI)
764
765$(eval $(call cfg-depends-all,CFG_TA_BTI,CFG_ARM64_core))
766
767ifeq (y-y,$(CFG_VIRTUALIZATION)-$(call cfg-one-enabled, CFG_TA_BTI CFG_CORE_BTI))
768$(error CFG_VIRTUALIZATION and BTI are currently incompatible)
769endif
770
771ifeq (y-y,$(CFG_PAGED_USER_TA)-$(CFG_TA_BTI))
772$(error CFG_PAGED_USER_TA and CFG_TA_BTI are currently incompatible)
773endif
774
775# CFG_CORE_ASYNC_NOTIF is defined by the platform to enable enables support
776# for sending asynchronous notifications to normal world. Note that an
777# interrupt ID must be configurged by the platform too. Currently is only
778# CFG_CORE_ASYNC_NOTIF_GIC_INTID defined.
779CFG_CORE_ASYNC_NOTIF ?= n
780
781$(eval $(call cfg-enable-all-depends,CFG_MEMPOOL_REPORT_LAST_OFFSET, \
782	 CFG_WITH_STATS))
783