1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2 /*
3  * Copyright (c) 2018 Microsemi Corporation
4  */
5 
6 #ifndef _MSCC_MIIM_H_
7 #define _MSCC_MIIM_H_
8 
9 struct mscc_miim_dev {
10 	void __iomem *regs;
11 	phys_addr_t miim_base;
12 	unsigned long miim_size;
13 	struct mii_dev *bus;
14 };
15 
16 int mscc_miim_read(struct mii_dev *bus, int addr, int devad, int reg);
17 int mscc_miim_write(struct mii_dev *bus, int addr, int devad, int reg, u16 val);
18 
19 struct mii_dev *mscc_mdiobus_init(struct mscc_miim_dev *miim, int *miim_count,
20 				  phys_addr_t miim_base,
21 				  unsigned long miim_size);
22 
23 
24 #endif /* _MSCC_MIIM_H_ */
25