1// SPDX-License-Identifier: GPL-2.0+ OR X11
2/*
3 * P1010RDB Device Tree Source
4 *
5 * Copyright 2020 NXP
6 */
7/ {
8	aliases {
9		spi0 = &espi0;
10	};
11};
12
13&soc {
14	mdio@24000 {
15		phy0: ethernet-phy@0 {
16			reg = <0x1>;
17		};
18
19		phy1: ethernet-phy@1 {
20			reg = <0x0>;
21		};
22
23		phy2: ethernet-phy@2 {
24			reg = <0x2>;
25		};
26
27		tbi-phy@3 {
28			device_type = "tbi-phy";
29			reg = <0x3>;
30		};
31	};
32
33	mdio@25000 {
34		tbi0: tbi-phy@11 {
35			reg = <0x11>;
36			device_type = "tbi-phy";
37		};
38	};
39
40	mdio@26000 {
41		tbi1: tbi-phy@11 {
42			reg = <0x11>;
43			device_type = "tbi-phy";
44		};
45	};
46
47	enet0: ethernet@b0000 {
48		phy-handle = <&phy0>;
49		phy-connection-type = "rgmii-id";
50	};
51
52	enet1: ethernet@b1000 {
53		phy-handle = <&phy1>;
54		tbi-handle = <&tbi0>;
55		phy-connection-type = "sgmii";
56	};
57
58	enet2: ethernet@b2000 {
59		phy-handle = <&phy2>;
60		tbi-handle = <&tbi1>;
61		phy-connection-type = "sgmii";
62	};
63
64	i2c@3000 {
65		rtc@68 {
66			compatible = "pericom,pt7c4338";
67			reg = <0x68>;
68		};
69	};
70
71	spi@7000 {
72		status = "okay";
73		flash@0 {
74			compatible = "jedec,spi-nor";
75			#address-cells = <1>;
76			#size-cells = <1>;
77			reg = <0>;
78			spi-max-frequency = <10000000>; /* input clock */
79		};
80	};
81};
82