1/* 2 * Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7#include <arch.h> 8#include <asm_macros.S> 9#include <bl1/bl1.h> 10#include <common/bl_common.h> 11#include <context.h> 12 13/* ----------------------------------------------------------------------------- 14 * File contains an EL2 equivalent of the EL3 vector table from: 15 * .../bl1/aarch64/bl1_exceptions.S 16 * ----------------------------------------------------------------------------- 17 */ 18 19/* ----------------------------------------------------------------------------- 20 * Very simple stackless exception handlers used by BL1. 21 * ----------------------------------------------------------------------------- 22 */ 23 .globl bl1_exceptions 24 25vector_base bl1_exceptions 26 27 /* ----------------------------------------------------- 28 * Current EL with SP0 : 0x0 - 0x200 29 * ----------------------------------------------------- 30 */ 31vector_entry SynchronousExceptionSP0 32 mov x0, #SYNC_EXCEPTION_SP_EL0 33 bl plat_report_exception 34 no_ret plat_panic_handler 35end_vector_entry SynchronousExceptionSP0 36 37vector_entry IrqSP0 38 mov x0, #IRQ_SP_EL0 39 bl plat_report_exception 40 no_ret plat_panic_handler 41end_vector_entry IrqSP0 42 43vector_entry FiqSP0 44 mov x0, #FIQ_SP_EL0 45 bl plat_report_exception 46 no_ret plat_panic_handler 47end_vector_entry FiqSP0 48 49vector_entry SErrorSP0 50 mov x0, #SERROR_SP_EL0 51 bl plat_report_exception 52 no_ret plat_panic_handler 53end_vector_entry SErrorSP0 54 55 /* ----------------------------------------------------- 56 * Current EL with SPx: 0x200 - 0x400 57 * ----------------------------------------------------- 58 */ 59vector_entry SynchronousExceptionSPx 60 mov x0, #SYNC_EXCEPTION_SP_ELX 61 bl plat_report_exception 62 no_ret plat_panic_handler 63end_vector_entry SynchronousExceptionSPx 64 65vector_entry IrqSPx 66 mov x0, #IRQ_SP_ELX 67 bl plat_report_exception 68 no_ret plat_panic_handler 69end_vector_entry IrqSPx 70 71vector_entry FiqSPx 72 mov x0, #FIQ_SP_ELX 73 bl plat_report_exception 74 no_ret plat_panic_handler 75end_vector_entry FiqSPx 76 77vector_entry SErrorSPx 78 mov x0, #SERROR_SP_ELX 79 bl plat_report_exception 80 no_ret plat_panic_handler 81end_vector_entry SErrorSPx 82 83 /* ----------------------------------------------------- 84 * Lower EL using AArch64 : 0x400 - 0x600 85 * ----------------------------------------------------- 86 */ 87vector_entry SynchronousExceptionA64 88 /* The current v8-R64 implementation does not support conduit calls */ 89 b el2_panic 90end_vector_entry SynchronousExceptionA64 91 92vector_entry IrqA64 93 mov x0, #IRQ_AARCH64 94 bl plat_report_exception 95 no_ret plat_panic_handler 96end_vector_entry IrqA64 97 98vector_entry FiqA64 99 mov x0, #FIQ_AARCH64 100 bl plat_report_exception 101 no_ret plat_panic_handler 102end_vector_entry FiqA64 103 104vector_entry SErrorA64 105 mov x0, #SERROR_AARCH64 106 bl plat_report_exception 107 no_ret plat_panic_handler 108end_vector_entry SErrorA64 109 110 111unexpected_sync_exception: 112 mov x0, #SYNC_EXCEPTION_AARCH64 113 bl plat_report_exception 114 no_ret plat_panic_handler 115 116 /* ----------------------------------------------------- 117 * Save Secure/Normal world context and jump to 118 * BL1 SMC handler. 119 * ----------------------------------------------------- 120 */ 121