1 /*
2  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <platform_def.h>
8 
9 #include <drivers/arm/gicv2.h>
10 #include <plat/arm/common/plat_arm.h>
11 #include <plat/common/platform.h>
12 
13 /******************************************************************************
14  * The following functions are defined as weak to allow a platform to override
15  * the way the GICv2 driver is initialised and used.
16  *****************************************************************************/
17 #pragma weak plat_arm_gic_driver_init
18 #pragma weak plat_arm_gic_init
19 #pragma weak plat_arm_gic_cpuif_enable
20 #pragma weak plat_arm_gic_cpuif_disable
21 #pragma weak plat_arm_gic_pcpu_init
22 
23 /******************************************************************************
24  * On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
25  * interrupts.
26  *****************************************************************************/
27 static const interrupt_prop_t arm_interrupt_props[] = {
28 	PLAT_ARM_G1S_IRQ_PROPS(GICV2_INTR_GROUP0),
29 	PLAT_ARM_G0_IRQ_PROPS(GICV2_INTR_GROUP0)
30 };
31 
32 static unsigned int target_mask_array[PLATFORM_CORE_COUNT];
33 
34 static const gicv2_driver_data_t arm_gic_data = {
35 	.gicd_base = PLAT_ARM_GICD_BASE,
36 	.gicc_base = PLAT_ARM_GICC_BASE,
37 	.interrupt_props = arm_interrupt_props,
38 	.interrupt_props_num = ARRAY_SIZE(arm_interrupt_props),
39 	.target_masks = target_mask_array,
40 	.target_masks_num = ARRAY_SIZE(target_mask_array),
41 };
42 
43 /******************************************************************************
44  * ARM common helper to initialize the GICv2 only driver.
45  *****************************************************************************/
plat_arm_gic_driver_init(void)46 void plat_arm_gic_driver_init(void)
47 {
48 	gicv2_driver_init(&arm_gic_data);
49 }
50 
plat_arm_gic_init(void)51 void plat_arm_gic_init(void)
52 {
53 	gicv2_distif_init();
54 	gicv2_pcpu_distif_init();
55 	gicv2_set_pe_target_mask(plat_my_core_pos());
56 	gicv2_cpuif_enable();
57 }
58 
59 /******************************************************************************
60  * ARM common helper to enable the GICv2 CPU interface
61  *****************************************************************************/
plat_arm_gic_cpuif_enable(void)62 void plat_arm_gic_cpuif_enable(void)
63 {
64 	gicv2_cpuif_enable();
65 }
66 
67 /******************************************************************************
68  * ARM common helper to disable the GICv2 CPU interface
69  *****************************************************************************/
plat_arm_gic_cpuif_disable(void)70 void plat_arm_gic_cpuif_disable(void)
71 {
72 	gicv2_cpuif_disable();
73 }
74 
75 /******************************************************************************
76  * ARM common helper to initialize the per cpu distributor interface in GICv2
77  *****************************************************************************/
plat_arm_gic_pcpu_init(void)78 void plat_arm_gic_pcpu_init(void)
79 {
80 	gicv2_pcpu_distif_init();
81 	gicv2_set_pe_target_mask(plat_my_core_pos());
82 }
83 
84 /******************************************************************************
85  * Stubs for Redistributor power management. Although GICv2 doesn't have
86  * Redistributor interface, these are provided for the sake of uniform GIC API
87  *****************************************************************************/
plat_arm_gic_redistif_on(void)88 void plat_arm_gic_redistif_on(void)
89 {
90 	return;
91 }
92 
plat_arm_gic_redistif_off(void)93 void plat_arm_gic_redistif_off(void)
94 {
95 	return;
96 }
97 
98 
99 /******************************************************************************
100  * ARM common helper to save & restore the GICv3 on resume from system suspend.
101  * The normal world currently takes care of saving and restoring the GICv2
102  * registers due to legacy reasons. Hence we just initialize the Distributor
103  * on resume from system suspend.
104  *****************************************************************************/
plat_arm_gic_save(void)105 void plat_arm_gic_save(void)
106 {
107 	return;
108 }
109 
plat_arm_gic_resume(void)110 void plat_arm_gic_resume(void)
111 {
112 	gicv2_distif_init();
113 	gicv2_pcpu_distif_init();
114 }
115