1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7745 SoC 4 * 5 * Copyright (C) 2016-2017 Cogent Embedded Inc. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a7745-cpg-mssr.h> 11#include <dt-bindings/power/r8a7745-sysc.h> 12 13/ { 14 compatible = "renesas,r8a7745"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 aliases { 19 i2c0 = &i2c0; 20 i2c1 = &i2c1; 21 i2c2 = &i2c2; 22 i2c3 = &i2c3; 23 i2c4 = &i2c4; 24 i2c5 = &i2c5; 25 i2c6 = &iic0; 26 i2c7 = &iic1; 27 spi0 = &qspi; 28 spi1 = &msiof0; 29 spi2 = &msiof1; 30 spi3 = &msiof2; 31 vin0 = &vin0; 32 vin1 = &vin1; 33 }; 34 35 /* 36 * The external audio clocks are configured as 0 Hz fixed 37 * frequency clocks by default. Boards that provide audio 38 * clocks should override them. 39 */ 40 audio_clka: audio_clka { 41 compatible = "fixed-clock"; 42 #clock-cells = <0>; 43 clock-frequency = <0>; 44 }; 45 audio_clkb: audio_clkb { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 audio_clkc: audio_clkc { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 /* This value must be overridden by the board. */ 61 clock-frequency = <0>; 62 }; 63 64 cpus { 65 #address-cells = <1>; 66 #size-cells = <0>; 67 68 cpu0: cpu@0 { 69 device_type = "cpu"; 70 compatible = "arm,cortex-a7"; 71 reg = <0>; 72 clock-frequency = <1000000000>; 73 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>; 74 power-domains = <&sysc R8A7745_PD_CA7_CPU0>; 75 enable-method = "renesas,apmu"; 76 next-level-cache = <&L2_CA7>; 77 }; 78 79 cpu1: cpu@1 { 80 device_type = "cpu"; 81 compatible = "arm,cortex-a7"; 82 reg = <1>; 83 clock-frequency = <1000000000>; 84 clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>; 85 power-domains = <&sysc R8A7745_PD_CA7_CPU1>; 86 enable-method = "renesas,apmu"; 87 next-level-cache = <&L2_CA7>; 88 }; 89 90 L2_CA7: cache-controller-0 { 91 compatible = "cache"; 92 cache-unified; 93 cache-level = <2>; 94 power-domains = <&sysc R8A7745_PD_CA7_SCU>; 95 }; 96 }; 97 98 /* External root clock */ 99 extal_clk: extal { 100 compatible = "fixed-clock"; 101 #clock-cells = <0>; 102 /* This value must be overridden by the board. */ 103 clock-frequency = <0>; 104 }; 105 106 pmu { 107 compatible = "arm,cortex-a7-pmu"; 108 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>, 109 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 110 interrupt-affinity = <&cpu0>, <&cpu1>; 111 }; 112 113 /* External SCIF clock */ 114 scif_clk: scif { 115 compatible = "fixed-clock"; 116 #clock-cells = <0>; 117 /* This value must be overridden by the board. */ 118 clock-frequency = <0>; 119 }; 120 121 soc { 122 compatible = "simple-bus"; 123 interrupt-parent = <&gic>; 124 125 #address-cells = <2>; 126 #size-cells = <2>; 127 ranges; 128 129 gpio0: gpio@e6050000 { 130 compatible = "renesas,gpio-r8a7745", 131 "renesas,rcar-gen2-gpio"; 132 reg = <0 0xe6050000 0 0x50>; 133 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 134 #gpio-cells = <2>; 135 gpio-controller; 136 gpio-ranges = <&pfc 0 0 32>; 137 #interrupt-cells = <2>; 138 interrupt-controller; 139 clocks = <&cpg CPG_MOD 912>; 140 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 141 resets = <&cpg 912>; 142 }; 143 144 gpio1: gpio@e6051000 { 145 compatible = "renesas,gpio-r8a7745", 146 "renesas,rcar-gen2-gpio"; 147 reg = <0 0xe6051000 0 0x50>; 148 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 149 #gpio-cells = <2>; 150 gpio-controller; 151 gpio-ranges = <&pfc 0 32 26>; 152 #interrupt-cells = <2>; 153 interrupt-controller; 154 clocks = <&cpg CPG_MOD 911>; 155 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 156 resets = <&cpg 911>; 157 }; 158 159 gpio2: gpio@e6052000 { 160 compatible = "renesas,gpio-r8a7745", 161 "renesas,rcar-gen2-gpio"; 162 reg = <0 0xe6052000 0 0x50>; 163 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 164 #gpio-cells = <2>; 165 gpio-controller; 166 gpio-ranges = <&pfc 0 64 32>; 167 #interrupt-cells = <2>; 168 interrupt-controller; 169 clocks = <&cpg CPG_MOD 910>; 170 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 171 resets = <&cpg 910>; 172 }; 173 174 gpio3: gpio@e6053000 { 175 compatible = "renesas,gpio-r8a7745", 176 "renesas,rcar-gen2-gpio"; 177 reg = <0 0xe6053000 0 0x50>; 178 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 179 #gpio-cells = <2>; 180 gpio-controller; 181 gpio-ranges = <&pfc 0 96 32>; 182 #interrupt-cells = <2>; 183 interrupt-controller; 184 clocks = <&cpg CPG_MOD 909>; 185 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 186 resets = <&cpg 909>; 187 }; 188 189 gpio4: gpio@e6054000 { 190 compatible = "renesas,gpio-r8a7745", 191 "renesas,rcar-gen2-gpio"; 192 reg = <0 0xe6054000 0 0x50>; 193 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 194 #gpio-cells = <2>; 195 gpio-controller; 196 gpio-ranges = <&pfc 0 128 32>; 197 #interrupt-cells = <2>; 198 interrupt-controller; 199 clocks = <&cpg CPG_MOD 908>; 200 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 201 resets = <&cpg 908>; 202 }; 203 204 gpio5: gpio@e6055000 { 205 compatible = "renesas,gpio-r8a7745", 206 "renesas,rcar-gen2-gpio"; 207 reg = <0 0xe6055000 0 0x50>; 208 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 209 #gpio-cells = <2>; 210 gpio-controller; 211 gpio-ranges = <&pfc 0 160 28>; 212 #interrupt-cells = <2>; 213 interrupt-controller; 214 clocks = <&cpg CPG_MOD 907>; 215 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 216 resets = <&cpg 907>; 217 }; 218 219 gpio6: gpio@e6055400 { 220 compatible = "renesas,gpio-r8a7745", 221 "renesas,rcar-gen2-gpio"; 222 reg = <0 0xe6055400 0 0x50>; 223 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 224 #gpio-cells = <2>; 225 gpio-controller; 226 gpio-ranges = <&pfc 0 192 26>; 227 #interrupt-cells = <2>; 228 interrupt-controller; 229 clocks = <&cpg CPG_MOD 905>; 230 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 231 resets = <&cpg 905>; 232 }; 233 234 pfc: pinctrl@e6060000 { 235 compatible = "renesas,pfc-r8a7745"; 236 reg = <0 0xe6060000 0 0x11c>; 237 }; 238 239 tpu: pwm@e60f0000 { 240 compatible = "renesas,tpu-r8a7745", "renesas,tpu"; 241 reg = <0 0xe60f0000 0 0x148>; 242 clocks = <&cpg CPG_MOD 304>; 243 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 244 resets = <&cpg 304>; 245 #pwm-cells = <3>; 246 status = "disabled"; 247 }; 248 249 cpg: clock-controller@e6150000 { 250 compatible = "renesas,r8a7745-cpg-mssr"; 251 reg = <0 0xe6150000 0 0x1000>; 252 clocks = <&extal_clk>, <&usb_extal_clk>; 253 clock-names = "extal", "usb_extal"; 254 #clock-cells = <2>; 255 #power-domain-cells = <0>; 256 #reset-cells = <1>; 257 }; 258 259 apmu@e6151000 { 260 compatible = "renesas,r8a7745-apmu", "renesas,apmu"; 261 reg = <0 0xe6151000 0 0x188>; 262 cpus = <&cpu0>, <&cpu1>; 263 }; 264 265 rst: reset-controller@e6160000 { 266 compatible = "renesas,r8a7745-rst"; 267 reg = <0 0xe6160000 0 0x100>; 268 }; 269 270 rwdt: watchdog@e6020000 { 271 compatible = "renesas,r8a7745-wdt", 272 "renesas,rcar-gen2-wdt"; 273 reg = <0 0xe6020000 0 0x0c>; 274 clocks = <&cpg CPG_MOD 402>; 275 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 276 resets = <&cpg 402>; 277 status = "disabled"; 278 }; 279 280 sysc: system-controller@e6180000 { 281 compatible = "renesas,r8a7745-sysc"; 282 reg = <0 0xe6180000 0 0x200>; 283 #power-domain-cells = <1>; 284 }; 285 286 irqc: interrupt-controller@e61c0000 { 287 compatible = "renesas,irqc-r8a7745", "renesas,irqc"; 288 #interrupt-cells = <2>; 289 interrupt-controller; 290 reg = <0 0xe61c0000 0 0x200>; 291 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 292 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 293 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 294 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 295 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 296 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 297 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 298 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 300 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 301 clocks = <&cpg CPG_MOD 407>; 302 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 303 resets = <&cpg 407>; 304 }; 305 306 ipmmu_sy0: iommu@e6280000 { 307 compatible = "renesas,ipmmu-r8a7745", 308 "renesas,ipmmu-vmsa"; 309 reg = <0 0xe6280000 0 0x1000>; 310 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, 311 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 312 #iommu-cells = <1>; 313 status = "disabled"; 314 }; 315 316 ipmmu_sy1: iommu@e6290000 { 317 compatible = "renesas,ipmmu-r8a7745", 318 "renesas,ipmmu-vmsa"; 319 reg = <0 0xe6290000 0 0x1000>; 320 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; 321 #iommu-cells = <1>; 322 status = "disabled"; 323 }; 324 325 ipmmu_ds: iommu@e6740000 { 326 compatible = "renesas,ipmmu-r8a7745", 327 "renesas,ipmmu-vmsa"; 328 reg = <0 0xe6740000 0 0x1000>; 329 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, 330 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; 331 #iommu-cells = <1>; 332 status = "disabled"; 333 }; 334 335 ipmmu_mp: iommu@ec680000 { 336 compatible = "renesas,ipmmu-r8a7745", 337 "renesas,ipmmu-vmsa"; 338 reg = <0 0xec680000 0 0x1000>; 339 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; 340 #iommu-cells = <1>; 341 status = "disabled"; 342 }; 343 344 ipmmu_mx: iommu@fe951000 { 345 compatible = "renesas,ipmmu-r8a7745", 346 "renesas,ipmmu-vmsa"; 347 reg = <0 0xfe951000 0 0x1000>; 348 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 349 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; 350 #iommu-cells = <1>; 351 status = "disabled"; 352 }; 353 354 ipmmu_gp: iommu@e62a0000 { 355 compatible = "renesas,ipmmu-r8a7745", 356 "renesas,ipmmu-vmsa"; 357 reg = <0 0xe62a0000 0 0x1000>; 358 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; 360 #iommu-cells = <1>; 361 status = "disabled"; 362 }; 363 364 icram0: sram@e63a0000 { 365 compatible = "mmio-sram"; 366 reg = <0 0xe63a0000 0 0x12000>; 367 #address-cells = <1>; 368 #size-cells = <1>; 369 ranges = <0 0 0xe63a0000 0x12000>; 370 }; 371 372 icram1: sram@e63c0000 { 373 compatible = "mmio-sram"; 374 reg = <0 0xe63c0000 0 0x1000>; 375 #address-cells = <1>; 376 #size-cells = <1>; 377 ranges = <0 0 0xe63c0000 0x1000>; 378 379 smp-sram@0 { 380 compatible = "renesas,smp-sram"; 381 reg = <0 0x100>; 382 }; 383 }; 384 385 icram2: sram@e6300000 { 386 compatible = "mmio-sram"; 387 reg = <0 0xe6300000 0 0x40000>; 388 #address-cells = <1>; 389 #size-cells = <1>; 390 ranges = <0 0 0xe6300000 0x40000>; 391 }; 392 i2c0: i2c@e6508000 { 393 #address-cells = <1>; 394 #size-cells = <0>; 395 compatible = "renesas,i2c-r8a7745", 396 "renesas,rcar-gen2-i2c"; 397 reg = <0 0xe6508000 0 0x40>; 398 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 399 clocks = <&cpg CPG_MOD 931>; 400 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 401 resets = <&cpg 931>; 402 i2c-scl-internal-delay-ns = <6>; 403 status = "disabled"; 404 }; 405 406 i2c1: i2c@e6518000 { 407 #address-cells = <1>; 408 #size-cells = <0>; 409 compatible = "renesas,i2c-r8a7745", 410 "renesas,rcar-gen2-i2c"; 411 reg = <0 0xe6518000 0 0x40>; 412 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 413 clocks = <&cpg CPG_MOD 930>; 414 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 415 resets = <&cpg 930>; 416 i2c-scl-internal-delay-ns = <6>; 417 status = "disabled"; 418 }; 419 420 i2c2: i2c@e6530000 { 421 #address-cells = <1>; 422 #size-cells = <0>; 423 compatible = "renesas,i2c-r8a7745", 424 "renesas,rcar-gen2-i2c"; 425 reg = <0 0xe6530000 0 0x40>; 426 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 427 clocks = <&cpg CPG_MOD 929>; 428 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 429 resets = <&cpg 929>; 430 i2c-scl-internal-delay-ns = <6>; 431 status = "disabled"; 432 }; 433 434 i2c3: i2c@e6540000 { 435 #address-cells = <1>; 436 #size-cells = <0>; 437 compatible = "renesas,i2c-r8a7745", 438 "renesas,rcar-gen2-i2c"; 439 reg = <0 0xe6540000 0 0x40>; 440 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 441 clocks = <&cpg CPG_MOD 928>; 442 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 443 resets = <&cpg 928>; 444 i2c-scl-internal-delay-ns = <6>; 445 status = "disabled"; 446 }; 447 448 i2c4: i2c@e6520000 { 449 #address-cells = <1>; 450 #size-cells = <0>; 451 compatible = "renesas,i2c-r8a7745", 452 "renesas,rcar-gen2-i2c"; 453 reg = <0 0xe6520000 0 0x40>; 454 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 455 clocks = <&cpg CPG_MOD 927>; 456 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 457 resets = <&cpg 927>; 458 i2c-scl-internal-delay-ns = <6>; 459 status = "disabled"; 460 }; 461 462 i2c5: i2c@e6528000 { 463 #address-cells = <1>; 464 #size-cells = <0>; 465 compatible = "renesas,i2c-r8a7745", 466 "renesas,rcar-gen2-i2c"; 467 reg = <0 0xe6528000 0 0x40>; 468 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 469 clocks = <&cpg CPG_MOD 925>; 470 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 471 resets = <&cpg 925>; 472 i2c-scl-internal-delay-ns = <6>; 473 status = "disabled"; 474 }; 475 476 iic0: i2c@e6500000 { 477 #address-cells = <1>; 478 #size-cells = <0>; 479 compatible = "renesas,iic-r8a7745", 480 "renesas,rcar-gen2-iic", 481 "renesas,rmobile-iic"; 482 reg = <0 0xe6500000 0 0x425>; 483 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 484 clocks = <&cpg CPG_MOD 318>; 485 dmas = <&dmac0 0x61>, <&dmac0 0x62>, 486 <&dmac1 0x61>, <&dmac1 0x62>; 487 dma-names = "tx", "rx", "tx", "rx"; 488 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 489 resets = <&cpg 318>; 490 status = "disabled"; 491 }; 492 493 iic1: i2c@e6510000 { 494 #address-cells = <1>; 495 #size-cells = <0>; 496 compatible = "renesas,iic-r8a7745", 497 "renesas,rcar-gen2-iic", 498 "renesas,rmobile-iic"; 499 reg = <0 0xe6510000 0 0x425>; 500 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 323>; 502 dmas = <&dmac0 0x65>, <&dmac0 0x66>, 503 <&dmac1 0x65>, <&dmac1 0x66>; 504 dma-names = "tx", "rx", "tx", "rx"; 505 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 506 resets = <&cpg 323>; 507 status = "disabled"; 508 }; 509 510 hsusb: usb@e6590000 { 511 compatible = "renesas,usbhs-r8a7745", 512 "renesas,rcar-gen2-usbhs"; 513 reg = <0 0xe6590000 0 0x100>; 514 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 515 clocks = <&cpg CPG_MOD 704>; 516 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 517 <&usb_dmac1 0>, <&usb_dmac1 1>; 518 dma-names = "ch0", "ch1", "ch2", "ch3"; 519 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 520 resets = <&cpg 704>; 521 renesas,buswait = <4>; 522 phys = <&usb0 1>; 523 phy-names = "usb"; 524 status = "disabled"; 525 }; 526 527 usbphy: usb-phy@e6590100 { 528 compatible = "renesas,usb-phy-r8a7745", 529 "renesas,rcar-gen2-usb-phy"; 530 reg = <0 0xe6590100 0 0x100>; 531 #address-cells = <1>; 532 #size-cells = <0>; 533 clocks = <&cpg CPG_MOD 704>; 534 clock-names = "usbhs"; 535 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 536 resets = <&cpg 704>; 537 status = "disabled"; 538 539 usb0: usb-channel@0 { 540 reg = <0>; 541 #phy-cells = <1>; 542 }; 543 usb2: usb-channel@2 { 544 reg = <2>; 545 #phy-cells = <1>; 546 }; 547 }; 548 549 usb_dmac0: dma-controller@e65a0000 { 550 compatible = "renesas,r8a7745-usb-dmac", 551 "renesas,usb-dmac"; 552 reg = <0 0xe65a0000 0 0x100>; 553 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 554 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 555 interrupt-names = "ch0", "ch1"; 556 clocks = <&cpg CPG_MOD 330>; 557 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 558 resets = <&cpg 330>; 559 #dma-cells = <1>; 560 dma-channels = <2>; 561 }; 562 563 usb_dmac1: dma-controller@e65b0000 { 564 compatible = "renesas,r8a7745-usb-dmac", 565 "renesas,usb-dmac"; 566 reg = <0 0xe65b0000 0 0x100>; 567 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 568 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 569 interrupt-names = "ch0", "ch1"; 570 clocks = <&cpg CPG_MOD 331>; 571 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 572 resets = <&cpg 331>; 573 #dma-cells = <1>; 574 dma-channels = <2>; 575 }; 576 577 dmac0: dma-controller@e6700000 { 578 compatible = "renesas,dmac-r8a7745", 579 "renesas,rcar-dmac"; 580 reg = <0 0xe6700000 0 0x20000>; 581 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>, 582 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 583 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 584 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 585 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 586 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 587 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 588 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 589 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 590 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 591 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 592 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 593 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 594 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 595 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 596 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; 597 interrupt-names = "error", 598 "ch0", "ch1", "ch2", "ch3", 599 "ch4", "ch5", "ch6", "ch7", 600 "ch8", "ch9", "ch10", "ch11", 601 "ch12", "ch13", "ch14"; 602 clocks = <&cpg CPG_MOD 219>; 603 clock-names = "fck"; 604 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 605 resets = <&cpg 219>; 606 #dma-cells = <1>; 607 dma-channels = <15>; 608 }; 609 610 dmac1: dma-controller@e6720000 { 611 compatible = "renesas,dmac-r8a7745", 612 "renesas,rcar-dmac"; 613 reg = <0 0xe6720000 0 0x20000>; 614 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 615 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 616 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 617 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 618 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 619 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 620 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 621 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 622 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 623 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 624 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 625 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 626 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 627 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 628 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 629 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>; 630 interrupt-names = "error", 631 "ch0", "ch1", "ch2", "ch3", 632 "ch4", "ch5", "ch6", "ch7", 633 "ch8", "ch9", "ch10", "ch11", 634 "ch12", "ch13", "ch14"; 635 clocks = <&cpg CPG_MOD 218>; 636 clock-names = "fck"; 637 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 638 resets = <&cpg 218>; 639 #dma-cells = <1>; 640 dma-channels = <15>; 641 }; 642 643 avb: ethernet@e6800000 { 644 compatible = "renesas,etheravb-r8a7745", 645 "renesas,etheravb-rcar-gen2"; 646 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; 647 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; 648 clocks = <&cpg CPG_MOD 812>; 649 clock-names = "fck"; 650 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 651 resets = <&cpg 812>; 652 #address-cells = <1>; 653 #size-cells = <0>; 654 status = "disabled"; 655 }; 656 657 qspi: spi@e6b10000 { 658 compatible = "renesas,qspi-r8a7745", "renesas,qspi"; 659 reg = <0 0xe6b10000 0 0x2c>; 660 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 661 clocks = <&cpg CPG_MOD 917>; 662 dmas = <&dmac0 0x17>, <&dmac0 0x18>, 663 <&dmac1 0x17>, <&dmac1 0x18>; 664 dma-names = "tx", "rx", "tx", "rx"; 665 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 666 num-cs = <1>; 667 #address-cells = <1>; 668 #size-cells = <0>; 669 resets = <&cpg 917>; 670 status = "disabled"; 671 }; 672 673 scifa0: serial@e6c40000 { 674 compatible = "renesas,scifa-r8a7745", 675 "renesas,rcar-gen2-scifa", "renesas,scifa"; 676 reg = <0 0xe6c40000 0 0x40>; 677 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 678 clocks = <&cpg CPG_MOD 204>; 679 clock-names = "fck"; 680 dmas = <&dmac0 0x21>, <&dmac0 0x22>, 681 <&dmac1 0x21>, <&dmac1 0x22>; 682 dma-names = "tx", "rx", "tx", "rx"; 683 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 684 resets = <&cpg 204>; 685 status = "disabled"; 686 }; 687 688 scifa1: serial@e6c50000 { 689 compatible = "renesas,scifa-r8a7745", 690 "renesas,rcar-gen2-scifa", "renesas,scifa"; 691 reg = <0 0xe6c50000 0 0x40>; 692 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 693 clocks = <&cpg CPG_MOD 203>; 694 clock-names = "fck"; 695 dmas = <&dmac0 0x25>, <&dmac0 0x26>, 696 <&dmac1 0x25>, <&dmac1 0x26>; 697 dma-names = "tx", "rx", "tx", "rx"; 698 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 699 resets = <&cpg 203>; 700 status = "disabled"; 701 }; 702 703 scifa2: serial@e6c60000 { 704 compatible = "renesas,scifa-r8a7745", 705 "renesas,rcar-gen2-scifa", "renesas,scifa"; 706 reg = <0 0xe6c60000 0 0x40>; 707 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 708 clocks = <&cpg CPG_MOD 202>; 709 clock-names = "fck"; 710 dmas = <&dmac0 0x27>, <&dmac0 0x28>, 711 <&dmac1 0x27>, <&dmac1 0x28>; 712 dma-names = "tx", "rx", "tx", "rx"; 713 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 714 resets = <&cpg 202>; 715 status = "disabled"; 716 }; 717 718 scifa3: serial@e6c70000 { 719 compatible = "renesas,scifa-r8a7745", 720 "renesas,rcar-gen2-scifa", "renesas,scifa"; 721 reg = <0 0xe6c70000 0 0x40>; 722 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 723 clocks = <&cpg CPG_MOD 1106>; 724 clock-names = "fck"; 725 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, 726 <&dmac1 0x1b>, <&dmac1 0x1c>; 727 dma-names = "tx", "rx", "tx", "rx"; 728 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 729 resets = <&cpg 1106>; 730 status = "disabled"; 731 }; 732 733 scifa4: serial@e6c78000 { 734 compatible = "renesas,scifa-r8a7745", 735 "renesas,rcar-gen2-scifa", "renesas,scifa"; 736 reg = <0 0xe6c78000 0 0x40>; 737 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 738 clocks = <&cpg CPG_MOD 1107>; 739 clock-names = "fck"; 740 dmas = <&dmac0 0x1f>, <&dmac0 0x20>, 741 <&dmac1 0x1f>, <&dmac1 0x20>; 742 dma-names = "tx", "rx", "tx", "rx"; 743 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 744 resets = <&cpg 1107>; 745 status = "disabled"; 746 }; 747 748 scifa5: serial@e6c80000 { 749 compatible = "renesas,scifa-r8a7745", 750 "renesas,rcar-gen2-scifa", "renesas,scifa"; 751 reg = <0 0xe6c80000 0 0x40>; 752 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 753 clocks = <&cpg CPG_MOD 1108>; 754 clock-names = "fck"; 755 dmas = <&dmac0 0x23>, <&dmac0 0x24>, 756 <&dmac1 0x23>, <&dmac1 0x24>; 757 dma-names = "tx", "rx", "tx", "rx"; 758 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 759 resets = <&cpg 1108>; 760 status = "disabled"; 761 }; 762 763 scifb0: serial@e6c20000 { 764 compatible = "renesas,scifb-r8a7745", 765 "renesas,rcar-gen2-scifb", "renesas,scifb"; 766 reg = <0 0xe6c20000 0 0x100>; 767 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 768 clocks = <&cpg CPG_MOD 206>; 769 clock-names = "fck"; 770 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, 771 <&dmac1 0x3d>, <&dmac1 0x3e>; 772 dma-names = "tx", "rx", "tx", "rx"; 773 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 774 resets = <&cpg 206>; 775 status = "disabled"; 776 }; 777 778 scifb1: serial@e6c30000 { 779 compatible = "renesas,scifb-r8a7745", 780 "renesas,rcar-gen2-scifb", "renesas,scifb"; 781 reg = <0 0xe6c30000 0 0x100>; 782 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 783 clocks = <&cpg CPG_MOD 207>; 784 clock-names = "fck"; 785 dmas = <&dmac0 0x19>, <&dmac0 0x1a>, 786 <&dmac1 0x19>, <&dmac1 0x1a>; 787 dma-names = "tx", "rx", "tx", "rx"; 788 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 789 resets = <&cpg 207>; 790 status = "disabled"; 791 }; 792 793 scifb2: serial@e6ce0000 { 794 compatible = "renesas,scifb-r8a7745", 795 "renesas,rcar-gen2-scifb", "renesas,scifb"; 796 reg = <0 0xe6ce0000 0 0x100>; 797 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 798 clocks = <&cpg CPG_MOD 216>; 799 clock-names = "fck"; 800 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, 801 <&dmac1 0x1d>, <&dmac1 0x1e>; 802 dma-names = "tx", "rx", "tx", "rx"; 803 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 804 resets = <&cpg 216>; 805 status = "disabled"; 806 }; 807 808 scif0: serial@e6e60000 { 809 compatible = "renesas,scif-r8a7745", 810 "renesas,rcar-gen2-scif", "renesas,scif"; 811 reg = <0 0xe6e60000 0 0x40>; 812 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 813 clocks = <&cpg CPG_MOD 721>, 814 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 815 clock-names = "fck", "brg_int", "scif_clk"; 816 dmas = <&dmac0 0x29>, <&dmac0 0x2a>, 817 <&dmac1 0x29>, <&dmac1 0x2a>; 818 dma-names = "tx", "rx", "tx", "rx"; 819 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 820 resets = <&cpg 721>; 821 status = "disabled"; 822 }; 823 824 scif1: serial@e6e68000 { 825 compatible = "renesas,scif-r8a7745", 826 "renesas,rcar-gen2-scif", "renesas,scif"; 827 reg = <0 0xe6e68000 0 0x40>; 828 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 829 clocks = <&cpg CPG_MOD 720>, 830 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 831 clock-names = "fck", "brg_int", "scif_clk"; 832 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, 833 <&dmac1 0x2d>, <&dmac1 0x2e>; 834 dma-names = "tx", "rx", "tx", "rx"; 835 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 836 resets = <&cpg 720>; 837 status = "disabled"; 838 }; 839 840 scif2: serial@e6e58000 { 841 compatible = "renesas,scif-r8a7745", 842 "renesas,rcar-gen2-scif", "renesas,scif"; 843 reg = <0 0xe6e58000 0 0x40>; 844 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 845 clocks = <&cpg CPG_MOD 719>, 846 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 847 clock-names = "fck", "brg_int", "scif_clk"; 848 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, 849 <&dmac1 0x2b>, <&dmac1 0x2c>; 850 dma-names = "tx", "rx", "tx", "rx"; 851 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 852 resets = <&cpg 719>; 853 status = "disabled"; 854 }; 855 856 scif3: serial@e6ea8000 { 857 compatible = "renesas,scif-r8a7745", 858 "renesas,rcar-gen2-scif", "renesas,scif"; 859 reg = <0 0xe6ea8000 0 0x40>; 860 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 861 clocks = <&cpg CPG_MOD 718>, 862 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 863 clock-names = "fck", "brg_int", "scif_clk"; 864 dmas = <&dmac0 0x2f>, <&dmac0 0x30>, 865 <&dmac1 0x2f>, <&dmac1 0x30>; 866 dma-names = "tx", "rx", "tx", "rx"; 867 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 868 resets = <&cpg 718>; 869 status = "disabled"; 870 }; 871 872 scif4: serial@e6ee0000 { 873 compatible = "renesas,scif-r8a7745", 874 "renesas,rcar-gen2-scif", "renesas,scif"; 875 reg = <0 0xe6ee0000 0 0x40>; 876 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 877 clocks = <&cpg CPG_MOD 715>, 878 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 879 clock-names = "fck", "brg_int", "scif_clk"; 880 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, 881 <&dmac1 0xfb>, <&dmac1 0xfc>; 882 dma-names = "tx", "rx", "tx", "rx"; 883 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 884 resets = <&cpg 715>; 885 status = "disabled"; 886 }; 887 888 scif5: serial@e6ee8000 { 889 compatible = "renesas,scif-r8a7745", 890 "renesas,rcar-gen2-scif", "renesas,scif"; 891 reg = <0 0xe6ee8000 0 0x40>; 892 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 893 clocks = <&cpg CPG_MOD 714>, 894 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 895 clock-names = "fck", "brg_int", "scif_clk"; 896 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, 897 <&dmac1 0xfd>, <&dmac1 0xfe>; 898 dma-names = "tx", "rx", "tx", "rx"; 899 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 900 resets = <&cpg 714>; 901 status = "disabled"; 902 }; 903 904 hscif0: serial@e62c0000 { 905 compatible = "renesas,hscif-r8a7745", 906 "renesas,rcar-gen2-hscif", "renesas,hscif"; 907 reg = <0 0xe62c0000 0 0x60>; 908 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 909 clocks = <&cpg CPG_MOD 717>, 910 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 911 clock-names = "fck", "brg_int", "scif_clk"; 912 dmas = <&dmac0 0x39>, <&dmac0 0x3a>, 913 <&dmac1 0x39>, <&dmac1 0x3a>; 914 dma-names = "tx", "rx", "tx", "rx"; 915 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 916 resets = <&cpg 717>; 917 status = "disabled"; 918 }; 919 920 hscif1: serial@e62c8000 { 921 compatible = "renesas,hscif-r8a7745", 922 "renesas,rcar-gen2-hscif", "renesas,hscif"; 923 reg = <0 0xe62c8000 0 0x60>; 924 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 925 clocks = <&cpg CPG_MOD 716>, 926 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 927 clock-names = "fck", "brg_int", "scif_clk"; 928 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, 929 <&dmac1 0x4d>, <&dmac1 0x4e>; 930 dma-names = "tx", "rx", "tx", "rx"; 931 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 932 resets = <&cpg 716>; 933 status = "disabled"; 934 }; 935 936 hscif2: serial@e62d0000 { 937 compatible = "renesas,hscif-r8a7745", 938 "renesas,rcar-gen2-hscif", "renesas,hscif"; 939 reg = <0 0xe62d0000 0 0x60>; 940 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 941 clocks = <&cpg CPG_MOD 713>, 942 <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; 943 clock-names = "fck", "brg_int", "scif_clk"; 944 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, 945 <&dmac1 0x3b>, <&dmac1 0x3c>; 946 dma-names = "tx", "rx", "tx", "rx"; 947 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 948 resets = <&cpg 713>; 949 status = "disabled"; 950 }; 951 952 msiof0: spi@e6e20000 { 953 compatible = "renesas,msiof-r8a7745", 954 "renesas,rcar-gen2-msiof"; 955 reg = <0 0xe6e20000 0 0x0064>; 956 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 957 clocks = <&cpg CPG_MOD 000>; 958 dmas = <&dmac0 0x51>, <&dmac0 0x52>, 959 <&dmac1 0x51>, <&dmac1 0x52>; 960 dma-names = "tx", "rx", "tx", "rx"; 961 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 962 #address-cells = <1>; 963 #size-cells = <0>; 964 resets = <&cpg 000>; 965 status = "disabled"; 966 }; 967 968 msiof1: spi@e6e10000 { 969 compatible = "renesas,msiof-r8a7745", 970 "renesas,rcar-gen2-msiof"; 971 reg = <0 0xe6e10000 0 0x0064>; 972 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 973 clocks = <&cpg CPG_MOD 208>; 974 dmas = <&dmac0 0x55>, <&dmac0 0x56>, 975 <&dmac1 0x55>, <&dmac1 0x56>; 976 dma-names = "tx", "rx", "tx", "rx"; 977 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 978 #address-cells = <1>; 979 #size-cells = <0>; 980 resets = <&cpg 208>; 981 status = "disabled"; 982 }; 983 984 msiof2: spi@e6e00000 { 985 compatible = "renesas,msiof-r8a7745", 986 "renesas,rcar-gen2-msiof"; 987 reg = <0 0xe6e00000 0 0x0064>; 988 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 989 clocks = <&cpg CPG_MOD 205>; 990 dmas = <&dmac0 0x41>, <&dmac0 0x42>, 991 <&dmac1 0x41>, <&dmac1 0x42>; 992 dma-names = "tx", "rx", "tx", "rx"; 993 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 994 #address-cells = <1>; 995 #size-cells = <0>; 996 resets = <&cpg 205>; 997 status = "disabled"; 998 }; 999 1000 pwm0: pwm@e6e30000 { 1001 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1002 reg = <0 0xe6e30000 0 0x8>; 1003 clocks = <&cpg CPG_MOD 523>; 1004 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1005 resets = <&cpg 523>; 1006 #pwm-cells = <2>; 1007 status = "disabled"; 1008 }; 1009 1010 pwm1: pwm@e6e31000 { 1011 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1012 reg = <0 0xe6e31000 0 0x8>; 1013 clocks = <&cpg CPG_MOD 523>; 1014 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1015 resets = <&cpg 523>; 1016 #pwm-cells = <2>; 1017 status = "disabled"; 1018 }; 1019 1020 pwm2: pwm@e6e32000 { 1021 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1022 reg = <0 0xe6e32000 0 0x8>; 1023 clocks = <&cpg CPG_MOD 523>; 1024 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1025 resets = <&cpg 523>; 1026 #pwm-cells = <2>; 1027 status = "disabled"; 1028 }; 1029 1030 pwm3: pwm@e6e33000 { 1031 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1032 reg = <0 0xe6e33000 0 0x8>; 1033 clocks = <&cpg CPG_MOD 523>; 1034 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1035 resets = <&cpg 523>; 1036 #pwm-cells = <2>; 1037 status = "disabled"; 1038 }; 1039 1040 pwm4: pwm@e6e34000 { 1041 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1042 reg = <0 0xe6e34000 0 0x8>; 1043 clocks = <&cpg CPG_MOD 523>; 1044 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1045 resets = <&cpg 523>; 1046 #pwm-cells = <2>; 1047 status = "disabled"; 1048 }; 1049 1050 pwm5: pwm@e6e35000 { 1051 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1052 reg = <0 0xe6e35000 0 0x8>; 1053 clocks = <&cpg CPG_MOD 523>; 1054 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1055 resets = <&cpg 523>; 1056 #pwm-cells = <2>; 1057 status = "disabled"; 1058 }; 1059 1060 pwm6: pwm@e6e36000 { 1061 compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; 1062 reg = <0 0xe6e36000 0 0x8>; 1063 clocks = <&cpg CPG_MOD 523>; 1064 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1065 resets = <&cpg 523>; 1066 #pwm-cells = <2>; 1067 status = "disabled"; 1068 }; 1069 1070 can0: can@e6e80000 { 1071 compatible = "renesas,can-r8a7745", 1072 "renesas,rcar-gen2-can"; 1073 reg = <0 0xe6e80000 0 0x1000>; 1074 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1075 clocks = <&cpg CPG_MOD 916>, 1076 <&cpg CPG_CORE R8A7745_CLK_RCAN>, 1077 <&can_clk>; 1078 clock-names = "clkp1", "clkp2", "can_clk"; 1079 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1080 resets = <&cpg 916>; 1081 status = "disabled"; 1082 }; 1083 1084 can1: can@e6e88000 { 1085 compatible = "renesas,can-r8a7745", 1086 "renesas,rcar-gen2-can"; 1087 reg = <0 0xe6e88000 0 0x1000>; 1088 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1089 clocks = <&cpg CPG_MOD 915>, 1090 <&cpg CPG_CORE R8A7745_CLK_RCAN>, 1091 <&can_clk>; 1092 clock-names = "clkp1", "clkp2", "can_clk"; 1093 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1094 resets = <&cpg 915>; 1095 status = "disabled"; 1096 }; 1097 1098 vin0: video@e6ef0000 { 1099 compatible = "renesas,vin-r8a7745", 1100 "renesas,rcar-gen2-vin"; 1101 reg = <0 0xe6ef0000 0 0x1000>; 1102 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1103 clocks = <&cpg CPG_MOD 811>; 1104 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1105 resets = <&cpg 811>; 1106 status = "disabled"; 1107 }; 1108 1109 vin1: video@e6ef1000 { 1110 compatible = "renesas,vin-r8a7745", 1111 "renesas,rcar-gen2-vin"; 1112 reg = <0 0xe6ef1000 0 0x1000>; 1113 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1114 clocks = <&cpg CPG_MOD 810>; 1115 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1116 resets = <&cpg 810>; 1117 status = "disabled"; 1118 }; 1119 1120 rcar_sound: sound@ec500000 { 1121 /* 1122 * #sound-dai-cells is required 1123 * 1124 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1125 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1126 */ 1127 compatible = "renesas,rcar_sound-r8a7745", 1128 "renesas,rcar_sound-gen2"; 1129 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1130 <0 0xec5a0000 0 0x100>, /* ADG */ 1131 <0 0xec540000 0 0x1000>, /* SSIU */ 1132 <0 0xec541000 0 0x280>, /* SSI */ 1133 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri */ 1134 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1135 1136 clocks = <&cpg CPG_MOD 1005>, 1137 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1138 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1139 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1140 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1141 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1142 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, 1143 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, 1144 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>, 1145 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1146 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, 1147 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1148 <&audio_clka>, <&audio_clkb>, <&audio_clkc>, 1149 <&cpg CPG_CORE R8A7745_CLK_M2>; 1150 clock-names = "ssi-all", 1151 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1152 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1153 "ssi.1", "ssi.0", 1154 "src.6", "src.5", "src.4", "src.3", 1155 "src.2", "src.1", 1156 "ctu.0", "ctu.1", 1157 "mix.0", "mix.1", 1158 "dvc.0", "dvc.1", 1159 "clk_a", "clk_b", "clk_c", "clk_i"; 1160 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1161 resets = <&cpg 1005>, 1162 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, 1163 <&cpg 1009>, <&cpg 1010>, <&cpg 1011>, 1164 <&cpg 1012>, <&cpg 1013>, <&cpg 1014>, 1165 <&cpg 1015>; 1166 reset-names = "ssi-all", 1167 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1168 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1169 "ssi.1", "ssi.0"; 1170 1171 status = "disabled"; 1172 1173 rcar_sound,dvc { 1174 dvc0: dvc-0 { 1175 dmas = <&audma0 0xbc>; 1176 dma-names = "tx"; 1177 }; 1178 dvc1: dvc-1 { 1179 dmas = <&audma0 0xbe>; 1180 dma-names = "tx"; 1181 }; 1182 }; 1183 1184 rcar_sound,mix { 1185 mix0: mix-0 { }; 1186 mix1: mix-1 { }; 1187 }; 1188 1189 rcar_sound,ctu { 1190 ctu00: ctu-0 { }; 1191 ctu01: ctu-1 { }; 1192 ctu02: ctu-2 { }; 1193 ctu03: ctu-3 { }; 1194 ctu10: ctu-4 { }; 1195 ctu11: ctu-5 { }; 1196 ctu12: ctu-6 { }; 1197 ctu13: ctu-7 { }; 1198 }; 1199 1200 rcar_sound,src { 1201 src-0 { 1202 status = "disabled"; 1203 }; 1204 src1: src-1 { 1205 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1206 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1207 dma-names = "rx", "tx"; 1208 }; 1209 src2: src-2 { 1210 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1211 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1212 dma-names = "rx", "tx"; 1213 }; 1214 src3: src-3 { 1215 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1216 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1217 dma-names = "rx", "tx"; 1218 }; 1219 src4: src-4 { 1220 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1221 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1222 dma-names = "rx", "tx"; 1223 }; 1224 src5: src-5 { 1225 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1226 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1227 dma-names = "rx", "tx"; 1228 }; 1229 src6: src-6 { 1230 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1231 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1232 dma-names = "rx", "tx"; 1233 }; 1234 }; 1235 1236 rcar_sound,ssi { 1237 ssi0: ssi-0 { 1238 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1239 dmas = <&audma0 0x01>, <&audma0 0x02>, 1240 <&audma0 0x15>, <&audma0 0x16>; 1241 dma-names = "rx", "tx", "rxu", "txu"; 1242 }; 1243 ssi1: ssi-1 { 1244 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1245 dmas = <&audma0 0x03>, <&audma0 0x04>, 1246 <&audma0 0x49>, <&audma0 0x4a>; 1247 dma-names = "rx", "tx", "rxu", "txu"; 1248 }; 1249 ssi2: ssi-2 { 1250 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1251 dmas = <&audma0 0x05>, <&audma0 0x06>, 1252 <&audma0 0x63>, <&audma0 0x64>; 1253 dma-names = "rx", "tx", "rxu", "txu"; 1254 }; 1255 ssi3: ssi-3 { 1256 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1257 dmas = <&audma0 0x07>, <&audma0 0x08>, 1258 <&audma0 0x6f>, <&audma0 0x70>; 1259 dma-names = "rx", "tx", "rxu", "txu"; 1260 }; 1261 ssi4: ssi-4 { 1262 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1263 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1264 <&audma0 0x71>, <&audma0 0x72>; 1265 dma-names = "rx", "tx", "rxu", "txu"; 1266 }; 1267 ssi5: ssi-5 { 1268 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1269 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1270 <&audma0 0x73>, <&audma0 0x74>; 1271 dma-names = "rx", "tx", "rxu", "txu"; 1272 }; 1273 ssi6: ssi-6 { 1274 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1275 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1276 <&audma0 0x75>, <&audma0 0x76>; 1277 dma-names = "rx", "tx", "rxu", "txu"; 1278 }; 1279 ssi7: ssi-7 { 1280 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1281 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1282 <&audma0 0x79>, <&audma0 0x7a>; 1283 dma-names = "rx", "tx", "rxu", "txu"; 1284 }; 1285 ssi8: ssi-8 { 1286 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1287 dmas = <&audma0 0x11>, <&audma0 0x12>, 1288 <&audma0 0x7b>, <&audma0 0x7c>; 1289 dma-names = "rx", "tx", "rxu", "txu"; 1290 }; 1291 ssi9: ssi-9 { 1292 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1293 dmas = <&audma0 0x13>, <&audma0 0x14>, 1294 <&audma0 0x7d>, <&audma0 0x7e>; 1295 dma-names = "rx", "tx", "rxu", "txu"; 1296 }; 1297 }; 1298 }; 1299 1300 audma0: dma-controller@ec700000 { 1301 compatible = "renesas,dmac-r8a7745", 1302 "renesas,rcar-dmac"; 1303 reg = <0 0xec700000 0 0x10000>; 1304 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 1305 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1306 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1307 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1308 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1309 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1310 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1311 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1312 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1313 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1314 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1315 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1316 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1317 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; 1318 interrupt-names = "error", 1319 "ch0", "ch1", "ch2", "ch3", 1320 "ch4", "ch5", "ch6", "ch7", 1321 "ch8", "ch9", "ch10", "ch11", 1322 "ch12"; 1323 clocks = <&cpg CPG_MOD 502>; 1324 clock-names = "fck"; 1325 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1326 resets = <&cpg 502>; 1327 #dma-cells = <1>; 1328 dma-channels = <13>; 1329 }; 1330 1331 pci0: pci@ee090000 { 1332 compatible = "renesas,pci-r8a7745", 1333 "renesas,pci-rcar-gen2"; 1334 device_type = "pci"; 1335 reg = <0 0xee090000 0 0xc00>, 1336 <0 0xee080000 0 0x1100>; 1337 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1338 clocks = <&cpg CPG_MOD 703>; 1339 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1340 resets = <&cpg 703>; 1341 status = "disabled"; 1342 1343 bus-range = <0 0>; 1344 #address-cells = <3>; 1345 #size-cells = <2>; 1346 #interrupt-cells = <1>; 1347 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; 1348 interrupt-map-mask = <0xf800 0 0 0x7>; 1349 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1350 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1351 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1352 1353 usb@1,0 { 1354 reg = <0x800 0 0 0 0>; 1355 phys = <&usb0 0>; 1356 phy-names = "usb"; 1357 }; 1358 1359 usb@2,0 { 1360 reg = <0x1000 0 0 0 0>; 1361 phys = <&usb0 0>; 1362 phy-names = "usb"; 1363 }; 1364 }; 1365 1366 pci1: pci@ee0d0000 { 1367 compatible = "renesas,pci-r8a7745", 1368 "renesas,pci-rcar-gen2"; 1369 device_type = "pci"; 1370 reg = <0 0xee0d0000 0 0xc00>, 1371 <0 0xee0c0000 0 0x1100>; 1372 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1373 clocks = <&cpg CPG_MOD 703>; 1374 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1375 resets = <&cpg 703>; 1376 status = "disabled"; 1377 1378 bus-range = <1 1>; 1379 #address-cells = <3>; 1380 #size-cells = <2>; 1381 #interrupt-cells = <1>; 1382 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; 1383 interrupt-map-mask = <0xf800 0 0 0x7>; 1384 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1385 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1386 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 1387 1388 usb@1,0 { 1389 reg = <0x10800 0 0 0 0>; 1390 phys = <&usb2 0>; 1391 phy-names = "usb"; 1392 }; 1393 1394 usb@2,0 { 1395 reg = <0x11000 0 0 0 0>; 1396 phys = <&usb2 0>; 1397 phy-names = "usb"; 1398 }; 1399 }; 1400 1401 sdhi0: mmc@ee100000 { 1402 compatible = "renesas,sdhi-r8a7745", 1403 "renesas,rcar-gen2-sdhi"; 1404 reg = <0 0xee100000 0 0x328>; 1405 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1406 clocks = <&cpg CPG_MOD 314>; 1407 dmas = <&dmac0 0xcd>, <&dmac0 0xce>, 1408 <&dmac1 0xcd>, <&dmac1 0xce>; 1409 dma-names = "tx", "rx", "tx", "rx"; 1410 max-frequency = <195000000>; 1411 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1412 resets = <&cpg 314>; 1413 status = "disabled"; 1414 }; 1415 1416 sdhi1: mmc@ee140000 { 1417 compatible = "renesas,sdhi-r8a7745", 1418 "renesas,rcar-gen2-sdhi"; 1419 reg = <0 0xee140000 0 0x100>; 1420 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1421 clocks = <&cpg CPG_MOD 312>; 1422 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, 1423 <&dmac1 0xc1>, <&dmac1 0xc2>; 1424 dma-names = "tx", "rx", "tx", "rx"; 1425 max-frequency = <97500000>; 1426 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1427 resets = <&cpg 312>; 1428 status = "disabled"; 1429 }; 1430 1431 sdhi2: mmc@ee160000 { 1432 compatible = "renesas,sdhi-r8a7745", 1433 "renesas,rcar-gen2-sdhi"; 1434 reg = <0 0xee160000 0 0x100>; 1435 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1436 clocks = <&cpg CPG_MOD 311>; 1437 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, 1438 <&dmac1 0xd3>, <&dmac1 0xd4>; 1439 dma-names = "tx", "rx", "tx", "rx"; 1440 max-frequency = <97500000>; 1441 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1442 resets = <&cpg 311>; 1443 status = "disabled"; 1444 }; 1445 1446 mmcif0: mmc@ee200000 { 1447 compatible = "renesas,mmcif-r8a7745", 1448 "renesas,sh-mmcif"; 1449 reg = <0 0xee200000 0 0x80>; 1450 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 1451 clocks = <&cpg CPG_MOD 315>; 1452 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, 1453 <&dmac1 0xd1>, <&dmac1 0xd2>; 1454 dma-names = "tx", "rx", "tx", "rx"; 1455 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1456 resets = <&cpg 315>; 1457 reg-io-width = <4>; 1458 max-frequency = <97500000>; 1459 status = "disabled"; 1460 }; 1461 1462 ether: ethernet@ee700000 { 1463 compatible = "renesas,ether-r8a7745", 1464 "renesas,rcar-gen2-ether"; 1465 reg = <0 0xee700000 0 0x400>; 1466 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; 1467 clocks = <&cpg CPG_MOD 813>; 1468 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1469 resets = <&cpg 813>; 1470 phy-mode = "rmii"; 1471 #address-cells = <1>; 1472 #size-cells = <0>; 1473 status = "disabled"; 1474 }; 1475 1476 gic: interrupt-controller@f1001000 { 1477 compatible = "arm,gic-400"; 1478 #interrupt-cells = <3>; 1479 #address-cells = <0>; 1480 interrupt-controller; 1481 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>, 1482 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>; 1483 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1484 clocks = <&cpg CPG_MOD 408>; 1485 clock-names = "clk"; 1486 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1487 resets = <&cpg 408>; 1488 }; 1489 1490 vsp@fe928000 { 1491 compatible = "renesas,vsp1"; 1492 reg = <0 0xfe928000 0 0x8000>; 1493 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; 1494 clocks = <&cpg CPG_MOD 131>; 1495 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1496 resets = <&cpg 131>; 1497 }; 1498 1499 vsp@fe930000 { 1500 compatible = "renesas,vsp1"; 1501 reg = <0 0xfe930000 0 0x8000>; 1502 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1503 clocks = <&cpg CPG_MOD 128>; 1504 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1505 resets = <&cpg 128>; 1506 }; 1507 1508 du: display@feb00000 { 1509 compatible = "renesas,du-r8a7745"; 1510 reg = <0 0xfeb00000 0 0x40000>; 1511 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1512 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1513 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1514 clock-names = "du.0", "du.1"; 1515 resets = <&cpg 724>; 1516 reset-names = "du.0"; 1517 status = "disabled"; 1518 1519 ports { 1520 #address-cells = <1>; 1521 #size-cells = <0>; 1522 1523 port@0 { 1524 reg = <0>; 1525 du_out_rgb0: endpoint { 1526 }; 1527 }; 1528 port@1 { 1529 reg = <1>; 1530 du_out_rgb1: endpoint { 1531 }; 1532 }; 1533 }; 1534 }; 1535 1536 prr: chipid@ff000044 { 1537 compatible = "renesas,prr"; 1538 reg = <0 0xff000044 0 4>; 1539 }; 1540 1541 cmt0: timer@ffca0000 { 1542 compatible = "renesas,r8a7745-cmt0", 1543 "renesas,rcar-gen2-cmt0"; 1544 reg = <0 0xffca0000 0 0x1004>; 1545 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 1546 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 1547 clocks = <&cpg CPG_MOD 124>; 1548 clock-names = "fck"; 1549 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1550 resets = <&cpg 124>; 1551 status = "disabled"; 1552 }; 1553 1554 cmt1: timer@e6130000 { 1555 compatible = "renesas,r8a7745-cmt1", 1556 "renesas,rcar-gen2-cmt1"; 1557 reg = <0 0xe6130000 0 0x1004>; 1558 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 1559 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 1560 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 1561 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 1562 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 1563 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 1564 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 1565 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 1566 clocks = <&cpg CPG_MOD 329>; 1567 clock-names = "fck"; 1568 power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; 1569 resets = <&cpg 329>; 1570 status = "disabled"; 1571 }; 1572 }; 1573 1574 timer { 1575 compatible = "arm,armv7-timer"; 1576 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1577 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1578 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1579 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1580 }; 1581 1582 /* External USB clock - can be overridden by the board */ 1583 usb_extal_clk: usb_extal { 1584 compatible = "fixed-clock"; 1585 #clock-cells = <0>; 1586 clock-frequency = <48000000>; 1587 }; 1588}; 1589