1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com> 4 */ 5#define USB_CLASS_HUB 9 6 7#include "rockchip-u-boot.dtsi" 8 9/ { 10 aliases { 11 mmc0 = &sdhci; 12 mmc1 = &sdmmc; 13 pci0 = &pcie0; 14 spi1 = &spi1; 15 }; 16 17 cic: syscon@ff620000 { 18 u-boot,dm-pre-reloc; 19 compatible = "rockchip,rk3399-cic", "syscon"; 20 reg = <0x0 0xff620000 0x0 0x100>; 21 }; 22 23 dfi: dfi@ff630000 { 24 u-boot,dm-pre-reloc; 25 reg = <0x00 0xff630000 0x00 0x4000>; 26 compatible = "rockchip,rk3399-dfi"; 27 rockchip,pmu = <&pmugrf>; 28 clocks = <&cru PCLK_DDR_MON>; 29 clock-names = "pclk_ddr_mon"; 30 }; 31 32 rng: rng@ff8b8000 { 33 compatible = "rockchip,cryptov1-rng"; 34 reg = <0x0 0xff8b8000 0x0 0x1000>; 35 status = "okay"; 36 }; 37 38 dmc: dmc { 39 u-boot,dm-pre-reloc; 40 compatible = "rockchip,rk3399-dmc"; 41 devfreq-events = <&dfi>; 42 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>; 43 clocks = <&cru SCLK_DDRCLK>; 44 clock-names = "dmc_clk"; 45 reg = <0x0 0xffa80000 0x0 0x0800 46 0x0 0xffa80800 0x0 0x1800 47 0x0 0xffa82000 0x0 0x2000 48 0x0 0xffa84000 0x0 0x1000 49 0x0 0xffa88000 0x0 0x0800 50 0x0 0xffa88800 0x0 0x1800 51 0x0 0xffa8a000 0x0 0x2000 52 0x0 0xffa8c000 0x0 0x1000>; 53 }; 54 55 pmusgrf: syscon@ff330000 { 56 u-boot,dm-pre-reloc; 57 compatible = "rockchip,rk3399-pmusgrf", "syscon"; 58 reg = <0x0 0xff330000 0x0 0xe3d4>; 59 }; 60 61}; 62 63#ifdef CONFIG_ROCKCHIP_SPI_IMAGE 64&binman { 65 rom { 66 filename = "u-boot.rom"; 67 size = <0x400000>; 68 pad-byte = <0xff>; 69 70 mkimage { 71 args = "-n rk3399 -T rkspi"; 72 u-boot-spl { 73 }; 74 }; 75 u-boot-img { 76 offset = <0x40000>; 77 }; 78 u-boot { 79 offset = <0x300000>; 80 }; 81 fdtmap { 82 }; 83 }; 84}; 85#endif 86 87&cru { 88 u-boot,dm-pre-reloc; 89}; 90 91&grf { 92 u-boot,dm-pre-reloc; 93}; 94 95&pinctrl { 96 u-boot,dm-pre-reloc; 97}; 98 99&pmu { 100 u-boot,dm-pre-reloc; 101}; 102 103&pmugrf { 104 u-boot,dm-pre-reloc; 105}; 106 107&pmu { 108 u-boot,dm-pre-reloc; 109}; 110 111&pmucru { 112 u-boot,dm-pre-reloc; 113}; 114 115&sdhci { 116 max-frequency = <200000000>; 117 u-boot,dm-pre-reloc; 118}; 119 120&sdmmc { 121 u-boot,dm-pre-reloc; 122 123 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */ 124 u-boot,spl-fifo-mode; 125}; 126 127&spi1 { 128 u-boot,dm-pre-reloc; 129}; 130 131&uart0 { 132 u-boot,dm-pre-reloc; 133}; 134 135&uart2 { 136 u-boot,dm-pre-reloc; 137}; 138 139&vopb { 140 u-boot,dm-pre-reloc; 141}; 142 143&vopl { 144 u-boot,dm-pre-reloc; 145}; 146