1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Universal Flash Storage Host controller driver
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
6 *
7 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
10 */
11
12 #ifndef _UFSHCD_H
13 #define _UFSHCD_H
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/delay.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
23 #include <linux/rwsem.h>
24 #include <linux/workqueue.h>
25 #include <linux/errno.h>
26 #include <linux/types.h>
27 #include <linux/wait.h>
28 #include <linux/bitops.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/clk.h>
31 #include <linux/completion.h>
32 #include <linux/regulator/consumer.h>
33 #include <linux/bitfield.h>
34 #include <linux/devfreq.h>
35 #include <linux/blk-crypto-profile.h>
36 #include "unipro.h"
37
38 #include <asm/irq.h>
39 #include <asm/byteorder.h>
40 #include <scsi/scsi.h>
41 #include <scsi/scsi_cmnd.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_dbg.h>
45 #include <scsi/scsi_eh.h>
46
47 #include "ufs.h"
48 #include "ufs_quirks.h"
49 #include "ufshci.h"
50
51 #define UFSHCD "ufshcd"
52 #define UFSHCD_DRIVER_VERSION "0.2"
53
54 struct ufs_hba;
55
56 enum dev_cmd_type {
57 DEV_CMD_TYPE_NOP = 0x0,
58 DEV_CMD_TYPE_QUERY = 0x1,
59 };
60
61 enum ufs_event_type {
62 /* uic specific errors */
63 UFS_EVT_PA_ERR = 0,
64 UFS_EVT_DL_ERR,
65 UFS_EVT_NL_ERR,
66 UFS_EVT_TL_ERR,
67 UFS_EVT_DME_ERR,
68
69 /* fatal errors */
70 UFS_EVT_AUTO_HIBERN8_ERR,
71 UFS_EVT_FATAL_ERR,
72 UFS_EVT_LINK_STARTUP_FAIL,
73 UFS_EVT_RESUME_ERR,
74 UFS_EVT_SUSPEND_ERR,
75 UFS_EVT_WL_SUSP_ERR,
76 UFS_EVT_WL_RES_ERR,
77
78 /* abnormal events */
79 UFS_EVT_DEV_RESET,
80 UFS_EVT_HOST_RESET,
81 UFS_EVT_ABORT,
82
83 UFS_EVT_CNT,
84 };
85
86 /**
87 * struct uic_command - UIC command structure
88 * @command: UIC command
89 * @argument1: UIC command argument 1
90 * @argument2: UIC command argument 2
91 * @argument3: UIC command argument 3
92 * @cmd_active: Indicate if UIC command is outstanding
93 * @done: UIC command completion
94 */
95 struct uic_command {
96 u32 command;
97 u32 argument1;
98 u32 argument2;
99 u32 argument3;
100 int cmd_active;
101 struct completion done;
102 };
103
104 /* Used to differentiate the power management options */
105 enum ufs_pm_op {
106 UFS_RUNTIME_PM,
107 UFS_SYSTEM_PM,
108 UFS_SHUTDOWN_PM,
109 };
110
111 /* Host <-> Device UniPro Link state */
112 enum uic_link_state {
113 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
114 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
115 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
116 UIC_LINK_BROKEN_STATE = 3, /* Link is in broken state */
117 };
118
119 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
120 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
121 UIC_LINK_ACTIVE_STATE)
122 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
123 UIC_LINK_HIBERN8_STATE)
124 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
125 UIC_LINK_BROKEN_STATE)
126 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
127 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
128 UIC_LINK_ACTIVE_STATE)
129 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
130 UIC_LINK_HIBERN8_STATE)
131 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
132 UIC_LINK_BROKEN_STATE)
133
134 #define ufshcd_set_ufs_dev_active(h) \
135 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
136 #define ufshcd_set_ufs_dev_sleep(h) \
137 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
138 #define ufshcd_set_ufs_dev_poweroff(h) \
139 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
140 #define ufshcd_set_ufs_dev_deepsleep(h) \
141 ((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE)
142 #define ufshcd_is_ufs_dev_active(h) \
143 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
144 #define ufshcd_is_ufs_dev_sleep(h) \
145 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
146 #define ufshcd_is_ufs_dev_poweroff(h) \
147 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
148 #define ufshcd_is_ufs_dev_deepsleep(h) \
149 ((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
150
151 /*
152 * UFS Power management levels.
153 * Each level is in increasing order of power savings, except DeepSleep
154 * which is lower than PowerDown with power on but not PowerDown with
155 * power off.
156 */
157 enum ufs_pm_level {
158 UFS_PM_LVL_0,
159 UFS_PM_LVL_1,
160 UFS_PM_LVL_2,
161 UFS_PM_LVL_3,
162 UFS_PM_LVL_4,
163 UFS_PM_LVL_5,
164 UFS_PM_LVL_6,
165 UFS_PM_LVL_MAX
166 };
167
168 struct ufs_pm_lvl_states {
169 enum ufs_dev_pwr_mode dev_state;
170 enum uic_link_state link_state;
171 };
172
173 /**
174 * struct ufshcd_lrb - local reference block
175 * @utr_descriptor_ptr: UTRD address of the command
176 * @ucd_req_ptr: UCD address of the command
177 * @ucd_rsp_ptr: Response UPIU address for this command
178 * @ucd_prdt_ptr: PRDT address of the command
179 * @utrd_dma_addr: UTRD dma address for debug
180 * @ucd_prdt_dma_addr: PRDT dma address for debug
181 * @ucd_rsp_dma_addr: UPIU response dma address for debug
182 * @ucd_req_dma_addr: UPIU request dma address for debug
183 * @cmd: pointer to SCSI command
184 * @sense_buffer: pointer to sense buffer address of the SCSI command
185 * @sense_bufflen: Length of the sense buffer
186 * @scsi_status: SCSI status of the command
187 * @command_type: SCSI, UFS, Query.
188 * @task_tag: Task tag of the command
189 * @lun: LUN of the command
190 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
191 * @issue_time_stamp: time stamp for debug purposes
192 * @compl_time_stamp: time stamp for statistics
193 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
194 * @data_unit_num: the data unit number for the first block for inline crypto
195 * @req_abort_skip: skip request abort task flag
196 */
197 struct ufshcd_lrb {
198 struct utp_transfer_req_desc *utr_descriptor_ptr;
199 struct utp_upiu_req *ucd_req_ptr;
200 struct utp_upiu_rsp *ucd_rsp_ptr;
201 struct ufshcd_sg_entry *ucd_prdt_ptr;
202
203 dma_addr_t utrd_dma_addr;
204 dma_addr_t ucd_req_dma_addr;
205 dma_addr_t ucd_rsp_dma_addr;
206 dma_addr_t ucd_prdt_dma_addr;
207
208 struct scsi_cmnd *cmd;
209 u8 *sense_buffer;
210 unsigned int sense_bufflen;
211 int scsi_status;
212
213 int command_type;
214 int task_tag;
215 u8 lun; /* UPIU LUN id field is only 8-bit wide */
216 bool intr_cmd;
217 ktime_t issue_time_stamp;
218 ktime_t compl_time_stamp;
219 #ifdef CONFIG_SCSI_UFS_CRYPTO
220 int crypto_key_slot;
221 u64 data_unit_num;
222 #endif
223
224 bool req_abort_skip;
225 };
226
227 /**
228 * struct ufs_query - holds relevant data structures for query request
229 * @request: request upiu and function
230 * @descriptor: buffer for sending/receiving descriptor
231 * @response: response upiu and response
232 */
233 struct ufs_query {
234 struct ufs_query_req request;
235 u8 *descriptor;
236 struct ufs_query_res response;
237 };
238
239 /**
240 * struct ufs_dev_cmd - all assosiated fields with device management commands
241 * @type: device management command type - Query, NOP OUT
242 * @lock: lock to allow one command at a time
243 * @complete: internal commands completion
244 */
245 struct ufs_dev_cmd {
246 enum dev_cmd_type type;
247 struct mutex lock;
248 struct completion *complete;
249 struct ufs_query query;
250 };
251
252 /**
253 * struct ufs_clk_info - UFS clock related info
254 * @list: list headed by hba->clk_list_head
255 * @clk: clock node
256 * @name: clock name
257 * @max_freq: maximum frequency supported by the clock
258 * @min_freq: min frequency that can be used for clock scaling
259 * @curr_freq: indicates the current frequency that it is set to
260 * @keep_link_active: indicates that the clk should not be disabled if
261 link is active
262 * @enabled: variable to check against multiple enable/disable
263 */
264 struct ufs_clk_info {
265 struct list_head list;
266 struct clk *clk;
267 const char *name;
268 u32 max_freq;
269 u32 min_freq;
270 u32 curr_freq;
271 bool keep_link_active;
272 bool enabled;
273 };
274
275 enum ufs_notify_change_status {
276 PRE_CHANGE,
277 POST_CHANGE,
278 };
279
280 struct ufs_pa_layer_attr {
281 u32 gear_rx;
282 u32 gear_tx;
283 u32 lane_rx;
284 u32 lane_tx;
285 u32 pwr_rx;
286 u32 pwr_tx;
287 u32 hs_rate;
288 };
289
290 struct ufs_pwr_mode_info {
291 bool is_valid;
292 struct ufs_pa_layer_attr info;
293 };
294
295 /**
296 * struct ufs_hba_variant_ops - variant specific callbacks
297 * @name: variant name
298 * @init: called when the driver is initialized
299 * @exit: called to cleanup everything done in init
300 * @get_ufs_hci_version: called to get UFS HCI version
301 * @clk_scale_notify: notifies that clks are scaled up/down
302 * @setup_clocks: called before touching any of the controller registers
303 * @hce_enable_notify: called before and after HCE enable bit is set to allow
304 * variant specific Uni-Pro initialization.
305 * @link_startup_notify: called before and after Link startup is carried out
306 * to allow variant specific Uni-Pro initialization.
307 * @pwr_change_notify: called before and after a power mode change
308 * is carried out to allow vendor spesific capabilities
309 * to be set.
310 * @setup_xfer_req: called before any transfer request is issued
311 * to set some things
312 * @setup_task_mgmt: called before any task management request is issued
313 * to set some things
314 * @hibern8_notify: called around hibern8 enter/exit
315 * @apply_dev_quirks: called to apply device specific quirks
316 * @suspend: called during host controller PM callback
317 * @resume: called during host controller PM callback
318 * @dbg_register_dump: used to dump controller debug information
319 * @phy_initialization: used to initialize phys
320 * @device_reset: called to issue a reset pulse on the UFS device
321 * @program_key: program or evict an inline encryption key
322 * @event_notify: called to notify important events
323 */
324 struct ufs_hba_variant_ops {
325 const char *name;
326 int (*init)(struct ufs_hba *);
327 void (*exit)(struct ufs_hba *);
328 u32 (*get_ufs_hci_version)(struct ufs_hba *);
329 int (*clk_scale_notify)(struct ufs_hba *, bool,
330 enum ufs_notify_change_status);
331 int (*setup_clocks)(struct ufs_hba *, bool,
332 enum ufs_notify_change_status);
333 int (*hce_enable_notify)(struct ufs_hba *,
334 enum ufs_notify_change_status);
335 int (*link_startup_notify)(struct ufs_hba *,
336 enum ufs_notify_change_status);
337 int (*pwr_change_notify)(struct ufs_hba *,
338 enum ufs_notify_change_status status,
339 struct ufs_pa_layer_attr *,
340 struct ufs_pa_layer_attr *);
341 void (*setup_xfer_req)(struct ufs_hba *, int, bool);
342 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
343 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
344 enum ufs_notify_change_status);
345 int (*apply_dev_quirks)(struct ufs_hba *hba);
346 void (*fixup_dev_quirks)(struct ufs_hba *hba);
347 int (*suspend)(struct ufs_hba *, enum ufs_pm_op,
348 enum ufs_notify_change_status);
349 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
350 void (*dbg_register_dump)(struct ufs_hba *hba);
351 int (*phy_initialization)(struct ufs_hba *);
352 int (*device_reset)(struct ufs_hba *hba);
353 void (*config_scaling_param)(struct ufs_hba *hba,
354 struct devfreq_dev_profile *profile,
355 void *data);
356 int (*program_key)(struct ufs_hba *hba,
357 const union ufs_crypto_cfg_entry *cfg, int slot);
358 void (*event_notify)(struct ufs_hba *hba,
359 enum ufs_event_type evt, void *data);
360 };
361
362 /* clock gating state */
363 enum clk_gating_state {
364 CLKS_OFF,
365 CLKS_ON,
366 REQ_CLKS_OFF,
367 REQ_CLKS_ON,
368 };
369
370 /**
371 * struct ufs_clk_gating - UFS clock gating related info
372 * @gate_work: worker to turn off clocks after some delay as specified in
373 * delay_ms
374 * @ungate_work: worker to turn on clocks that will be used in case of
375 * interrupt context
376 * @state: the current clocks state
377 * @delay_ms: gating delay in ms
378 * @is_suspended: clk gating is suspended when set to 1 which can be used
379 * during suspend/resume
380 * @delay_attr: sysfs attribute to control delay_attr
381 * @enable_attr: sysfs attribute to enable/disable clock gating
382 * @is_enabled: Indicates the current status of clock gating
383 * @is_initialized: Indicates whether clock gating is initialized or not
384 * @active_reqs: number of requests that are pending and should be waited for
385 * completion before gating clocks.
386 */
387 struct ufs_clk_gating {
388 struct delayed_work gate_work;
389 struct work_struct ungate_work;
390 enum clk_gating_state state;
391 unsigned long delay_ms;
392 bool is_suspended;
393 struct device_attribute delay_attr;
394 struct device_attribute enable_attr;
395 bool is_enabled;
396 bool is_initialized;
397 int active_reqs;
398 struct workqueue_struct *clk_gating_workq;
399 };
400
401 struct ufs_saved_pwr_info {
402 struct ufs_pa_layer_attr info;
403 bool is_valid;
404 };
405
406 /**
407 * struct ufs_clk_scaling - UFS clock scaling related data
408 * @active_reqs: number of requests that are pending. If this is zero when
409 * devfreq ->target() function is called then schedule "suspend_work" to
410 * suspend devfreq.
411 * @tot_busy_t: Total busy time in current polling window
412 * @window_start_t: Start time (in jiffies) of the current polling window
413 * @busy_start_t: Start time of current busy period
414 * @enable_attr: sysfs attribute to enable/disable clock scaling
415 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
416 * one keeps track of previous power mode.
417 * @workq: workqueue to schedule devfreq suspend/resume work
418 * @suspend_work: worker to suspend devfreq
419 * @resume_work: worker to resume devfreq
420 * @min_gear: lowest HS gear to scale down to
421 * @is_enabled: tracks if scaling is currently enabled or not, controlled by
422 clkscale_enable sysfs node
423 * @is_allowed: tracks if scaling is currently allowed or not, used to block
424 clock scaling which is not invoked from devfreq governor
425 * @is_initialized: Indicates whether clock scaling is initialized or not
426 * @is_busy_started: tracks if busy period has started or not
427 * @is_suspended: tracks if devfreq is suspended or not
428 */
429 struct ufs_clk_scaling {
430 int active_reqs;
431 unsigned long tot_busy_t;
432 ktime_t window_start_t;
433 ktime_t busy_start_t;
434 struct device_attribute enable_attr;
435 struct ufs_saved_pwr_info saved_pwr_info;
436 struct workqueue_struct *workq;
437 struct work_struct suspend_work;
438 struct work_struct resume_work;
439 u32 min_gear;
440 bool is_enabled;
441 bool is_allowed;
442 bool is_initialized;
443 bool is_busy_started;
444 bool is_suspended;
445 };
446
447 #define UFS_EVENT_HIST_LENGTH 8
448 /**
449 * struct ufs_event_hist - keeps history of errors
450 * @pos: index to indicate cyclic buffer position
451 * @reg: cyclic buffer for registers value
452 * @tstamp: cyclic buffer for time stamp
453 * @cnt: error counter
454 */
455 struct ufs_event_hist {
456 int pos;
457 u32 val[UFS_EVENT_HIST_LENGTH];
458 ktime_t tstamp[UFS_EVENT_HIST_LENGTH];
459 unsigned long long cnt;
460 };
461
462 /**
463 * struct ufs_stats - keeps usage/err statistics
464 * @last_intr_status: record the last interrupt status.
465 * @last_intr_ts: record the last interrupt timestamp.
466 * @hibern8_exit_cnt: Counter to keep track of number of exits,
467 * reset this after link-startup.
468 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
469 * Clear after the first successful command completion.
470 */
471 struct ufs_stats {
472 u32 last_intr_status;
473 ktime_t last_intr_ts;
474
475 u32 hibern8_exit_cnt;
476 ktime_t last_hibern8_exit_tstamp;
477 struct ufs_event_hist event[UFS_EVT_CNT];
478 };
479
480 /**
481 * enum ufshcd_state - UFS host controller state
482 * @UFSHCD_STATE_RESET: Link is not operational. Postpone SCSI command
483 * processing.
484 * @UFSHCD_STATE_OPERATIONAL: The host controller is operational and can process
485 * SCSI commands.
486 * @UFSHCD_STATE_EH_SCHEDULED_NON_FATAL: The error handler has been scheduled.
487 * SCSI commands may be submitted to the controller.
488 * @UFSHCD_STATE_EH_SCHEDULED_FATAL: The error handler has been scheduled. Fail
489 * newly submitted SCSI commands with error code DID_BAD_TARGET.
490 * @UFSHCD_STATE_ERROR: An unrecoverable error occurred, e.g. link recovery
491 * failed. Fail all SCSI commands with error code DID_ERROR.
492 */
493 enum ufshcd_state {
494 UFSHCD_STATE_RESET,
495 UFSHCD_STATE_OPERATIONAL,
496 UFSHCD_STATE_EH_SCHEDULED_NON_FATAL,
497 UFSHCD_STATE_EH_SCHEDULED_FATAL,
498 UFSHCD_STATE_ERROR,
499 };
500
501 enum ufshcd_quirks {
502 /* Interrupt aggregation support is broken */
503 UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0,
504
505 /*
506 * delay before each dme command is required as the unipro
507 * layer has shown instabilities
508 */
509 UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1,
510
511 /*
512 * If UFS host controller is having issue in processing LCC (Line
513 * Control Command) coming from device then enable this quirk.
514 * When this quirk is enabled, host controller driver should disable
515 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
516 * attribute of device to 0).
517 */
518 UFSHCD_QUIRK_BROKEN_LCC = 1 << 2,
519
520 /*
521 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
522 * inbound Link supports unterminated line in HS mode. Setting this
523 * attribute to 1 fixes moving to HS gear.
524 */
525 UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3,
526
527 /*
528 * This quirk needs to be enabled if the host controller only allows
529 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
530 * SLOW AUTO).
531 */
532 UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4,
533
534 /*
535 * This quirk needs to be enabled if the host controller doesn't
536 * advertise the correct version in UFS_VER register. If this quirk
537 * is enabled, standard UFS host driver will call the vendor specific
538 * ops (get_ufs_hci_version) to get the correct version.
539 */
540 UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5,
541
542 /*
543 * Clear handling for transfer/task request list is just opposite.
544 */
545 UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6,
546
547 /*
548 * This quirk needs to be enabled if host controller doesn't allow
549 * that the interrupt aggregation timer and counter are reset by s/w.
550 */
551 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7,
552
553 /*
554 * This quirks needs to be enabled if host controller cannot be
555 * enabled via HCE register.
556 */
557 UFSHCI_QUIRK_BROKEN_HCE = 1 << 8,
558
559 /*
560 * This quirk needs to be enabled if the host controller regards
561 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
562 */
563 UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9,
564
565 /*
566 * This quirk needs to be enabled if the host controller reports
567 * OCS FATAL ERROR with device error through sense data
568 */
569 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10,
570
571 /*
572 * This quirk needs to be enabled if the host controller has
573 * auto-hibernate capability but it doesn't work.
574 */
575 UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11,
576
577 /*
578 * This quirk needs to disable manual flush for write booster
579 */
580 UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12,
581
582 /*
583 * This quirk needs to disable unipro timeout values
584 * before power mode change
585 */
586 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
587
588 /*
589 * This quirk allows only sg entries aligned with page size.
590 */
591 UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE = 1 << 14,
592
593 /*
594 * This quirk needs to be enabled if the host controller does not
595 * support UIC command
596 */
597 UFSHCD_QUIRK_BROKEN_UIC_CMD = 1 << 15,
598
599 /*
600 * This quirk needs to be enabled if the host controller cannot
601 * support physical host configuration.
602 */
603 UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16,
604 };
605
606 enum ufshcd_caps {
607 /* Allow dynamic clk gating */
608 UFSHCD_CAP_CLK_GATING = 1 << 0,
609
610 /* Allow hiberb8 with clk gating */
611 UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1,
612
613 /* Allow dynamic clk scaling */
614 UFSHCD_CAP_CLK_SCALING = 1 << 2,
615
616 /* Allow auto bkops to enabled during runtime suspend */
617 UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3,
618
619 /*
620 * This capability allows host controller driver to use the UFS HCI's
621 * interrupt aggregation capability.
622 * CAUTION: Enabling this might reduce overall UFS throughput.
623 */
624 UFSHCD_CAP_INTR_AGGR = 1 << 4,
625
626 /*
627 * This capability allows the device auto-bkops to be always enabled
628 * except during suspend (both runtime and suspend).
629 * Enabling this capability means that device will always be allowed
630 * to do background operation when it's active but it might degrade
631 * the performance of ongoing read/write operations.
632 */
633 UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
634
635 /*
636 * This capability allows host controller driver to automatically
637 * enable runtime power management by itself instead of waiting
638 * for userspace to control the power management.
639 */
640 UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
641
642 /*
643 * This capability allows the host controller driver to turn-on
644 * WriteBooster, if the underlying device supports it and is
645 * provisioned to be used. This would increase the write performance.
646 */
647 UFSHCD_CAP_WB_EN = 1 << 7,
648
649 /*
650 * This capability allows the host controller driver to use the
651 * inline crypto engine, if it is present
652 */
653 UFSHCD_CAP_CRYPTO = 1 << 8,
654
655 /*
656 * This capability allows the controller regulators to be put into
657 * lpm mode aggressively during clock gating.
658 * This would increase power savings.
659 */
660 UFSHCD_CAP_AGGR_POWER_COLLAPSE = 1 << 9,
661
662 /*
663 * This capability allows the host controller driver to use DeepSleep,
664 * if it is supported by the UFS device. The host controller driver must
665 * support device hardware reset via the hba->device_reset() callback,
666 * in order to exit DeepSleep state.
667 */
668 UFSHCD_CAP_DEEPSLEEP = 1 << 10,
669
670 /*
671 * This capability allows the host controller driver to use temperature
672 * notification if it is supported by the UFS device.
673 */
674 UFSHCD_CAP_TEMP_NOTIF = 1 << 11,
675 };
676
677 struct ufs_hba_variant_params {
678 struct devfreq_dev_profile devfreq_profile;
679 struct devfreq_simple_ondemand_data ondemand_data;
680 u16 hba_enable_delay_us;
681 u32 wb_flush_threshold;
682 };
683
684 #ifdef CONFIG_SCSI_UFS_HPB
685 /**
686 * struct ufshpb_dev_info - UFSHPB device related info
687 * @num_lu: the number of user logical unit to check whether all lu finished
688 * initialization
689 * @rgn_size: device reported HPB region size
690 * @srgn_size: device reported HPB sub-region size
691 * @slave_conf_cnt: counter to check all lu finished initialization
692 * @hpb_disabled: flag to check if HPB is disabled
693 * @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value
694 * @is_legacy: flag to check HPB 1.0
695 * @control_mode: either host or device
696 */
697 struct ufshpb_dev_info {
698 int num_lu;
699 int rgn_size;
700 int srgn_size;
701 atomic_t slave_conf_cnt;
702 bool hpb_disabled;
703 u8 max_hpb_single_cmd;
704 bool is_legacy;
705 u8 control_mode;
706 };
707 #endif
708
709 struct ufs_hba_monitor {
710 unsigned long chunk_size;
711
712 unsigned long nr_sec_rw[2];
713 ktime_t total_busy[2];
714
715 unsigned long nr_req[2];
716 /* latencies*/
717 ktime_t lat_sum[2];
718 ktime_t lat_max[2];
719 ktime_t lat_min[2];
720
721 u32 nr_queued[2];
722 ktime_t busy_start_ts[2];
723
724 ktime_t enabled_ts;
725 bool enabled;
726 };
727
728 /**
729 * struct ufs_hba - per adapter private structure
730 * @mmio_base: UFSHCI base register address
731 * @ucdl_base_addr: UFS Command Descriptor base address
732 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
733 * @utmrdl_base_addr: UTP Task Management Descriptor base address
734 * @ucdl_dma_addr: UFS Command Descriptor DMA address
735 * @utrdl_dma_addr: UTRDL DMA address
736 * @utmrdl_dma_addr: UTMRDL DMA address
737 * @host: Scsi_Host instance of the driver
738 * @dev: device handle
739 * @lrb: local reference block
740 * @cmd_queue: Used to allocate command tags from hba->host->tag_set.
741 * @outstanding_tasks: Bits representing outstanding task requests
742 * @outstanding_lock: Protects @outstanding_reqs.
743 * @outstanding_reqs: Bits representing outstanding transfer requests
744 * @capabilities: UFS Controller Capabilities
745 * @nutrs: Transfer Request Queue depth supported by controller
746 * @nutmrs: Task Management Queue depth supported by controller
747 * @ufs_version: UFS Version to which controller complies
748 * @vops: pointer to variant specific operations
749 * @priv: pointer to variant specific private data
750 * @irq: Irq number of the controller
751 * @active_uic_cmd: handle of active UIC command
752 * @uic_cmd_mutex: mutex for UIC command
753 * @tmf_tag_set: TMF tag set.
754 * @tmf_queue: Used to allocate TMF tags.
755 * @pwr_done: completion for power mode change
756 * @ufshcd_state: UFSHCD state
757 * @eh_flags: Error handling flags
758 * @intr_mask: Interrupt Mask Bits
759 * @ee_ctrl_mask: Exception event control mask
760 * @is_powered: flag to check if HBA is powered
761 * @shutting_down: flag to check if shutdown has been invoked
762 * @host_sem: semaphore used to serialize concurrent contexts
763 * @eh_wq: Workqueue that eh_work works on
764 * @eh_work: Worker to handle UFS errors that require s/w attention
765 * @eeh_work: Worker to handle exception events
766 * @errors: HBA errors
767 * @uic_error: UFS interconnect layer error status
768 * @saved_err: sticky error mask
769 * @saved_uic_err: sticky UIC error mask
770 * @force_reset: flag to force eh_work perform a full reset
771 * @force_pmc: flag to force a power mode change
772 * @silence_err_logs: flag to silence error logs
773 * @dev_cmd: ufs device management command information
774 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
775 * @auto_bkops_enabled: to track whether bkops is enabled in device
776 * @vreg_info: UFS device voltage regulator information
777 * @clk_list_head: UFS host controller clocks list node head
778 * @pwr_info: holds current power mode
779 * @max_pwr_info: keeps the device max valid pwm
780 * @desc_size: descriptor sizes reported by device
781 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
782 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
783 * device is known or not.
784 * @scsi_block_reqs_cnt: reference counting for scsi block requests
785 * @crypto_capabilities: Content of crypto capabilities register (0x100)
786 * @crypto_cap_array: Array of crypto capabilities
787 * @crypto_cfg_register: Start of the crypto cfg array
788 * @crypto_profile: the crypto profile of this hba (if applicable)
789 */
790 struct ufs_hba {
791 void __iomem *mmio_base;
792
793 /* Virtual memory reference */
794 struct utp_transfer_cmd_desc *ucdl_base_addr;
795 struct utp_transfer_req_desc *utrdl_base_addr;
796 struct utp_task_req_desc *utmrdl_base_addr;
797
798 /* DMA memory reference */
799 dma_addr_t ucdl_dma_addr;
800 dma_addr_t utrdl_dma_addr;
801 dma_addr_t utmrdl_dma_addr;
802
803 struct Scsi_Host *host;
804 struct device *dev;
805 struct request_queue *cmd_queue;
806 /*
807 * This field is to keep a reference to "scsi_device" corresponding to
808 * "UFS device" W-LU.
809 */
810 struct scsi_device *sdev_ufs_device;
811 struct scsi_device *sdev_rpmb;
812
813 #ifdef CONFIG_SCSI_UFS_HWMON
814 struct device *hwmon_device;
815 #endif
816
817 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
818 enum uic_link_state uic_link_state;
819 /* Desired UFS power management level during runtime PM */
820 enum ufs_pm_level rpm_lvl;
821 /* Desired UFS power management level during system PM */
822 enum ufs_pm_level spm_lvl;
823 struct device_attribute rpm_lvl_attr;
824 struct device_attribute spm_lvl_attr;
825 int pm_op_in_progress;
826
827 /* Auto-Hibernate Idle Timer register value */
828 u32 ahit;
829
830 struct ufshcd_lrb *lrb;
831
832 unsigned long outstanding_tasks;
833 spinlock_t outstanding_lock;
834 unsigned long outstanding_reqs;
835
836 u32 capabilities;
837 int nutrs;
838 int nutmrs;
839 u32 ufs_version;
840 const struct ufs_hba_variant_ops *vops;
841 struct ufs_hba_variant_params *vps;
842 void *priv;
843 unsigned int irq;
844 bool is_irq_enabled;
845 enum ufs_ref_clk_freq dev_ref_clk_freq;
846
847 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
848
849 /* Device deviations from standard UFS device spec. */
850 unsigned int dev_quirks;
851
852 struct blk_mq_tag_set tmf_tag_set;
853 struct request_queue *tmf_queue;
854 struct request **tmf_rqs;
855
856 struct uic_command *active_uic_cmd;
857 struct mutex uic_cmd_mutex;
858 struct completion *uic_async_done;
859
860 enum ufshcd_state ufshcd_state;
861 u32 eh_flags;
862 u32 intr_mask;
863 u16 ee_ctrl_mask; /* Exception event mask */
864 u16 ee_drv_mask; /* Exception event mask for driver */
865 u16 ee_usr_mask; /* Exception event mask for user (via debugfs) */
866 struct mutex ee_ctrl_mutex;
867 bool is_powered;
868 bool shutting_down;
869 struct semaphore host_sem;
870
871 /* Work Queues */
872 struct workqueue_struct *eh_wq;
873 struct work_struct eh_work;
874 struct work_struct eeh_work;
875
876 /* HBA Errors */
877 u32 errors;
878 u32 uic_error;
879 u32 saved_err;
880 u32 saved_uic_err;
881 struct ufs_stats ufs_stats;
882 bool force_reset;
883 bool force_pmc;
884 bool silence_err_logs;
885
886 /* Device management request data */
887 struct ufs_dev_cmd dev_cmd;
888 ktime_t last_dme_cmd_tstamp;
889 int nop_out_timeout;
890
891 /* Keeps information of the UFS device connected to this host */
892 struct ufs_dev_info dev_info;
893 bool auto_bkops_enabled;
894 struct ufs_vreg_info vreg_info;
895 struct list_head clk_list_head;
896
897 /* Number of requests aborts */
898 int req_abort_count;
899
900 /* Number of lanes available (1 or 2) for Rx/Tx */
901 u32 lanes_per_direction;
902 struct ufs_pa_layer_attr pwr_info;
903 struct ufs_pwr_mode_info max_pwr_info;
904
905 struct ufs_clk_gating clk_gating;
906 /* Control to enable/disable host capabilities */
907 u32 caps;
908
909 struct devfreq *devfreq;
910 struct ufs_clk_scaling clk_scaling;
911 bool is_sys_suspended;
912
913 enum bkops_status urgent_bkops_lvl;
914 bool is_urgent_bkops_lvl_checked;
915
916 struct rw_semaphore clk_scaling_lock;
917 unsigned char desc_size[QUERY_DESC_IDN_MAX];
918 atomic_t scsi_block_reqs_cnt;
919
920 struct device bsg_dev;
921 struct request_queue *bsg_queue;
922 struct delayed_work rpm_dev_flush_recheck_work;
923
924 #ifdef CONFIG_SCSI_UFS_HPB
925 struct ufshpb_dev_info ufshpb_dev;
926 #endif
927
928 struct ufs_hba_monitor monitor;
929
930 #ifdef CONFIG_SCSI_UFS_CRYPTO
931 union ufs_crypto_capabilities crypto_capabilities;
932 union ufs_crypto_cap_entry *crypto_cap_array;
933 u32 crypto_cfg_register;
934 struct blk_crypto_profile crypto_profile;
935 #endif
936 #ifdef CONFIG_DEBUG_FS
937 struct dentry *debugfs_root;
938 struct delayed_work debugfs_ee_work;
939 u32 debugfs_ee_rate_limit_ms;
940 #endif
941 u32 luns_avail;
942 bool complete_put;
943 };
944
945 /* Returns true if clocks can be gated. Otherwise false */
ufshcd_is_clkgating_allowed(struct ufs_hba * hba)946 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
947 {
948 return hba->caps & UFSHCD_CAP_CLK_GATING;
949 }
ufshcd_can_hibern8_during_gating(struct ufs_hba * hba)950 static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
951 {
952 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
953 }
ufshcd_is_clkscaling_supported(struct ufs_hba * hba)954 static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
955 {
956 return hba->caps & UFSHCD_CAP_CLK_SCALING;
957 }
ufshcd_can_autobkops_during_suspend(struct ufs_hba * hba)958 static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
959 {
960 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
961 }
ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba * hba)962 static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
963 {
964 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
965 }
966
ufshcd_is_intr_aggr_allowed(struct ufs_hba * hba)967 static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
968 {
969 return (hba->caps & UFSHCD_CAP_INTR_AGGR) &&
970 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR);
971 }
972
ufshcd_can_aggressive_pc(struct ufs_hba * hba)973 static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba)
974 {
975 return !!(ufshcd_is_link_hibern8(hba) &&
976 (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE));
977 }
978
ufshcd_is_auto_hibern8_supported(struct ufs_hba * hba)979 static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
980 {
981 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) &&
982 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8);
983 }
984
ufshcd_is_auto_hibern8_enabled(struct ufs_hba * hba)985 static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
986 {
987 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
988 }
989
ufshcd_is_wb_allowed(struct ufs_hba * hba)990 static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
991 {
992 return hba->caps & UFSHCD_CAP_WB_EN;
993 }
994
ufshcd_is_user_access_allowed(struct ufs_hba * hba)995 static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
996 {
997 return !hba->shutting_down;
998 }
999
1000 #define ufshcd_writel(hba, val, reg) \
1001 writel((val), (hba)->mmio_base + (reg))
1002 #define ufshcd_readl(hba, reg) \
1003 readl((hba)->mmio_base + (reg))
1004
1005 /**
1006 * ufshcd_rmwl - read modify write into a register
1007 * @hba - per adapter instance
1008 * @mask - mask to apply on read value
1009 * @val - actual value to write
1010 * @reg - register address
1011 */
ufshcd_rmwl(struct ufs_hba * hba,u32 mask,u32 val,u32 reg)1012 static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
1013 {
1014 u32 tmp;
1015
1016 tmp = ufshcd_readl(hba, reg);
1017 tmp &= ~mask;
1018 tmp |= (val & mask);
1019 ufshcd_writel(hba, tmp, reg);
1020 }
1021
1022 int ufshcd_alloc_host(struct device *, struct ufs_hba **);
1023 void ufshcd_dealloc_host(struct ufs_hba *);
1024 int ufshcd_hba_enable(struct ufs_hba *hba);
1025 int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int);
1026 int ufshcd_link_recovery(struct ufs_hba *hba);
1027 int ufshcd_make_hba_operational(struct ufs_hba *hba);
1028 void ufshcd_remove(struct ufs_hba *);
1029 int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
1030 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
1031 void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
1032 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
1033 u32 val, unsigned long interval_us,
1034 unsigned long timeout_ms);
1035 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
1036 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
1037 void ufshcd_hba_stop(struct ufs_hba *hba);
1038 void ufshcd_schedule_eh_work(struct ufs_hba *hba);
1039
check_upiu_size(void)1040 static inline void check_upiu_size(void)
1041 {
1042 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
1043 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
1044 }
1045
1046 /**
1047 * ufshcd_set_variant - set variant specific data to the hba
1048 * @hba - per adapter instance
1049 * @variant - pointer to variant specific data
1050 */
ufshcd_set_variant(struct ufs_hba * hba,void * variant)1051 static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
1052 {
1053 BUG_ON(!hba);
1054 hba->priv = variant;
1055 }
1056
1057 /**
1058 * ufshcd_get_variant - get variant specific data from the hba
1059 * @hba - per adapter instance
1060 */
ufshcd_get_variant(struct ufs_hba * hba)1061 static inline void *ufshcd_get_variant(struct ufs_hba *hba)
1062 {
1063 BUG_ON(!hba);
1064 return hba->priv;
1065 }
ufshcd_keep_autobkops_enabled_except_suspend(struct ufs_hba * hba)1066 static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
1067 struct ufs_hba *hba)
1068 {
1069 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
1070 }
1071
ufshcd_wb_get_query_index(struct ufs_hba * hba)1072 static inline u8 ufshcd_wb_get_query_index(struct ufs_hba *hba)
1073 {
1074 if (hba->dev_info.wb_buffer_type == WB_BUF_MODE_LU_DEDICATED)
1075 return hba->dev_info.wb_dedicated_lu;
1076 return 0;
1077 }
1078
1079 #ifdef CONFIG_SCSI_UFS_HWMON
1080 void ufs_hwmon_probe(struct ufs_hba *hba, u8 mask);
1081 void ufs_hwmon_remove(struct ufs_hba *hba);
1082 void ufs_hwmon_notify_event(struct ufs_hba *hba, u8 ee_mask);
1083 #else
ufs_hwmon_probe(struct ufs_hba * hba,u8 mask)1084 static inline void ufs_hwmon_probe(struct ufs_hba *hba, u8 mask) {}
ufs_hwmon_remove(struct ufs_hba * hba)1085 static inline void ufs_hwmon_remove(struct ufs_hba *hba) {}
ufs_hwmon_notify_event(struct ufs_hba * hba,u8 ee_mask)1086 static inline void ufs_hwmon_notify_event(struct ufs_hba *hba, u8 ee_mask) {}
1087 #endif
1088
1089 #ifdef CONFIG_PM
1090 extern int ufshcd_runtime_suspend(struct device *dev);
1091 extern int ufshcd_runtime_resume(struct device *dev);
1092 #endif
1093 #ifdef CONFIG_PM_SLEEP
1094 extern int ufshcd_system_suspend(struct device *dev);
1095 extern int ufshcd_system_resume(struct device *dev);
1096 #endif
1097 extern int ufshcd_shutdown(struct ufs_hba *hba);
1098 extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
1099 int agreed_gear,
1100 int adapt_val);
1101 extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
1102 u8 attr_set, u32 mib_val, u8 peer);
1103 extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
1104 u32 *mib_val, u8 peer);
1105 extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
1106 struct ufs_pa_layer_attr *desired_pwr_mode);
1107
1108 /* UIC command interfaces for DME primitives */
1109 #define DME_LOCAL 0
1110 #define DME_PEER 1
1111 #define ATTR_SET_NOR 0 /* NORMAL */
1112 #define ATTR_SET_ST 1 /* STATIC */
1113
ufshcd_dme_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1114 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
1115 u32 mib_val)
1116 {
1117 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1118 mib_val, DME_LOCAL);
1119 }
1120
ufshcd_dme_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1121 static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
1122 u32 mib_val)
1123 {
1124 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1125 mib_val, DME_LOCAL);
1126 }
1127
ufshcd_dme_peer_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1128 static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
1129 u32 mib_val)
1130 {
1131 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1132 mib_val, DME_PEER);
1133 }
1134
ufshcd_dme_peer_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1135 static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
1136 u32 mib_val)
1137 {
1138 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1139 mib_val, DME_PEER);
1140 }
1141
ufshcd_dme_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1142 static inline int ufshcd_dme_get(struct ufs_hba *hba,
1143 u32 attr_sel, u32 *mib_val)
1144 {
1145 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
1146 }
1147
ufshcd_dme_peer_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1148 static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
1149 u32 attr_sel, u32 *mib_val)
1150 {
1151 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
1152 }
1153
ufshcd_is_hs_mode(struct ufs_pa_layer_attr * pwr_info)1154 static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
1155 {
1156 return (pwr_info->pwr_rx == FAST_MODE ||
1157 pwr_info->pwr_rx == FASTAUTO_MODE) &&
1158 (pwr_info->pwr_tx == FAST_MODE ||
1159 pwr_info->pwr_tx == FASTAUTO_MODE);
1160 }
1161
ufshcd_disable_host_tx_lcc(struct ufs_hba * hba)1162 static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
1163 {
1164 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
1165 }
1166
1167 /* Expose Query-Request API */
1168 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
1169 enum query_opcode opcode,
1170 enum desc_idn idn, u8 index,
1171 u8 selector,
1172 u8 *desc_buf, int *buf_len);
1173 int ufshcd_read_desc_param(struct ufs_hba *hba,
1174 enum desc_idn desc_id,
1175 int desc_index,
1176 u8 param_offset,
1177 u8 *param_read_buf,
1178 u8 param_size);
1179 int ufshcd_query_attr_retry(struct ufs_hba *hba, enum query_opcode opcode,
1180 enum attr_idn idn, u8 index, u8 selector,
1181 u32 *attr_val);
1182 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
1183 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
1184 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
1185 enum flag_idn idn, u8 index, bool *flag_res);
1186
1187 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
1188 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
1189 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups);
1190 #define SD_ASCII_STD true
1191 #define SD_RAW false
1192 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
1193 u8 **buf, bool ascii);
1194
1195 int ufshcd_hold(struct ufs_hba *hba, bool async);
1196 void ufshcd_release(struct ufs_hba *hba);
1197
1198 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
1199 int *desc_length);
1200
1201 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
1202
1203 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
1204
1205 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
1206 struct utp_upiu_req *req_upiu,
1207 struct utp_upiu_req *rsp_upiu,
1208 int msgcode,
1209 u8 *desc_buff, int *buff_len,
1210 enum query_opcode desc_op);
1211
1212 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable);
1213 int ufshcd_suspend_prepare(struct device *dev);
1214 void ufshcd_resume_complete(struct device *dev);
1215
1216 /* Wrapper functions for safely calling variant operations */
ufshcd_get_var_name(struct ufs_hba * hba)1217 static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
1218 {
1219 if (hba->vops)
1220 return hba->vops->name;
1221 return "";
1222 }
1223
ufshcd_vops_init(struct ufs_hba * hba)1224 static inline int ufshcd_vops_init(struct ufs_hba *hba)
1225 {
1226 if (hba->vops && hba->vops->init)
1227 return hba->vops->init(hba);
1228
1229 return 0;
1230 }
1231
ufshcd_vops_exit(struct ufs_hba * hba)1232 static inline void ufshcd_vops_exit(struct ufs_hba *hba)
1233 {
1234 if (hba->vops && hba->vops->exit)
1235 return hba->vops->exit(hba);
1236 }
1237
ufshcd_vops_get_ufs_hci_version(struct ufs_hba * hba)1238 static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
1239 {
1240 if (hba->vops && hba->vops->get_ufs_hci_version)
1241 return hba->vops->get_ufs_hci_version(hba);
1242
1243 return ufshcd_readl(hba, REG_UFS_VERSION);
1244 }
1245
ufshcd_vops_clk_scale_notify(struct ufs_hba * hba,bool up,enum ufs_notify_change_status status)1246 static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
1247 bool up, enum ufs_notify_change_status status)
1248 {
1249 if (hba->vops && hba->vops->clk_scale_notify)
1250 return hba->vops->clk_scale_notify(hba, up, status);
1251 return 0;
1252 }
1253
ufshcd_vops_event_notify(struct ufs_hba * hba,enum ufs_event_type evt,void * data)1254 static inline void ufshcd_vops_event_notify(struct ufs_hba *hba,
1255 enum ufs_event_type evt,
1256 void *data)
1257 {
1258 if (hba->vops && hba->vops->event_notify)
1259 hba->vops->event_notify(hba, evt, data);
1260 }
1261
ufshcd_vops_setup_clocks(struct ufs_hba * hba,bool on,enum ufs_notify_change_status status)1262 static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
1263 enum ufs_notify_change_status status)
1264 {
1265 if (hba->vops && hba->vops->setup_clocks)
1266 return hba->vops->setup_clocks(hba, on, status);
1267 return 0;
1268 }
1269
ufshcd_vops_hce_enable_notify(struct ufs_hba * hba,bool status)1270 static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
1271 bool status)
1272 {
1273 if (hba->vops && hba->vops->hce_enable_notify)
1274 return hba->vops->hce_enable_notify(hba, status);
1275
1276 return 0;
1277 }
ufshcd_vops_link_startup_notify(struct ufs_hba * hba,bool status)1278 static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
1279 bool status)
1280 {
1281 if (hba->vops && hba->vops->link_startup_notify)
1282 return hba->vops->link_startup_notify(hba, status);
1283
1284 return 0;
1285 }
1286
ufshcd_vops_phy_initialization(struct ufs_hba * hba)1287 static inline int ufshcd_vops_phy_initialization(struct ufs_hba *hba)
1288 {
1289 if (hba->vops && hba->vops->phy_initialization)
1290 return hba->vops->phy_initialization(hba);
1291
1292 return 0;
1293 }
1294
ufshcd_vops_pwr_change_notify(struct ufs_hba * hba,enum ufs_notify_change_status status,struct ufs_pa_layer_attr * dev_max_params,struct ufs_pa_layer_attr * dev_req_params)1295 static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
1296 enum ufs_notify_change_status status,
1297 struct ufs_pa_layer_attr *dev_max_params,
1298 struct ufs_pa_layer_attr *dev_req_params)
1299 {
1300 if (hba->vops && hba->vops->pwr_change_notify)
1301 return hba->vops->pwr_change_notify(hba, status,
1302 dev_max_params, dev_req_params);
1303
1304 return -ENOTSUPP;
1305 }
1306
ufshcd_vops_setup_task_mgmt(struct ufs_hba * hba,int tag,u8 tm_function)1307 static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
1308 int tag, u8 tm_function)
1309 {
1310 if (hba->vops && hba->vops->setup_task_mgmt)
1311 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
1312 }
1313
ufshcd_vops_hibern8_notify(struct ufs_hba * hba,enum uic_cmd_dme cmd,enum ufs_notify_change_status status)1314 static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
1315 enum uic_cmd_dme cmd,
1316 enum ufs_notify_change_status status)
1317 {
1318 if (hba->vops && hba->vops->hibern8_notify)
1319 return hba->vops->hibern8_notify(hba, cmd, status);
1320 }
1321
ufshcd_vops_apply_dev_quirks(struct ufs_hba * hba)1322 static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
1323 {
1324 if (hba->vops && hba->vops->apply_dev_quirks)
1325 return hba->vops->apply_dev_quirks(hba);
1326 return 0;
1327 }
1328
ufshcd_vops_fixup_dev_quirks(struct ufs_hba * hba)1329 static inline void ufshcd_vops_fixup_dev_quirks(struct ufs_hba *hba)
1330 {
1331 if (hba->vops && hba->vops->fixup_dev_quirks)
1332 hba->vops->fixup_dev_quirks(hba);
1333 }
1334
ufshcd_vops_suspend(struct ufs_hba * hba,enum ufs_pm_op op,enum ufs_notify_change_status status)1335 static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op,
1336 enum ufs_notify_change_status status)
1337 {
1338 if (hba->vops && hba->vops->suspend)
1339 return hba->vops->suspend(hba, op, status);
1340
1341 return 0;
1342 }
1343
ufshcd_vops_resume(struct ufs_hba * hba,enum ufs_pm_op op)1344 static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1345 {
1346 if (hba->vops && hba->vops->resume)
1347 return hba->vops->resume(hba, op);
1348
1349 return 0;
1350 }
1351
ufshcd_vops_dbg_register_dump(struct ufs_hba * hba)1352 static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1353 {
1354 if (hba->vops && hba->vops->dbg_register_dump)
1355 hba->vops->dbg_register_dump(hba);
1356 }
1357
ufshcd_vops_device_reset(struct ufs_hba * hba)1358 static inline int ufshcd_vops_device_reset(struct ufs_hba *hba)
1359 {
1360 if (hba->vops && hba->vops->device_reset)
1361 return hba->vops->device_reset(hba);
1362
1363 return -EOPNOTSUPP;
1364 }
1365
ufshcd_vops_config_scaling_param(struct ufs_hba * hba,struct devfreq_dev_profile * profile,void * data)1366 static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
1367 struct devfreq_dev_profile
1368 *profile, void *data)
1369 {
1370 if (hba->vops && hba->vops->config_scaling_param)
1371 hba->vops->config_scaling_param(hba, profile, data);
1372 }
1373
1374 extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1375
1376 /*
1377 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1378 * @scsi_lun: scsi LUN id
1379 *
1380 * Returns UPIU LUN id
1381 */
ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)1382 static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1383 {
1384 if (scsi_is_wlun(scsi_lun))
1385 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1386 | UFS_UPIU_WLUN_ID;
1387 else
1388 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1389 }
1390
1391 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1392 const char *prefix);
1393
1394 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask);
1395 int ufshcd_write_ee_control(struct ufs_hba *hba);
1396 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
1397 u16 set, u16 clr);
1398
ufshcd_update_ee_drv_mask(struct ufs_hba * hba,u16 set,u16 clr)1399 static inline int ufshcd_update_ee_drv_mask(struct ufs_hba *hba,
1400 u16 set, u16 clr)
1401 {
1402 return ufshcd_update_ee_control(hba, &hba->ee_drv_mask,
1403 &hba->ee_usr_mask, set, clr);
1404 }
1405
ufshcd_update_ee_usr_mask(struct ufs_hba * hba,u16 set,u16 clr)1406 static inline int ufshcd_update_ee_usr_mask(struct ufs_hba *hba,
1407 u16 set, u16 clr)
1408 {
1409 return ufshcd_update_ee_control(hba, &hba->ee_usr_mask,
1410 &hba->ee_drv_mask, set, clr);
1411 }
1412
ufshcd_rpm_get_sync(struct ufs_hba * hba)1413 static inline int ufshcd_rpm_get_sync(struct ufs_hba *hba)
1414 {
1415 return pm_runtime_get_sync(&hba->sdev_ufs_device->sdev_gendev);
1416 }
1417
ufshcd_rpm_put_sync(struct ufs_hba * hba)1418 static inline int ufshcd_rpm_put_sync(struct ufs_hba *hba)
1419 {
1420 return pm_runtime_put_sync(&hba->sdev_ufs_device->sdev_gendev);
1421 }
1422
ufshcd_rpm_put(struct ufs_hba * hba)1423 static inline int ufshcd_rpm_put(struct ufs_hba *hba)
1424 {
1425 return pm_runtime_put(&hba->sdev_ufs_device->sdev_gendev);
1426 }
1427
1428 #endif /* End of Header */
1429