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Searched refs:PNAME (Results 1 – 25 of 30) sorted by relevance

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/linux/drivers/clk/samsung/
A Dclk-exynos5420.c297 PNAME(mout_apll_p) = {"fin_pll", "fout_apll"};
298 PNAME(mout_bpll_p) = {"fin_pll", "fout_bpll"};
299 PNAME(mout_cpll_p) = {"fin_pll", "fout_cpll"};
300 PNAME(mout_dpll_p) = {"fin_pll", "fout_dpll"};
301 PNAME(mout_epll_p) = {"fin_pll", "fout_epll"};
302 PNAME(mout_ipll_p) = {"fin_pll", "fout_ipll"};
303 PNAME(mout_kpll_p) = {"fin_pll", "fout_kpll"};
304 PNAME(mout_mpll_p) = {"fin_pll", "fout_mpll"};
305 PNAME(mout_rpll_p) = {"fin_pll", "fout_rpll"};
306 PNAME(mout_spll_p) = {"fin_pll", "fout_spll"};
[all …]
A Dclk-exynos5260.c88 PNAME(mout_aud_pll_user_p) = {"fin_pll", "fout_aud_pll"};
182 PNAME(mout_phyclk_hdmi_phy_ref_clko_user_p) = {"fin_pll",
192 PNAME(mout_phyclk_dptx_phy_clk_div2_user_p) = {"fin_pll",
358 PNAME(mout_egl_b_p) = {"mout_egl_pll", "dout_bus_pll"};
359 PNAME(mout_egl_pll_p) = {"fin_pll", "fout_egl_pll"};
613 PNAME(mout_g3d_pll_p) = {"fin_pll", "fout_g3d_pll"};
929 PNAME(mout_kfc_pll_p) = {"fin_pll", "fout_kfc_pll"};
1068 PNAME(mout_mem_pll_p) = {"fin_pll", "fout_mem_pll"};
1069 PNAME(mout_bus_pll_p) = {"fin_pll", "fout_bus_pll"};
1470 PNAME(mout_aud_pll_p) = {"fin_pll", "fout_aud_pll"};
[all …]
A Dclk-exynos7.c51 PNAME(mout_topc_group2) = { "mout_topc_bus0_pll_half",
55 PNAME(mout_topc_bus0_pll_half_p) = { "mout_topc_bus0_pll",
57 PNAME(mout_topc_bus1_pll_half_p) = { "mout_topc_bus1_pll",
59 PNAME(mout_topc_cc_pll_half_p) = { "mout_topc_cc_pll",
61 PNAME(mout_topc_mfc_pll_half_p) = { "mout_topc_mfc_pll",
65 PNAME(mout_topc_bus0_pll_out_p) = {"mout_topc_bus0_pll",
240 PNAME(mout_top0_cc_pll_half_p) = {"mout_top0_cc_pll_user",
245 PNAME(mout_top0_group1) = {"mout_top0_bus0_pll_half",
248 PNAME(mout_top0_group3) = {"ioclk_audiocdclk0",
433 PNAME(mout_top1_group1) = {"mout_top1_bus0_pll_half",
[all …]
A Dclk-exynos850.c183 PNAME(mout_shared0_pll_p) = { "oscclk", "fout_shared0_pll" };
184 PNAME(mout_shared1_pll_p) = { "oscclk", "fout_shared1_pll" };
185 PNAME(mout_mmc_pll_p) = { "oscclk", "fout_mmc_pll" };
199 PNAME(mout_hsi_mmc_card_p) = { "oscclk", "dout_shared0_div2",
203 PNAME(mout_hsi_usb20drd_p) = { "oscclk", "dout_shared0_div4",
207 PNAME(mout_peri_uart_p) = { "oscclk", "dout_shared0_div4",
209 PNAME(mout_peri_ip_p) = { "oscclk", "dout_shared0_div4",
391 PNAME(mout_hsi_bus_user_p) = { "oscclk", "dout_hsi_bus" };
394 PNAME(mout_hsi_rtc_p) = { "rtcclk", "oscclk" };
654 PNAME(mout_core_gic_p) = { "dout_core_busp", "oscclk" };
[all …]
A Dclk-exynos5433.c1982 PNAME(mout_phyclk_usbhost20_phy_hsic1_p)
1990 PNAME(mout_phyclk_usbdrd30_udrd30_pipe_pclk_p)
1994 PNAME(mout_phyclk_ufs_rx1_symbol_user_p)
1996 PNAME(mout_phyclk_ufs_rx0_symbol_user_p)
1998 PNAME(mout_phyclk_ufs_tx1_symbol_user_p)
2000 PNAME(mout_phyclk_ufs_tx0_symbol_user_p)
2002 PNAME(mout_phyclk_lli_mphy_to_ufs_user_p)
2004 PNAME(mout_sclk_mphy_p)
2585 PNAME(mout_sclk_decon_tv_vclk_c_disp_p) = {
3562 PNAME(mout_apollo_p) = { "mout_apollo_pll",
[all …]
A Dclk-exynos4.c279 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
280 PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", };
281 PNAME(mout_epll_p) = { "fin_pll", "fout_epll", };
282 PNAME(mout_vpllsrc_p) = { "fin_pll", "sclk_hdmi24m", };
283 PNAME(mout_vpll_p) = { "fin_pll", "fout_vpll", };
284 PNAME(sclk_evpll_p) = { "sclk_epll", "sclk_vpll", };
285 PNAME(mout_mfc_p) = { "mout_mfc0", "mout_mfc1", };
286 PNAME(mout_g3d_p) = { "mout_g3d0", "mout_g3d1", };
287 PNAME(mout_g2d_p) = { "mout_g2d0", "mout_g2d1", };
289 PNAME(mout_jpeg_p) = { "mout_jpeg0", "mout_jpeg1", };
[all …]
A Dclk-exynos5250.c170 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
171 PNAME(mout_cpu_p) = { "mout_apll", "mout_mpll", };
173 PNAME(mout_mpll_p) = { "fin_pll", "mout_mpll_fout" };
175 PNAME(mout_bpll_p) = { "fin_pll", "mout_bpll_fout" };
177 PNAME(mout_vpll_p) = { "mout_vpllsrc", "fout_vpll" };
178 PNAME(mout_cpll_p) = { "fin_pll", "fout_cpll" };
179 PNAME(mout_epll_p) = { "fin_pll", "fout_epll" };
180 PNAME(mout_gpll_p) = { "fin_pll", "fout_gpll" };
181 PNAME(mout_mpll_user_p) = { "fin_pll", "mout_mpll" };
182 PNAME(mout_bpll_user_p) = { "fin_pll", "mout_bpll" };
[all …]
A Dclk-exynos5410.c67 PNAME(apll_p) = { "fin_pll", "fout_apll", };
68 PNAME(bpll_p) = { "fin_pll", "fout_bpll", };
69 PNAME(cpll_p) = { "fin_pll", "fout_cpll" };
70 PNAME(epll_p) = { "fin_pll", "fout_epll" };
71 PNAME(mpll_p) = { "fin_pll", "fout_mpll", };
72 PNAME(kpll_p) = { "fin_pll", "fout_kpll", };
74 PNAME(mout_cpu_p) = { "mout_apll", "sclk_mpll", };
75 PNAME(mout_kfc_p) = { "mout_kpll", "sclk_mpll", };
77 PNAME(mpll_user_p) = { "fin_pll", "sclk_mpll", };
78 PNAME(bpll_user_p) = { "fin_pll", "sclk_bpll", };
[all …]
A Dclk-exynos3250.c174 PNAME(mout_vpllsrc_p) = { "fin_pll", };
176 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
177 PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", };
178 PNAME(mout_vpll_p) = { "fin_pll", "fout_vpll", };
179 PNAME(mout_upll_p) = { "fin_pll", "fout_upll", };
189 PNAME(mout_gdl_p) = { "mout_mpll_user_l", };
190 PNAME(mout_gdr_p) = { "mout_mpll_user_r", };
192 PNAME(mout_aclk_400_mcuisp_sub_p)
195 PNAME(mout_aclk_266_1_p) = { "mout_epll_user", };
201 PNAME(group_sclk_p) = { "xxti", "xusbxti",
[all …]
A Dclk-s3c2412.c75 PNAME(erefclk_p) = { "xti", "xti", "xti", "ext" };
76 PNAME(urefclk_p) = { "xti", "xti", "xti", "ext" };
78 PNAME(camclk_p) = { "usysclk", "hclk" };
79 PNAME(usbclk_p) = { "usysclk", "hclk" };
80 PNAME(i2sclk_p) = { "erefclk", "mpll" };
81 PNAME(uartclk_p) = { "erefclk", "mpll" };
82 PNAME(usysclk_p) = { "urefclk", "upll" };
83 PNAME(msysclk_p) = { "mdivclk", "mpll" };
84 PNAME(mdivclk_p) = { "xti", "div_xti" };
85 PNAME(armclk_p) = { "armdiv", "hclk" };
A Dclk-s3c64xx.c86 PNAME(spi_mmc_p) = { "mout_epll", "dout_mpll", "fin_pll", "clk27m" };
87 PNAME(uart_p) = { "mout_epll", "dout_mpll" };
88 PNAME(audio0_p) = { "mout_epll", "dout_mpll", "fin_pll", "iiscdclk0",
92 PNAME(mfc_p) = { "hclkx2", "mout_epll" };
93 PNAME(apll_p) = { "fin_pll", "fout_apll" };
94 PNAME(mpll_p) = { "fin_pll", "fout_mpll" };
95 PNAME(epll_p) = { "fin_pll", "fout_epll" };
96 PNAME(hclkx2_p) = { "mout_mpll", "mout_apll" };
100 PNAME(irda_p6400) = { "mout_epll", "dout_mpll", "none", "clk48m" };
101 PNAME(uhost_p6400) = { "clk48m", "mout_epll", "dout_mpll", "none" };
[all …]
A Dclk-s3c2443.c63 PNAME(epllref_p) = { "mpllref", "mpllref", "xti", "ext" };
64 PNAME(esysclk_p) = { "epllref", "epll" };
65 PNAME(mpllref_p) = { "xti", "mdivclk" };
66 PNAME(msysclk_p) = { "mpllref", "mpll" };
67 PNAME(armclk_p) = { "armdiv" , "hclk" };
68 PNAME(i2s0_p) = { "div_i2s0", "ext_i2s", "epllref", "epllref" };
186 PNAME(s3c2416_hsmmc0_p) = { "sclk_hsmmc0", "sclk_hsmmcext" };
187 PNAME(s3c2416_hsmmc1_p) = { "sclk_hsmmc1", "sclk_hsmmcext" };
188 PNAME(s3c2416_hsspi0_p) = { "hsspi0_epll", "hsspi0_mpll" };
276 PNAME(s3c2450_cam_p) = { "div_cam", "hclk" };
[all …]
/linux/drivers/clk/rockchip/
A Dclk-rk3568.c205 PNAME(mux_pll_p) = { "xin24m" };
207 PNAME(mux_armclk_p) = { "apll", "gpll" };
230 PNAME(npll_gpll_p) = { "npll", "gpll" };
231 PNAME(cpll_gpll_p) = { "cpll", "gpll" };
232 PNAME(gpll_cpll_p) = { "gpll", "cpll" };
241 PNAME(clk_ddr1x_p) = { "clk_ddrphy1x_src", "dpll" };
277 PNAME(xin24m_32k_p) = { "xin24m", "clk_rtc_32k" };
298 PNAME(clk_hdmi_ref_p) = { "hpll", "hpll_ph0" };
299 PNAME(clk_pdpmu_p) = { "ppll", "gpll" };
301 PNAME(clk_pwm0_p) = { "xin24m", "clk_pdpmu" };
[all …]
A Dclk-rk3308.c122 PNAME(mux_pll_p) = { "xin24m" };
125 PNAME(mux_dpll_vpll0_p) = { "dpll", "vpll0" };
127 PNAME(mux_dpll_vpll0_vpll1_p) = { "dpll", "vpll0", "vpll1" };
130 PNAME(mux_vpll0_vpll1_p) = { "vpll0", "vpll1" };
140 PNAME(mux_sdio_p) = { "clk_sdio_div", "clk_sdio_div50" };
141 PNAME(mux_emmc_p) = { "clk_emmc_div", "clk_emmc_div50" };
142 PNAME(mux_mac_p) = { "clk_mac_src", "mac_clkin" };
148 PNAME(mux_wifi_p) = { "clk_wifi_osc", "clk_wifi_src" };
149 PNAME(mux_pdm_p) = { "clk_pdm_src", "clk_pdm_frac" };
171 PNAME(mux_i2s0_2ch_out_p) = { "clk_i2s0_2ch", "xin12m" };
[all …]
A Dclk-px30.c137 PNAME(mux_pll_p) = { "xin24m"};
139 PNAME(mux_armclk_p) = { "apll_core", "gpll_core" };
140 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
143 PNAME(mux_cpll_npll_p) = { "cpll", "npll" };
144 PNAME(mux_npll_cpll_p) = { "npll", "cpll" };
145 PNAME(mux_gpll_cpll_p) = { "gpll", "dummy_cpll" };
146 PNAME(mux_gpll_npll_p) = { "gpll", "npll" };
147 PNAME(mux_gpll_xin24m_p) = { "gpll", "xin24m"};
158 PNAME(mux_i2s1_out_p) = { "clk_i2s1", "xin12m"};
159 PNAME(mux_i2s2_out_p) = { "clk_i2s2", "xin12m"};
[all …]
A Dclk-rv1108.c119 PNAME(mux_pll_p) = { "xin24m", "xin24m"};
122 PNAME(mux_usb480m_pre_p) = { "usbphy", "xin24m" };
123 PNAME(mux_hdmiphy_phy_p) = { "hdmiphy", "xin24m" };
126 PNAME(mux_pll_src_2plls_p) = { "dpll", "gpll" };
127 PNAME(mux_pll_src_apll_gpll_p) = { "apll", "gpll" };
135 PNAME(mux_sclk_mac_p) = { "sclk_mac_pre", "ext_gmac" };
137 PNAME(mux_i2s_out_p) = { "i2s0_pre", "xin12m" };
140 PNAME(mux_wifi_src_p) = { "gpll", "xin24m" };
141 PNAME(mux_cifout_src_p) = { "hdmiphy", "gpll" };
142 PNAME(mux_cifout_p) = { "sclk_cifout_src", "xin24m" };
[all …]
A Dclk-rk3228.c132 PNAME(mux_pll_p) = { "clk_24m", "xin24m" };
137 PNAME(mux_usb480m_p) = { "usb480m_phy", "xin24m" };
138 PNAME(mux_hdmiphy_p) = { "hdmiphy_phy", "xin24m" };
142 PNAME(mux_pll_src_3plls_p) = { "cpll", "gpll", "hdmiphy" };
143 PNAME(mux_pll_src_2plls_p) = { "cpll", "gpll" };
144 PNAME(mux_sclk_hdmi_cec_p) = { "cpll", "gpll", "xin24m" };
151 PNAME(mux_sclk_vop_src_p) = { "gpll_vop", "cpll_vop" };
152 PNAME(mux_dclk_vop_p) = { "hdmiphy", "sclk_vop_pre" };
156 PNAME(mux_i2s_out_p) = { "i2s1_pre", "xin12m" };
157 PNAME(mux_i2s2_p) = { "i2s2_src", "i2s2_frac", "xin12m" };
[all …]
A Dclk-rk3328.c143 PNAME(mux_pll_p) = { "xin24m" };
151 PNAME(mux_4plls_p) = { "cpll", "gpll",
160 PNAME(mux_armclk_p) = { "apll_core",
165 PNAME(mux_usb480m_p) = { "usb480m_phy",
168 PNAME(mux_i2s0_p) = { "clk_i2s0_div",
172 PNAME(mux_i2s1_p) = { "clk_i2s1_div",
176 PNAME(mux_i2s2_p) = { "clk_i2s2_div",
182 PNAME(mux_spdif_p) = { "clk_spdif_div",
186 PNAME(mux_uart0_p) = { "clk_uart0_div",
198 PNAME(mux_dclk_lcdc_p) = { "hdmiphy",
[all …]
A Dclk-rk3399.c109 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
111 PNAME(mux_armclkl_p) = { "clk_core_l_lpll_src",
119 PNAME(mux_ddrclk_p) = { "clk_ddrc_lpll_src",
123 PNAME(mux_aclk_cci_p) = { "cpll_aclk_cci_src",
127 PNAME(mux_cci_trace_p) = { "cpll_cci_trace",
129 PNAME(mux_cs_p) = { "cpll_cs", "gpll_cs",
158 PNAME(mux_dclk_vop0_p) = { "dclk_vop0_div",
160 PNAME(mux_dclk_vop1_p) = { "dclk_vop1_div",
200 PNAME(mux_i2sch_p) = { "clk_i2s0", "clk_i2s1",
210 PNAME(mux_ppll_24m_p) = { "ppll", "xin24m" };
[all …]
A Dclk-rk3368.c90 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
91 PNAME(mux_armclkb_p) = { "apllb_core", "gpllb_core" };
92 PNAME(mux_armclkl_p) = { "aplll_core", "gplll_core" };
93 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
97 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" };
112 PNAME(mux_i2s_2ch_p) = { "i2s_2ch_src", "i2s_2ch_frac",
116 PNAME(mux_edp_24m_p) = { "xin24m", "dummy" };
117 PNAME(mux_vip_out_p) = { "vip_src", "xin24m" };
118 PNAME(mux_usbphy480m_p) = { "usbotg_out", "xin24m" };
123 PNAME(mux_uart2_p) = { "uart2_src", "xin24m" };
[all …]
A Dclk-rk3036.c115 PNAME(mux_pll_p) = { "xin24m", "xin24m" };
117 PNAME(mux_armclk_p) = { "apll", "gpll_armclk" };
118 PNAME(mux_busclk_p) = { "apll", "dpll_cpu", "gpll_cpu" };
119 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
120 PNAME(mux_pll_src_3plls_p) = { "apll", "dpll", "gpll" };
121 PNAME(mux_timer_p) = { "xin24m", "pclk_peri_src" };
126 PNAME(mux_mmc_src_p) = { "apll", "dpll", "gpll", "xin24m" };
128 PNAME(mux_i2s_clkout_p) = { "i2s_pre", "xin12m" };
129 PNAME(mux_spdif_p) = { "spdif_src", "spdif_frac", "xin12m" };
133 PNAME(mux_mac_p) = { "mac_pll_src", "rmii_clkin" };
[all …]
A Dclk-rk3128.c130 PNAME(mux_pll_p) = { "clk_24m", "xin24m" };
132 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_div2_ddr" };
133 PNAME(mux_armclk_p) = { "apll_core", "gpll_div2_core" };
134 PNAME(mux_usb480m_p) = { "usb480m_phy", "xin24m" };
139 PNAME(mux_pll_src_3plls_p) = { "cpll", "gpll", "gpll_div2" };
143 PNAME(mux_clk_cif_out_src_p) = { "clk_cif_src", "xin24m" };
148 PNAME(mux_i2s_out_p) = { "i2s1_pre", "xin12m" };
151 PNAME(mux_uart0_p) = { "uart0_src", "uart0_frac", "xin24m" };
152 PNAME(mux_uart1_p) = { "uart1_src", "uart1_frac", "xin24m" };
153 PNAME(mux_uart2_p) = { "uart2_src", "uart2_frac", "xin24m" };
[all …]
A Dclk-rk3288.c192 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
193 PNAME(mux_armclk_p) = { "apll_core", "gpll_core" };
194 PNAME(mux_ddrphy_p) = { "dpll_ddr", "gpll_ddr" };
197 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" };
205 PNAME(mux_i2s_clkout_p) = { "i2s_pre", "xin12m" };
213 PNAME(mux_vip_out_p) = { "vip_src", "xin24m" };
214 PNAME(mux_mac_p) = { "mac_pll_src", "ext_gmac" };
215 PNAME(mux_hsadcout_p) = { "hsadc_src", "ext_hsadc" };
216 PNAME(mux_edp_24m_p) = { "ext_edp_24m", "xin24m" };
217 PNAME(mux_tspout_p) = { "cpll", "gpll", "npll", "xin27m" };
[all …]
A Dclk-rk3188.c198 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
199 PNAME(mux_armclk_p) = { "apll", "gpll_armclk" };
200 PNAME(mux_ddrphy_p) = { "dpll", "gpll_ddr" };
201 PNAME(mux_pll_src_gpll_cpll_p) = { "gpll", "cpll" };
202 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" };
203 PNAME(mux_aclk_cpu_p) = { "apll", "gpll" };
204 PNAME(mux_sclk_cif0_p) = { "cif0_pre", "xin24m" };
212 PNAME(mux_mac_p) = { "gpll", "dpll" };
213 PNAME(mux_sclk_macref_p) = { "mac_src", "ext_rmii" };
531 PNAME(mux_rk3066_lcdc0_p) = { "dclk_lcdc0_src", "xin27m" };
[all …]
/linux/drivers/clk/pistachio/
A Dclk-pistachio.c106 PNAME(mux_xtal_mips) = { "xtal", "mips_pll" };
109 PNAME(mux_xtal_rpu_v) = { "xtal", "rpu_v_pll" };
110 PNAME(mux_xtal_rpu_l) = { "xtal", "rpu_l_pll" };
112 PNAME(mux_xtal_wifi) = { "xtal", "wifi_pll" };
113 PNAME(mux_xtal_wifi_div4) = { "xtal", "wifi_div4" };
114 PNAME(mux_xtal_wifi_div8) = { "xtal", "wifi_div8" };
117 PNAME(mux_xtal_sys) = { "xtal", "sys_pll" };
118 PNAME(mux_sys_enet) = { "sys_internal_div", "enet_in" };
120 PNAME(mux_sys_bt) = { "sys_internal_div", "bt_pll_mux" };
121 PNAME(mux_xtal_bt) = { "xtal", "bt_pll" };
[all …]

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