1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * ADXL355 3-Axis Digital Accelerometer IIO core driver
4 *
5 * Copyright (c) 2021 Puranjay Mohan <puranjay12@gmail.com>
6 *
7 * Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/adxl354_adxl355.pdf
8 */
9
10 #include <linux/bits.h>
11 #include <linux/bitfield.h>
12 #include <linux/iio/buffer.h>
13 #include <linux/iio/iio.h>
14 #include <linux/iio/trigger.h>
15 #include <linux/iio/triggered_buffer.h>
16 #include <linux/iio/trigger_consumer.h>
17 #include <linux/limits.h>
18 #include <linux/math64.h>
19 #include <linux/module.h>
20 #include <linux/mod_devicetable.h>
21 #include <linux/of_irq.h>
22 #include <linux/regmap.h>
23 #include <asm/unaligned.h>
24
25 #include "adxl355.h"
26
27 /* ADXL355 Register Definitions */
28 #define ADXL355_DEVID_AD_REG 0x00
29 #define ADXL355_DEVID_MST_REG 0x01
30 #define ADXL355_PARTID_REG 0x02
31 #define ADXL355_STATUS_REG 0x04
32 #define ADXL355_FIFO_ENTRIES_REG 0x05
33 #define ADXL355_TEMP2_REG 0x06
34 #define ADXL355_XDATA3_REG 0x08
35 #define ADXL355_YDATA3_REG 0x0B
36 #define ADXL355_ZDATA3_REG 0x0E
37 #define ADXL355_FIFO_DATA_REG 0x11
38 #define ADXL355_OFFSET_X_H_REG 0x1E
39 #define ADXL355_OFFSET_Y_H_REG 0x20
40 #define ADXL355_OFFSET_Z_H_REG 0x22
41 #define ADXL355_ACT_EN_REG 0x24
42 #define ADXL355_ACT_THRESH_H_REG 0x25
43 #define ADXL355_ACT_THRESH_L_REG 0x26
44 #define ADXL355_ACT_COUNT_REG 0x27
45 #define ADXL355_FILTER_REG 0x28
46 #define ADXL355_FILTER_ODR_MSK GENMASK(3, 0)
47 #define ADXL355_FILTER_HPF_MSK GENMASK(6, 4)
48 #define ADXL355_FIFO_SAMPLES_REG 0x29
49 #define ADXL355_INT_MAP_REG 0x2A
50 #define ADXL355_SYNC_REG 0x2B
51 #define ADXL355_RANGE_REG 0x2C
52 #define ADXL355_POWER_CTL_REG 0x2D
53 #define ADXL355_POWER_CTL_MODE_MSK GENMASK(1, 0)
54 #define ADXL355_POWER_CTL_DRDY_MSK BIT(2)
55 #define ADXL355_SELF_TEST_REG 0x2E
56 #define ADXL355_RESET_REG 0x2F
57
58 #define ADXL355_DEVID_AD_VAL 0xAD
59 #define ADXL355_DEVID_MST_VAL 0x1D
60 #define ADXL355_PARTID_VAL 0xED
61 #define ADXL355_RESET_CODE 0x52
62
63 #define MEGA 1000000UL
64 #define TERA 1000000000000ULL
65
66 static const struct regmap_range adxl355_read_reg_range[] = {
67 regmap_reg_range(ADXL355_DEVID_AD_REG, ADXL355_FIFO_DATA_REG),
68 regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_SELF_TEST_REG),
69 };
70
71 const struct regmap_access_table adxl355_readable_regs_tbl = {
72 .yes_ranges = adxl355_read_reg_range,
73 .n_yes_ranges = ARRAY_SIZE(adxl355_read_reg_range),
74 };
75 EXPORT_SYMBOL_GPL(adxl355_readable_regs_tbl);
76
77 static const struct regmap_range adxl355_write_reg_range[] = {
78 regmap_reg_range(ADXL355_OFFSET_X_H_REG, ADXL355_RESET_REG),
79 };
80
81 const struct regmap_access_table adxl355_writeable_regs_tbl = {
82 .yes_ranges = adxl355_write_reg_range,
83 .n_yes_ranges = ARRAY_SIZE(adxl355_write_reg_range),
84 };
85 EXPORT_SYMBOL_GPL(adxl355_writeable_regs_tbl);
86
87 enum adxl355_op_mode {
88 ADXL355_MEASUREMENT,
89 ADXL355_STANDBY,
90 ADXL355_TEMP_OFF,
91 };
92
93 enum adxl355_odr {
94 ADXL355_ODR_4000HZ,
95 ADXL355_ODR_2000HZ,
96 ADXL355_ODR_1000HZ,
97 ADXL355_ODR_500HZ,
98 ADXL355_ODR_250HZ,
99 ADXL355_ODR_125HZ,
100 ADXL355_ODR_62_5HZ,
101 ADXL355_ODR_31_25HZ,
102 ADXL355_ODR_15_625HZ,
103 ADXL355_ODR_7_813HZ,
104 ADXL355_ODR_3_906HZ,
105 };
106
107 enum adxl355_hpf_3db {
108 ADXL355_HPF_OFF,
109 ADXL355_HPF_24_7,
110 ADXL355_HPF_6_2084,
111 ADXL355_HPF_1_5545,
112 ADXL355_HPF_0_3862,
113 ADXL355_HPF_0_0954,
114 ADXL355_HPF_0_0238,
115 };
116
117 static const int adxl355_odr_table[][2] = {
118 [0] = {4000, 0},
119 [1] = {2000, 0},
120 [2] = {1000, 0},
121 [3] = {500, 0},
122 [4] = {250, 0},
123 [5] = {125, 0},
124 [6] = {62, 500000},
125 [7] = {31, 250000},
126 [8] = {15, 625000},
127 [9] = {7, 813000},
128 [10] = {3, 906000},
129 };
130
131 static const int adxl355_hpf_3db_multipliers[] = {
132 0,
133 247000,
134 62084,
135 15545,
136 3862,
137 954,
138 238,
139 };
140
141 enum adxl355_chans {
142 chan_x, chan_y, chan_z,
143 };
144
145 struct adxl355_chan_info {
146 u8 data_reg;
147 u8 offset_reg;
148 };
149
150 static const struct adxl355_chan_info adxl355_chans[] = {
151 [chan_x] = {
152 .data_reg = ADXL355_XDATA3_REG,
153 .offset_reg = ADXL355_OFFSET_X_H_REG
154 },
155 [chan_y] = {
156 .data_reg = ADXL355_YDATA3_REG,
157 .offset_reg = ADXL355_OFFSET_Y_H_REG
158 },
159 [chan_z] = {
160 .data_reg = ADXL355_ZDATA3_REG,
161 .offset_reg = ADXL355_OFFSET_Z_H_REG
162 },
163 };
164
165 struct adxl355_data {
166 struct regmap *regmap;
167 struct device *dev;
168 struct mutex lock; /* lock to protect op_mode */
169 enum adxl355_op_mode op_mode;
170 enum adxl355_odr odr;
171 enum adxl355_hpf_3db hpf_3db;
172 int calibbias[3];
173 int adxl355_hpf_3db_table[7][2];
174 struct iio_trigger *dready_trig;
175 union {
176 u8 transf_buf[3];
177 struct {
178 u8 buf[14];
179 s64 ts;
180 } buffer;
181 } ____cacheline_aligned;
182 };
183
adxl355_set_op_mode(struct adxl355_data * data,enum adxl355_op_mode op_mode)184 static int adxl355_set_op_mode(struct adxl355_data *data,
185 enum adxl355_op_mode op_mode)
186 {
187 int ret;
188
189 if (data->op_mode == op_mode)
190 return 0;
191
192 ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
193 ADXL355_POWER_CTL_MODE_MSK, op_mode);
194 if (ret)
195 return ret;
196
197 data->op_mode = op_mode;
198
199 return ret;
200 }
201
adxl355_data_rdy_trigger_set_state(struct iio_trigger * trig,bool state)202 static int adxl355_data_rdy_trigger_set_state(struct iio_trigger *trig,
203 bool state)
204 {
205 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
206 struct adxl355_data *data = iio_priv(indio_dev);
207 int ret;
208
209 mutex_lock(&data->lock);
210 ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
211 ADXL355_POWER_CTL_DRDY_MSK,
212 FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK,
213 state ? 0 : 1));
214 mutex_unlock(&data->lock);
215
216 return ret;
217 }
218
adxl355_fill_3db_frequency_table(struct adxl355_data * data)219 static void adxl355_fill_3db_frequency_table(struct adxl355_data *data)
220 {
221 u32 multiplier;
222 u64 div, rem;
223 u64 odr;
224 int i;
225
226 odr = mul_u64_u32_shr(adxl355_odr_table[data->odr][0], MEGA, 0) +
227 adxl355_odr_table[data->odr][1];
228
229 for (i = 0; i < ARRAY_SIZE(adxl355_hpf_3db_multipliers); i++) {
230 multiplier = adxl355_hpf_3db_multipliers[i];
231 div = div64_u64_rem(mul_u64_u32_shr(odr, multiplier, 0),
232 TERA * 100, &rem);
233
234 data->adxl355_hpf_3db_table[i][0] = div;
235 data->adxl355_hpf_3db_table[i][1] = div_u64(rem, MEGA * 100);
236 }
237 }
238
adxl355_setup(struct adxl355_data * data)239 static int adxl355_setup(struct adxl355_data *data)
240 {
241 unsigned int regval;
242 int ret;
243
244 ret = regmap_read(data->regmap, ADXL355_DEVID_AD_REG, ®val);
245 if (ret)
246 return ret;
247
248 if (regval != ADXL355_DEVID_AD_VAL) {
249 dev_err(data->dev, "Invalid ADI ID 0x%02x\n", regval);
250 return -ENODEV;
251 }
252
253 ret = regmap_read(data->regmap, ADXL355_DEVID_MST_REG, ®val);
254 if (ret)
255 return ret;
256
257 if (regval != ADXL355_DEVID_MST_VAL) {
258 dev_err(data->dev, "Invalid MEMS ID 0x%02x\n", regval);
259 return -ENODEV;
260 }
261
262 ret = regmap_read(data->regmap, ADXL355_PARTID_REG, ®val);
263 if (ret)
264 return ret;
265
266 if (regval != ADXL355_PARTID_VAL) {
267 dev_err(data->dev, "Invalid DEV ID 0x%02x\n", regval);
268 return -ENODEV;
269 }
270
271 /*
272 * Perform a software reset to make sure the device is in a consistent
273 * state after start-up.
274 */
275 ret = regmap_write(data->regmap, ADXL355_RESET_REG, ADXL355_RESET_CODE);
276 if (ret)
277 return ret;
278
279 ret = regmap_update_bits(data->regmap, ADXL355_POWER_CTL_REG,
280 ADXL355_POWER_CTL_DRDY_MSK,
281 FIELD_PREP(ADXL355_POWER_CTL_DRDY_MSK, 1));
282 if (ret)
283 return ret;
284
285 adxl355_fill_3db_frequency_table(data);
286
287 return adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
288 }
289
adxl355_get_temp_data(struct adxl355_data * data,u8 addr)290 static int adxl355_get_temp_data(struct adxl355_data *data, u8 addr)
291 {
292 return regmap_bulk_read(data->regmap, addr, data->transf_buf, 2);
293 }
294
adxl355_read_axis(struct adxl355_data * data,u8 addr)295 static int adxl355_read_axis(struct adxl355_data *data, u8 addr)
296 {
297 int ret;
298
299 ret = regmap_bulk_read(data->regmap, addr, data->transf_buf,
300 ARRAY_SIZE(data->transf_buf));
301 if (ret)
302 return ret;
303
304 return get_unaligned_be24(data->transf_buf);
305 }
306
adxl355_find_match(const int (* freq_tbl)[2],const int n,const int val,const int val2)307 static int adxl355_find_match(const int (*freq_tbl)[2], const int n,
308 const int val, const int val2)
309 {
310 int i;
311
312 for (i = 0; i < n; i++) {
313 if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
314 return i;
315 }
316
317 return -EINVAL;
318 }
319
adxl355_set_odr(struct adxl355_data * data,enum adxl355_odr odr)320 static int adxl355_set_odr(struct adxl355_data *data,
321 enum adxl355_odr odr)
322 {
323 int ret;
324
325 mutex_lock(&data->lock);
326
327 if (data->odr == odr) {
328 mutex_unlock(&data->lock);
329 return 0;
330 }
331
332 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
333 if (ret)
334 goto err_unlock;
335
336 ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
337 ADXL355_FILTER_ODR_MSK,
338 FIELD_PREP(ADXL355_FILTER_ODR_MSK, odr));
339 if (ret)
340 goto err_set_opmode;
341
342 data->odr = odr;
343 adxl355_fill_3db_frequency_table(data);
344
345 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
346 if (ret)
347 goto err_set_opmode;
348
349 mutex_unlock(&data->lock);
350 return 0;
351
352 err_set_opmode:
353 adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
354 err_unlock:
355 mutex_unlock(&data->lock);
356 return ret;
357 }
358
adxl355_set_hpf_3db(struct adxl355_data * data,enum adxl355_hpf_3db hpf)359 static int adxl355_set_hpf_3db(struct adxl355_data *data,
360 enum adxl355_hpf_3db hpf)
361 {
362 int ret;
363
364 mutex_lock(&data->lock);
365
366 if (data->hpf_3db == hpf) {
367 mutex_unlock(&data->lock);
368 return 0;
369 }
370
371 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
372 if (ret)
373 goto err_unlock;
374
375 ret = regmap_update_bits(data->regmap, ADXL355_FILTER_REG,
376 ADXL355_FILTER_HPF_MSK,
377 FIELD_PREP(ADXL355_FILTER_HPF_MSK, hpf));
378 if (ret)
379 goto err_set_opmode;
380
381 data->hpf_3db = hpf;
382
383 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
384 if (ret)
385 goto err_set_opmode;
386
387 mutex_unlock(&data->lock);
388 return 0;
389
390 err_set_opmode:
391 adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
392 err_unlock:
393 mutex_unlock(&data->lock);
394 return ret;
395 }
396
adxl355_set_calibbias(struct adxl355_data * data,enum adxl355_chans chan,int calibbias)397 static int adxl355_set_calibbias(struct adxl355_data *data,
398 enum adxl355_chans chan, int calibbias)
399 {
400 int ret;
401
402 mutex_lock(&data->lock);
403
404 ret = adxl355_set_op_mode(data, ADXL355_STANDBY);
405 if (ret)
406 goto err_unlock;
407
408 put_unaligned_be16(calibbias, data->transf_buf);
409 ret = regmap_bulk_write(data->regmap,
410 adxl355_chans[chan].offset_reg,
411 data->transf_buf, 2);
412 if (ret)
413 goto err_set_opmode;
414
415 data->calibbias[chan] = calibbias;
416
417 ret = adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
418 if (ret)
419 goto err_set_opmode;
420
421 mutex_unlock(&data->lock);
422 return 0;
423
424 err_set_opmode:
425 adxl355_set_op_mode(data, ADXL355_MEASUREMENT);
426 err_unlock:
427 mutex_unlock(&data->lock);
428 return ret;
429 }
430
adxl355_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)431 static int adxl355_read_raw(struct iio_dev *indio_dev,
432 struct iio_chan_spec const *chan,
433 int *val, int *val2, long mask)
434 {
435 struct adxl355_data *data = iio_priv(indio_dev);
436 int ret;
437
438 switch (mask) {
439 case IIO_CHAN_INFO_RAW:
440 switch (chan->type) {
441 case IIO_TEMP:
442 ret = adxl355_get_temp_data(data, chan->address);
443 if (ret < 0)
444 return ret;
445 *val = get_unaligned_be16(data->transf_buf);
446
447 return IIO_VAL_INT;
448 case IIO_ACCEL:
449 ret = adxl355_read_axis(data, adxl355_chans[
450 chan->address].data_reg);
451 if (ret < 0)
452 return ret;
453 *val = sign_extend32(ret >> chan->scan_type.shift,
454 chan->scan_type.realbits - 1);
455 return IIO_VAL_INT;
456 default:
457 return -EINVAL;
458 }
459
460 case IIO_CHAN_INFO_SCALE:
461 switch (chan->type) {
462 /*
463 * The datasheet defines an intercept of 1885 LSB at 25 degC
464 * and a slope of -9.05 LSB/C. The following formula can be used
465 * to find the temperature:
466 * Temp = ((RAW - 1885)/(-9.05)) + 25 but this doesn't follow
467 * the format of the IIO which is Temp = (RAW + OFFSET) * SCALE.
468 * Hence using some rearranging we get the scale as -110.497238
469 * and offset as -2111.25.
470 */
471 case IIO_TEMP:
472 *val = -110;
473 *val2 = 497238;
474 return IIO_VAL_INT_PLUS_MICRO;
475 /*
476 * At +/- 2g with 20-bit resolution, scale is given in datasheet
477 * as 3.9ug/LSB = 0.0000039 * 9.80665 = 0.00003824593 m/s^2.
478 */
479 case IIO_ACCEL:
480 *val = 0;
481 *val2 = 38245;
482 return IIO_VAL_INT_PLUS_NANO;
483 default:
484 return -EINVAL;
485 }
486 case IIO_CHAN_INFO_OFFSET:
487 *val = -2111;
488 *val2 = 250000;
489 return IIO_VAL_INT_PLUS_MICRO;
490 case IIO_CHAN_INFO_CALIBBIAS:
491 *val = sign_extend32(data->calibbias[chan->address], 15);
492 return IIO_VAL_INT;
493 case IIO_CHAN_INFO_SAMP_FREQ:
494 *val = adxl355_odr_table[data->odr][0];
495 *val2 = adxl355_odr_table[data->odr][1];
496 return IIO_VAL_INT_PLUS_MICRO;
497 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
498 *val = data->adxl355_hpf_3db_table[data->hpf_3db][0];
499 *val2 = data->adxl355_hpf_3db_table[data->hpf_3db][1];
500 return IIO_VAL_INT_PLUS_MICRO;
501 default:
502 return -EINVAL;
503 }
504 }
505
adxl355_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)506 static int adxl355_write_raw(struct iio_dev *indio_dev,
507 struct iio_chan_spec const *chan,
508 int val, int val2, long mask)
509 {
510 struct adxl355_data *data = iio_priv(indio_dev);
511 int odr_idx, hpf_idx, calibbias;
512
513 switch (mask) {
514 case IIO_CHAN_INFO_SAMP_FREQ:
515 odr_idx = adxl355_find_match(adxl355_odr_table,
516 ARRAY_SIZE(adxl355_odr_table),
517 val, val2);
518 if (odr_idx < 0)
519 return odr_idx;
520
521 return adxl355_set_odr(data, odr_idx);
522 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
523 hpf_idx = adxl355_find_match(data->adxl355_hpf_3db_table,
524 ARRAY_SIZE(data->adxl355_hpf_3db_table),
525 val, val2);
526 if (hpf_idx < 0)
527 return hpf_idx;
528
529 return adxl355_set_hpf_3db(data, hpf_idx);
530 case IIO_CHAN_INFO_CALIBBIAS:
531 calibbias = clamp_t(int, val, S16_MIN, S16_MAX);
532
533 return adxl355_set_calibbias(data, chan->address, calibbias);
534 default:
535 return -EINVAL;
536 }
537 }
538
adxl355_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)539 static int adxl355_read_avail(struct iio_dev *indio_dev,
540 struct iio_chan_spec const *chan,
541 const int **vals, int *type, int *length,
542 long mask)
543 {
544 struct adxl355_data *data = iio_priv(indio_dev);
545
546 switch (mask) {
547 case IIO_CHAN_INFO_SAMP_FREQ:
548 *vals = (const int *)adxl355_odr_table;
549 *type = IIO_VAL_INT_PLUS_MICRO;
550 /* Values are stored in a 2D matrix */
551 *length = ARRAY_SIZE(adxl355_odr_table) * 2;
552
553 return IIO_AVAIL_LIST;
554 case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
555 *vals = (const int *)data->adxl355_hpf_3db_table;
556 *type = IIO_VAL_INT_PLUS_MICRO;
557 /* Values are stored in a 2D matrix */
558 *length = ARRAY_SIZE(data->adxl355_hpf_3db_table) * 2;
559
560 return IIO_AVAIL_LIST;
561 default:
562 return -EINVAL;
563 }
564 }
565
566 static const unsigned long adxl355_avail_scan_masks[] = {
567 GENMASK(3, 0),
568 0
569 };
570
571 static const struct iio_info adxl355_info = {
572 .read_raw = adxl355_read_raw,
573 .write_raw = adxl355_write_raw,
574 .read_avail = &adxl355_read_avail,
575 };
576
577 static const struct iio_trigger_ops adxl355_trigger_ops = {
578 .set_trigger_state = &adxl355_data_rdy_trigger_set_state,
579 .validate_device = &iio_trigger_validate_own_device,
580 };
581
adxl355_trigger_handler(int irq,void * p)582 static irqreturn_t adxl355_trigger_handler(int irq, void *p)
583 {
584 struct iio_poll_func *pf = p;
585 struct iio_dev *indio_dev = pf->indio_dev;
586 struct adxl355_data *data = iio_priv(indio_dev);
587 int ret;
588
589 mutex_lock(&data->lock);
590
591 /*
592 * data->buffer is used both for triggered buffer support
593 * and read/write_raw(), hence, it has to be zeroed here before usage.
594 */
595 data->buffer.buf[0] = 0;
596
597 /*
598 * The acceleration data is 24 bits and big endian. It has to be saved
599 * in 32 bits, hence, it is saved in the 2nd byte of the 4 byte buffer.
600 * The buf array is 14 bytes as it includes 3x4=12 bytes for
601 * accelaration data of x, y, and z axis. It also includes 2 bytes for
602 * temperature data.
603 */
604 ret = regmap_bulk_read(data->regmap, ADXL355_XDATA3_REG,
605 &data->buffer.buf[1], 3);
606 if (ret)
607 goto out_unlock_notify;
608
609 ret = regmap_bulk_read(data->regmap, ADXL355_YDATA3_REG,
610 &data->buffer.buf[5], 3);
611 if (ret)
612 goto out_unlock_notify;
613
614 ret = regmap_bulk_read(data->regmap, ADXL355_ZDATA3_REG,
615 &data->buffer.buf[9], 3);
616 if (ret)
617 goto out_unlock_notify;
618
619 ret = regmap_bulk_read(data->regmap, ADXL355_TEMP2_REG,
620 &data->buffer.buf[12], 2);
621 if (ret)
622 goto out_unlock_notify;
623
624 iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
625 pf->timestamp);
626
627 out_unlock_notify:
628 mutex_unlock(&data->lock);
629 iio_trigger_notify_done(indio_dev->trig);
630
631 return IRQ_HANDLED;
632 }
633
634 #define ADXL355_ACCEL_CHANNEL(index, reg, axis) { \
635 .type = IIO_ACCEL, \
636 .address = reg, \
637 .modified = 1, \
638 .channel2 = IIO_MOD_##axis, \
639 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
640 BIT(IIO_CHAN_INFO_CALIBBIAS), \
641 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
642 BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
643 BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
644 .info_mask_shared_by_type_available = \
645 BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
646 BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
647 .scan_index = index, \
648 .scan_type = { \
649 .sign = 's', \
650 .realbits = 20, \
651 .storagebits = 32, \
652 .shift = 4, \
653 .endianness = IIO_BE, \
654 } \
655 }
656
657 static const struct iio_chan_spec adxl355_channels[] = {
658 ADXL355_ACCEL_CHANNEL(0, chan_x, X),
659 ADXL355_ACCEL_CHANNEL(1, chan_y, Y),
660 ADXL355_ACCEL_CHANNEL(2, chan_z, Z),
661 {
662 .type = IIO_TEMP,
663 .address = ADXL355_TEMP2_REG,
664 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
665 BIT(IIO_CHAN_INFO_SCALE) |
666 BIT(IIO_CHAN_INFO_OFFSET),
667 .scan_index = 3,
668 .scan_type = {
669 .sign = 's',
670 .realbits = 12,
671 .storagebits = 16,
672 .endianness = IIO_BE,
673 },
674 },
675 IIO_CHAN_SOFT_TIMESTAMP(4),
676 };
677
adxl355_probe_trigger(struct iio_dev * indio_dev,int irq)678 static int adxl355_probe_trigger(struct iio_dev *indio_dev, int irq)
679 {
680 struct adxl355_data *data = iio_priv(indio_dev);
681 int ret;
682
683 data->dready_trig = devm_iio_trigger_alloc(data->dev, "%s-dev%d",
684 indio_dev->name,
685 iio_device_id(indio_dev));
686 if (!data->dready_trig)
687 return -ENOMEM;
688
689 data->dready_trig->ops = &adxl355_trigger_ops;
690 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
691
692 ret = devm_request_irq(data->dev, irq,
693 &iio_trigger_generic_data_rdy_poll,
694 IRQF_ONESHOT, "adxl355_irq", data->dready_trig);
695 if (ret)
696 return dev_err_probe(data->dev, ret, "request irq %d failed\n",
697 irq);
698
699 ret = devm_iio_trigger_register(data->dev, data->dready_trig);
700 if (ret) {
701 dev_err(data->dev, "iio trigger register failed\n");
702 return ret;
703 }
704
705 indio_dev->trig = iio_trigger_get(data->dready_trig);
706
707 return 0;
708 }
709
adxl355_core_probe(struct device * dev,struct regmap * regmap,const char * name)710 int adxl355_core_probe(struct device *dev, struct regmap *regmap,
711 const char *name)
712 {
713 struct adxl355_data *data;
714 struct iio_dev *indio_dev;
715 int ret;
716 int irq;
717
718 indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
719 if (!indio_dev)
720 return -ENOMEM;
721
722 data = iio_priv(indio_dev);
723 data->regmap = regmap;
724 data->dev = dev;
725 data->op_mode = ADXL355_STANDBY;
726 mutex_init(&data->lock);
727
728 indio_dev->name = name;
729 indio_dev->info = &adxl355_info;
730 indio_dev->modes = INDIO_DIRECT_MODE;
731 indio_dev->channels = adxl355_channels;
732 indio_dev->num_channels = ARRAY_SIZE(adxl355_channels);
733 indio_dev->available_scan_masks = adxl355_avail_scan_masks;
734
735 ret = adxl355_setup(data);
736 if (ret) {
737 dev_err(dev, "ADXL355 setup failed\n");
738 return ret;
739 }
740
741 ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
742 &iio_pollfunc_store_time,
743 &adxl355_trigger_handler, NULL);
744 if (ret) {
745 dev_err(dev, "iio triggered buffer setup failed\n");
746 return ret;
747 }
748
749 /*
750 * TODO: Would be good to move it to the generic version.
751 */
752 irq = of_irq_get_byname(dev->of_node, "DRDY");
753 if (irq > 0) {
754 ret = adxl355_probe_trigger(indio_dev, irq);
755 if (ret)
756 return ret;
757 }
758
759 return devm_iio_device_register(dev, indio_dev);
760 }
761 EXPORT_SYMBOL_GPL(adxl355_core_probe);
762
763 MODULE_AUTHOR("Puranjay Mohan <puranjay12@gmail.com>");
764 MODULE_DESCRIPTION("ADXL355 3-Axis Digital Accelerometer core driver");
765 MODULE_LICENSE("GPL v2");
766